Patents Assigned to Avalanche Technology
  • Magnetic Random Access Memory (MRAM) Manufacturing Process for a Small Magnetic Tunnel Junction (MTJ) Design with a Low Programming Current Requirement
    Publication number: 20130149797
    Abstract: A method of making a magnetic random access memory cell includes forming a magnetic tunnel junction (MTJ) on top of a wafer, depositing oxide on top of the MTJ, depositing a photo-resist layer on top of the oxide layer, forming a trench in the photo-resist layer and oxide layer where the trench has a width that is substantially the same as that of the MTJ. Then, the photo-resist layer is removed and a hard mask layer is deposited on top of the oxide layer in the trench and the wafer is planarized to remove the portion of the hard mask layer that is not in the trench to substantially level the top of oxide layer and the hard layer on the wafer. The remaining oxide layer is etched and the MTJ is etched to remove the portion of the MTJ which is not covered by the hard mask layer.
    Type: Application
    Filed: February 8, 2013
    Publication date: June 13, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventor: Avalanche Technology, Inc.
  • Low cost multi-state magnetic memory
    Patent number: 8456897
    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: June 4, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • MEMORY SYSTEM HAVING THERMALLY STABLE PERPENDICULAR MAGNETO TUNNEL JUNCTION (MTJ) AND A METHOD OF MANUFACTURING SAME
    Publication number: 20130119498
    Abstract: A spin-torque transfer magnetic random access memory (STTMRAM) element employed to store a state based on the magnetic orientation of a free layer, the STTMRAM element is made of a first perpendicular free layer (PFL) including a first perpendicular enhancement layer (PEL). The first PFL is formed on top of a seed layer. The STTMRAM element further includes a barrier layer formed on top of the first PFL and a second perpendicular reference layer (PRL) that has a second PEL, the second PRL is formed on top of the barrier layer. The STTMRAM element further includes a capping layer that is formed on top of the second PRL.
    Type: Application
    Filed: January 9, 2013
    Publication date: May 16, 2013
    Applicant: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Yuchen Zhou, Jing Zhang, Roger Klas Malmhall, Ioan Tudosa, Rajiv Yadav Ranjan
  • Low-cost non-volatile flash-RAM memory
    Patent number: 8440471
    Abstract: A method of flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: May 14, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Mahmud Assar
  • MEMORY SENSING CIRCUIT
    Publication number: 20130114335
    Abstract: A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.
    Type: Application
    Filed: December 19, 2012
    Publication date: May 9, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventor: AVALANCHE TECHNOLOGY, INC.
  • MEMORY SENSING CIRCUIT
    Publication number: 20130107614
    Abstract: A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.
    Type: Application
    Filed: December 19, 2012
    Publication date: May 2, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventor: AVALANCHE TECHNOLOGY, INC.
  • Spin-Torque Transfer Magnetic Random Access Memory (STTMRAM) Device with Shared Transistor and Minimal Written Data Disturbance
    Publication number: 20130107612
    Abstract: A spin-torque transfer memory random access memory (STTMRAM) cell is disclosed comprising a selected magnetic tunnel junction (MTJ) identified to be programmed; a first transistor having a first port, a second port and a gate, the first port of the first transistor coupled to the selected MTJ; a first neighboring MTJ coupled to the selected MTJ through the second port of the first transistor; a second transistor having a first port, a second port, and a gate, the first port of the second transistor coupled to the selected MTJ; a second neighboring MTJ coupled to the selected MTJ through the second port of the second transistor; a first bit/source line coupled to the second end of the selected MTJ; and a second bit/source line coupled to the second end of the first neighboring MTJ and the second end of the second neighboring MTJ.
    Type: Application
    Filed: December 18, 2012
    Publication date: May 2, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventor: Avalanche Technology, Inc.
  • MEMORY SENSING CIRCUIT
    Publication number: 20130107613
    Abstract: A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.
    Type: Application
    Filed: December 19, 2012
    Publication date: May 2, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventor: Avalanche Technology, Inc.
  • MEMORY SENSING CIRCUIT
    Publication number: 20130107615
    Abstract: A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.
    Type: Application
    Filed: December 19, 2012
    Publication date: May 2, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventor: Avalanche Technology, Inc.
  • Low current switching magnetic tunnel junction design for magnetic memory using domain wall motion
    Patent number: 8427863
    Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: April 23, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Roger Klaus Malmhall, Parviz Keshtbod
  • Low-crystallization temperature MTJ for spin-transfer torque magnetic random access memory (STTMRAM)
    Patent number: 8422286
    Abstract: A spin-torque transfer memory random access memory (STTMRAM) element is disclosed and has a fixed layer, a barrier layer formed upon the fixed layer, and a free layer comprised of a low-crystallization temperature alloy of CoFeB—Z where Z is below 25 atomic percent of one or more of titanium, (Ti), yittrium (Y), zirconium (Zr), and vanadium (V), wherein during a write operation, a bidirectional electric current is applied across the STTMRAM element to switch the magnetization of the free layer between parallel and anti-parallel states relative to the magnetization of the fixed layer.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: April 16, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Roger Klas Malmhall
  • NON-VOLATILE MAGNETIC MEMORY ELEMENT WITH GRADED LAYER
    Publication number: 20130087872
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • NON-VOLATILE MAGNETIC MEMORY ELEMENT WITH GRADED LAYER
    Publication number: 20130087871
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • NON-VOLATILE MAGNETIC MEMORY ELEMENT WITH GRADED LAYER
    Publication number: 20130088914
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • NON-VOLATILE MAGNETIC MEMORY ELEMENT WITH GRADED LAYER
    Publication number: 20130087870
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • NON-VOLATILE MAGNETIC MEMORY ELEMENT WITH GRADED LAYER
    Publication number: 20130087869
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • NON-VOLATILE MAGNETIC MEMORY ELEMENT WITH GRADED LAYER
    Publication number: 20130088915
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • METHOD FOR FABRICATION OF A MAGNETIC RANDOM ACCESS MEMORY (MRAM) USING A HIGH SELECTIVITY HARD MASK
    Publication number: 20130075840
    Abstract: A self-aligned via of a MRAM cell that connects a memory element including a top electrode, a memory element stack having a plurality of layers, and a bottom electrode to a bit line running over array of the memory elements. The self-aligned via also serves as a hard mask for memory element etching. The hard mask material has high selectivity in the etching ambient to maintain enough remaining thickness. It is also selectively removed during dual damascene process to form a self-aligned via hole. In one embodiment, Aluminum oxide or Magnesium oxide is adapted as the hard mask.
    Type: Application
    Filed: February 9, 2012
    Publication date: March 28, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Kimihiro Satoh, Jing Zhang, Yiming Huai
  • SOLID STATE DISK EMPLOYING FLASH AND MAGNETIC RANDOM ACCESS MEMORY (MRAM)
    Publication number: 20130080687
    Abstract: A central processing unit (CPU) subsystem is disclosed to include a MRAM used among other things for storing tables used for flash block management. In one embodiment all flash management tables are in MRAM and in an alternate embodiment tables are maintained in DRAM and are near periodically saved in flash and the parts of the tables that are updated since last save are additionally maintained in MRAM.
    Type: Application
    Filed: August 8, 2012
    Publication date: March 28, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Siamack Nemazie, NGON VAN LE
  • Non-volatile magnetic memory with low switching current and high thermal stability
    Patent number: 8405174
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: March 26, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod