Patents Assigned to Broadcom Corporation
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Publication number: 20090305663Abstract: A user of a mobile device with a subscription on a primary network is able to interact with an automated mobile network account setup kiosk to setup a subscription (temporary or permanent) for access to services (one or more) on the secondary network. The billing system of the primary network is used to bill for services subscribed to by the user on the secondary network. Subscriber information and subscription information from the primary network is selectively used to setup a new subscription for the user on the secondary network. A mobile device, built in accordance with the present invention, is capable of interacting with a mobile network account setup kiosk, in order to configure access to a secondary network selectively employing subscription information from a primary network currently subscribed to by the user.Type: ApplicationFiled: November 6, 2008Publication date: December 10, 2009Applicant: Broadcom CorporationInventor: James D. Bennett
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Publication number: 20090307751Abstract: According to one general aspect, a method of using a network device may include receiving, via an ingress port, a data packet that includes a payload portion, a source network address and a destination network address. In various embodiments, the method may also include determining if the data packet includes a security tag that includes a role based authentication tag. In some embodiments, the method may include, if the data packet includes a security tag that includes a role based authentication tag, transmitting, via an egress port, at least the payload portion and the role based authentication tag towards, in a topological sense, the destination network address.Type: ApplicationFiled: May 8, 2009Publication date: December 10, 2009Applicant: Broadcom CorporationInventors: Meg Lin, Mark Buer, Nicholas IIlyadis, Zheng Qi
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Publication number: 20090302926Abstract: An apparatus and system are provided to adjust an output voltage of an integrated circuit (IC) die. For instance, the apparatus can include an on-chip source termination and a bias generator. The bias generator can be configured to provide a source current to the on-chip source termination to adjust the output voltage. In particular, when adjusting the output voltage of the IC die, the bias generator can adjust the source current using a first current with a first adjustable current gain and a second current source with a second adjustable current gain.Type: ApplicationFiled: July 10, 2009Publication date: December 10, 2009Applicant: Broadcom CorporationInventor: Kevin T. CHAN
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Publication number: 20090304361Abstract: Devices and methods for receiving, processing and formatting digital video. The devices may include a single semiconductor chip on which is imprinted a radio frequency signal tuner module and a display interface module. The display interface module may be configured to receive programming information from the radio frequency signal tuner module. The display interface module may be configured to communicate the programming information to a digital video recorder. The radio frequency tuner module may include a first radio frequency input channel and a second radio frequency input channel. The radio frequency signal tuner module may include a system oscillator and a phase-locked loop (“PLL”) circuit configured to generate a clock signal. The phase-locked loop circuit may be configured to transmit the signal to the display interface module and to any other suitable modules on the chip.Type: ApplicationFiled: June 5, 2008Publication date: December 10, 2009Applicant: Broadcom CorporationInventors: Eric Chan, Sack Lee Chan, Hiroshi Suzuki, Prijesh Patel
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Patent number: 7629681Abstract: Electrically and thermally enhanced die-up ball grid array (BGA) packages are described. A BGA package includes a stiffener, substrate, a silicon die, and solder balls. The die is mounted to the top of the stiffener. The stiffener is mounted to the top of the substrate. A plurality of solder balls are attached to the bottom surface of the substrate. A top surface of the stiffener may be patterned. A second stiffener may be attached to the first stiffener. The substrate may include one, two, four, or other number of metal layers. Conductive vias through a dielectric layer of the substrate may couple the stiffener to solder balls. An opening may be formed through the substrate, exposing a portion of the stiffener. The stiffener may have a down-set portion. A heat slug may be attached to the exposed portion of the stiffener. A locking mechanism may be used to enhance attachment of the heat slug to the stiffener. The heat slug may be directly attached to the die through an opening in the stiffener.Type: GrantFiled: October 14, 2004Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan, Edward Law, Marc Papageorge
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Patent number: 7630461Abstract: A method for decoding a word received at a current time instant into a symbol of a trellis code. The trellis code corresponds to a trellis diagram having N states associated with the current time instant. Each of the N states corresponds to at least one incoming branch. Each of the incoming branches is associated with a symbol of the trellis code. The branch metrics are computed for the incoming branches such that a branch metric represents a distance between the received word and a symbol associated with the corresponding branch. The branch metric is represented by fewer bits than a squared Euclidian metric representation of the distance. For each of the N states, a node metric is computed based on corresponding branch metrics and one of the incoming branches associated with the state is selected. One of the N states is selected as an optimal state based on the node metrics. The symbol associated with the selected incoming branch corresponding to the optimal state is the decoded word.Type: GrantFiled: June 10, 2005Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventor: Kelly B. Cameron
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Patent number: 7629848Abstract: An operational amplifier is provided with an extended common mode input range. This operational amplifier includes an input stage, a common mode feedback circuit, a current mirror, a replica input stage, and an output stage. The input stage couples to the CMFB circuit and replica input stage. The input stage is operable to receive a feedback signal from the CMBF circuit. This feedback signal is based on comparing a common mode voltage to a common mode reference voltage. The current mirror, coupled to the CMFB circuit and input stage, mirrors currents within the input stage as input to the CMFB circuit. The replica input stage, which is also coupled to the CMFB circuit, uses an input common mode (INCM) voltage to adjust current flow within the replica input stage. This allows a current within the CMFB circuit to be a function of the INCM. The output stage couples to the input stage and is operable to provide an amplified signal corresponding to a first differential signal.Type: GrantFiled: July 7, 2006Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventor: Stephen Wu
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Patent number: 7630350Abstract: Aspects of a method and system for parsing bits in an interleaver for adaptive modulations in a multiple input multiple output (MIMO) wireless local area network (WLAN) system are provided. The interleaver may generate a lookup table, which is utilized to assign at least one binary bit of information, among a plurality of binary bits of information to be transmitted, to at least one of a plurality of spatial streams. The lookup table may be utilized to assign binary bits of information among the plurality of spatial streams to improve performance of a MIMO transceiver.Type: GrantFiled: July 14, 2005Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventor: Joonsuk Kim
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Patent number: 7630701Abstract: A method and system to determine when a wireless terminal has been paged by a servicing base station. An encoded paging burst is received on a paging channel and then decoded to produce a decoded paging burst. The decoded paging burst is processed to determine if it is a null page. When the encoded paging burst is a null page, subsequent processing operations scheduled to follow a later null page are rescheduled and immediately processed, allowing the wireless terminal to re-enter the sleep mode more quickly following the receipt of a subsequent paging burst.Type: GrantFiled: October 18, 2004Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Nelson R. Sollenberger, Ronish Patel, Kenneth L. Kasiske, Karl Paulsen, Zhijun (Nick) Gong
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Patent number: 7631242Abstract: A system, method and computer program product is provided for mitigating the effects of burst noise on packets transmitted in a communications system. A transmitting device applies an outer code, which may include, for example, a block code, an exclusive OR (XOR) code, or a repetition code, to one or more packets prior to adaptation of the packets for transmission over the physical (PHY) layer of the communications system, wherein the PHY layer adaptation may include FEC encoding of individual packets. The outer coded packets are then separately transmitted over a channel of the communications system. A receiving device receives the outer coded packets, performs PHY level demodulation and optional FEC decoding of the packets, and then applies outer code decoding to the outer coded packets in order to restore packets that were erased during transmission due to burst noise or other impairments on the channel.Type: GrantFiled: June 20, 2002Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Bruce J. Currivan, Thomas J. Kolze, Daniel H. Howard, Thomas J. Quigley, Nambi Seshadri, Thomas L. Johnson, Scott Cummings, Jay Harrell, Fred Bunn, Joel Danzig, Stephen Hughley
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Patent number: 7630566Abstract: A method and apparatus are disclosed for performing motion estimation and compensation to fractional pixel accuracy using polyphase prediction filters as part of a video compression/decompression technique. A motion estimator applies a set of polyphase filters to some data in the reference picture and generates motion vectors, an estimated macroblock of video data, and a residual error macroblock of video data. The data referenced in the reference picture usually have more data than a macroblock since multi-tap filtering needs to access more data. A motion compensator generates a compensated macroblock of video data in response to the reference video data, the residual error macroblock of video data, and a polyphase prediction filter decided by the motion vector. The reference video data are usually reconstructed at the compensator side.Type: GrantFiled: September 20, 2002Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Alexander G MacInnis, Sheng Zhong, Jose R Alvarez
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Patent number: 7630870Abstract: In a video system, a method and system for efficient design verification of a motion adaptive deinterlacer (MAD) are provided. A MAD reference model may be configured via a configuration file to generate test parameters for the verification of a MAD hardware model. Test-bench interface drivers and a verification monitor may be utilized to transfer test parameters to the MAD hardware model and to verify simulated results. Modes of verification may comprise a normal mode, a pixel processing mode, and a field controller mode. During the normal mode, simulated pixel information and register settings generated by the pixel processor and field controller in the MAD hardware model may be compared to expected pixel information and register settings generated by the MAD reference model. During the pixel processing mode, expected and simulated pixel information may be compared. During the field controller mode, expected and simulated register settings may be compared.Type: GrantFiled: December 6, 2004Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Jiann-Tsuen Chen, Jean-Huang Chen
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Patent number: 7630468Abstract: A communications management system introduces a low bandwidth phase locked loop (LoBW-PLL) working in tandem with a high bandwidth phase locked loop (HiBW-PLL). The LoBW-PLL only needs to follow the average frequency of the transported clock and not all of the excursions made by the master clock. During periods of downstream outage, the LoBW-PLL opens its loop and free wheels such that disturbances caused by a reacquisition do not impact the concept of time for the LoBW-PLL. After reacquisition, the LoBW-PLL and HiBW-PLL are compared to determine if a timing error has occurred. If a timing error is detected, the magnitude of the timing error is measured upon completion of the reacquisition cycle, and this measurement is used to correct the timing error.Type: GrantFiled: October 19, 2004Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Kevin Miller, Ray Whitehead
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Patent number: 7631219Abstract: A method and related computer program product of preventing write corruption in a redundant array in a computer system, comprising detecting a write failure from a calling application to at least one disk of the redundant array, writing failure information to non-volatile storage; returning an I/O error to the calling application; reading the failure information from the non-volatile storage during the next system reboot; and reconfiguring the array to eliminate the failed disk.Type: GrantFiled: October 22, 2004Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Chris R. Franklin, Jeffrey T. Wong
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Patent number: 7631246Abstract: LDPC (Low Density Parity Check) code size adjustment by shortening and puncturing. A variety of LDPC coded signals may be generated from an initial LDPC code using selected shortening and puncturing. Using LDPC code size adjustment approach, a single communication device whose hardware design is capable of processing the original LDPC code is also capable to process the various other LDPC codes constructed from the original LDPC code after undergoing appropriate shortening and puncturing. This provides significant design simplification and reduction in complexity because the same hardware can be implemented to accommodate the various LDPC codes generated from the original LDPC code. Therefore, a multi-LDPC code capable communication device can be implemented that is capable to process several of the generated LDPC codes. This approach allows for great flexibility in the LDPC code design, in that, the original code rate can be maintained after performing the shortening and puncturing.Type: GrantFiled: May 3, 2006Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Tak K. Lee, Kelly Brian Cameron
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Patent number: 7630410Abstract: A bit stream multiplexer and a bit stream demultiplexer of the present invention couples a communication Application Specific Integrate Circuit (ASIC) to a high-speed bit stream media. The bit stream multiplexer includes a first transmit data multiplexing integrated circuit having an input that receives a first plurality of bit streams at a first bit rate from the communication ASIC and an output that produces a second plurality of bit streams at a second bit rate, the second plurality having fewer bit streams than said first plurality. It further includes a second transmit data multiplexing integrated circuit having an input that receives the second plurality of bit streams at the second bit rate and an output that produces a single bit stream at a line bit rate, the single bit stream having a predetermined bit order. The bit stream demultiplexer includes similar demultiplexing integrated circuits.Type: GrantFiled: January 22, 2003Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Mohammad Nejad, Daniel Schoch
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Patent number: 7630446Abstract: An automatic polarity swap is implemented in a communications system. Two or more transceivers having differential inputs and outputs are coupled together through an interface, such as a backplane to form a communications system. In such a configuration, it is possible to cross-connect the differential data lines or signals at the interface, which will cause invalid data words to received at the second transceiver. Accordingly, the present invention includes an error check and correction module that detects invalid data words after parallel-to-serial conversion. More specifically, an error check determines if the parallel differential signal represents a valid data word. This can be done, for example, by storing and comparing valid data words in a memory such as RAM. If the received data word is valid, then no corrective action is taken.Type: GrantFiled: August 7, 2008Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventor: Vasudevan Parthasarathy
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Patent number: 7631150Abstract: Methods, systems and computer program products to maintain cache coherency in a System-On-a-Chip (SOC) which is part of a distributed shared memory system are described. A local SOC unit that includes a local controller and an on-chip memory is provided. In response to receiving a request from a remote controller of a remote SOC to access a memory location, the local controller determines whether the local SOC has exclusive ownership of the requested memory location, sends data from the memory location if the local SOC has exclusive ownership of the memory location and stores an entry in the on-chip memory that identifies the remote SOC as having requested data from the memory location. The entry specifies whether the request from the remote SOC is for exclusive ownership of the memory location. The entry also includes a field that identifies the remote SOC as the requester. The requested memory location may be external or internal to the local SOC unit.Type: GrantFiled: September 29, 2006Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventor: Fong Pong
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Patent number: 7630306Abstract: A network device for dynamically allocating memory locations to plurality of queues. The network device determines an amount of memory buffers that is associated with a port and assigns a fixed allocation of memory buffers to each of a plurality of queues associated with the port. The network device also shares remaining memory buffers among the plurality of queues, wherein the remaining memory buffers are used by at least one of the plurality of queues after the fixed allocation of memory buffers assigned to the queue is used by the queue. The network device further sets a limit threshold for each of the plurality of queues. The limit threshold determines how much of the remaining memory buffer may be used by each of the plurality of queues. When one of the limit threshold is reached for one of the plurality of queues or all of the remaining buffers are used, a request by the one of the plurality of queues is denied.Type: GrantFiled: February 18, 2005Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventor: Weitong Chuang
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Patent number: 7630466Abstract: A search engine selects initial coefficients for a receive equalizer. The search engine may be incorporated into a communication receiver that includes a decision feedback equalizer and clock and data recovery circuit. Here, the search engine may initialize various adaptation loops that may control the operation of, for example, a decision feedback equalizer, a clock and data recovery circuit and a continuous time filter. The receiver may include an analog-to-digital converter that is used to generate soft decision data for some of the adaptation loops.Type: GrantFiled: November 15, 2005Date of Patent: December 8, 2009Assignee: Broadcom CorporationInventors: Afshin Momtaz, Rajesh Satapathy, Chung-Jue Chen