Abstract: Power over Ethernet (PoE) communication systems provide power and data communications over the same communications link, where a power source device (PSE) provides DC power (for example, 48 volts DC) to a powered device (PD). The DC power is transmitted simultaneously over the same communications medium with the high speed data from one node to the other node. The PSE typically includes a controller that controls the DC power provided to the PD at the second node of the communications link. The PSE controller measures the voltage, current, and temperature of the outgoing and incoming DC supply lines to characterize the power requirements of the PD. In addition, the PSE controller may detect and validate a compatible PD, determine a power classification signature for the validated PD, supply power to the PD, monitor the power, and reduce or remove the power from the PD when the power is no longer requested or required. The PSE controller also monitors for a Maintain Power Signature (MPS).

Abstract: According to one exemplary embodiment, an N-stage programmable clock control architecture includes N flip-flops, where the N flip-flops are clocked by a primary clock source, such as a PLL. The N-stage programmable clock control architecture further includes means for programming the N flip-flops such that the N-stage programmable clock control architecture outputs N programmed at-speed clock pulses. For example, when N is equal to 3, three programmed clock pulses can be outputted by the N-stage programmable clock control architecture, with a total of eight different patterns of programmed clock pulses. The N-stage programmable clock control architecture can thus adequately test, for example, combinational logic requiring greater than two consecutive clock pulses for complete at-speed testing. In one embodiment, scan-shift registers can be utilized to program the N flip-flops. In another embodiment, a look-up table can be used to program the N flip-flops.

Abstract: One or more methods and systems of analyzing, assessing, and reporting voice quality scores are presented. In one embodiment, voice quality scores are generated by querying one or more computing devices responsible for processing a reference speech sample input into a voice communication system. In one embodiment, voice quality scores are transmitted by a voice analysis platform and subsequently analyzed. In one embodiment, a single voice analysis platform is used to measure voice quality of a voice communication system. In one embodiment, multiple voice analysis platforms are used to measure voice quality at multiple endpoints of one or more voice communication systems. In one embodiment, the method comprises a user determining one or more points along a communication system where transmitted reference speech samples are to be tapped. The tapped reference speech samples are ported to a voice analysis platform where a voice quality score is generated and graphically displayed.

Abstract: Aspects of a method and system for a low-complexity multi-beam repeater may include receiving one or more information signals at one or more receiver antennas, and receiving one or more local oscillator control signals via an out-of-band link. The one or more received information signals may be demodulated to one or more intermediate-frequency signals via one or more frequency carrier signals, wherein the frequency carrier signals may be controlled by the one or more received local oscillator control signals. One or more intermediate-frequency signals and/or one or more signals generated from the one or more intermediate-frequency signals may be modulated to one or more radio-frequency signals via the one or more frequency carrier signals. One or more transmit signals comprising at least one of the one or more radio-frequency signals may be transmitted via one or more transmit antennas.

Abstract: Methods and systems for reducing AM/PM and AM/AM distortion are disclosed and may comprise selectively coupling and impedance matching one of a plurality of tunable antennas to a single programmable output stage comprising a single power amplifier on a chip in a transmitter. A programmable matching circuit comprising adjustable inductance and capacitance may be used to impedance match the antenna to the output stage. The selected tunable antenna may be coupled to the output stage utilizing a programmable switch array, which may comprise at least one integrated transistor, for example. The tunable antennas may be designed to operate in different frequency bands and to be tuned within one or more frequency bands. The programmable matching circuit may be integrated on the chip or external to the chip. The matching circuit capacitance may be integrated on-chip, and the inductance may be located off-chip.

Abstract: Presented herein are system(s), and method(s), for interlaced to progressive conversion using weighted average of spatial interpolation and weaving. In one embodiment, there is presented a deinterlacer for deinterlacing. The deinterlacer comprises a first circuit and a second circuit. The first circuit measures weave artifacts between an alternate field and a field for a pixel at a pixel position in the alternate field. The second circuit generates a pixel value for the pixel position in the field, where the pixel value is the weighted average of the pixel, and an interpolated value from two or more pixels from the field, where the weighted average is a function of the weave artifacts.

Abstract: Certain aspects of a method and system for motion compensated temporal filtering using both finite impulse response (FIR) and infinite impulse response (IIR) filtering may include blending at least one finite impulse response (FIR) filtered output picture of video data and at least one infinite impulse response (IIR) filtered output picture of video data to generate at least one blended non-motion compensated output picture of video data. A motion compensated picture of video data may be generated utilizing at least one previously generated output picture of video data and at least one current input picture of video data. A motion compensated picture of video data may be blended with at least one current input picture of video data to generate a motion compensated output picture of video data. The generated motion compensated output picture of video data and the generated non-motion compensated output picture of video data may be blended to generate at least one current output picture of video data.

Abstract: A signal delay structure and method of reducing skew between clock and data signals in a high-speed serial communications interface includes making a global adjustment to the clock signal in the time domain to compensate for a component of the skew that is common between the clock and all data signals. This can include skew caused by the variation in frequency of the input clock from a nominal value, misalignment between the phase of the clock and data generated at the source of the two signals. The global adjustment is made through a delay component that is common to all of the clock signal lines for which skew with data signals is to be compensated. A second level adjustment is made that compensates for the component of the skew that is common to the clock and a subset of the data signals.

Abstract: A system reads data from a magnetic storage media. A read head reads data from the magnetic storage media and produce an analog signal. A variable gain amplifier amplifies the analog signal. An offset adjust module substantially centers the amplified analog signal to a midscale. A Magneto Resistive Asymmetry (MRA) correction module MRA corrects the amplified analog signal. A Continuous Time Filter (CTF) compensation module processes the amplified analog signal. An Analog to Digital Converter (ADC) samples the amplified analog signal based upon a control signal to produce a digital signal. A Disk Lock Clock (DLC) system produces the control signal to the ADC. The control signal is representative of a frequency offset caused by at least one servo wedge rate error. A Finite Impulse Response (FIR) filter module filters the digital signal. A sequence detector processes the digital signal and detects a bit sequence from the digital signal.

Abstract: Aspects of a method and system for I/Q branch equalization in OFDM systems may include determining a transfer function mismatch between an in-phase processing branch, and/or a quadrature processing branch in an OFDM receiver. The determined transfer function mismatch may be compensated for, by applying equalization after a fast Fourier transform (FFT) in an in-phase processing branch and/or a quadrature processing branch. The OFDM system may be compliant with, for example, UMTS LTE (EUTRA), WiMAX (IEEE 802.16), DVB-H, and WLAN (IEEE 802.11). A transfer function may be measured for an in-phase branch filter and/or quadrature branch filter to determine the transfer function mismatch. The transfer function mismatch may be compensated for, in frequency domain by the equalizer. The transfer function mismatch may comprise magnitude and/or phase response mismatch, wherein the magnitude and/or phase response mismatch may be a function of frequency.

Abstract: A wireless device may utilize a plurality of Bluetooth sessions to perform a plurality of applications simultaneously in said wireless device. A Bluetooth interface may be utilized to perform initial connectivity and/or control functionality associate with each of said plurality of Bluetooth sessions. The connectivity and/or control functionality may comprise discovery, pairing, and/or initial connection. Each of the plurality of Bluetooth sessions may comprise utilizing one or more of a plurality of high speed data standards to perform data transmission and/or reception. The plurality of high speed data standard may comprise WLAN, ultra-wideband (UWB), and/or 60 GHz PHY and/or PHY/MAC layers. Two or more of the plurality of Bluetooth sessions may contemporaneously utilize different PHY and/or PHY/MAC layers pertaining to the same high speed data standard. Performing each of the plurality of applications may comprise utilizing one or more of the plurality of Bluetooth sessions.

Abstract: An interface which effects communication between first and second systems and includes a first arrangement for communicating with the first system using a first protocol and a second arrangement for communicating with the second system using a second protocol. At least one of the arrangements includes a mechanism for effecting wireless communication. In accordance with the invention, a third arrangement is included for translating data received from the first system in accordance with the first protocol into data adapted for the second system in accordance with the second protocol. In the illustrative embodiment, the inventive interface further includes an arrangement for translating data received from the second system in accordance with the second protocol into data adapted for the first system in accordance with the first protocol.

Abstract: A voltage regulator includes a first stage capable of receiving a reference voltage and capable of having a first current flowing through the first stage. A second stage is capable of having a second current flowing through the second stage. A third stage is capable of outputting an output voltage and capable of having a third current flowing through the second stage. The first, second and third currents are proportional to each other throughout a range of operation of the voltage regulator between substantially zero output current and maximum output current. The first stage drives the second stage as a low input impedance load.

Abstract: A computing unit includes a radio that communicates with at least one external station in a femtocell access point (AP) mode of operation. A processing module executes a plurality of applications including a femtocell application in the femtocell AP mode of operation and a multi-level security application that authenticates a user of the computing unit and that restricts access to the femtocell application based on the authentication of the user.

Abstract: A method providing digital video channel change performance according to the invention is provided. The method may include decoding stored data packets associated with a first program. The method may also include displaying the decoded data packets associated with the first program. The method may further include demultiplexing a plurality of data packets associated with a second program and storing the plurality of data packets associated with the second program. The stored data packets associated with the second program may include a first random access point. The method may also include maintaining data associated with the first random access point until data associated with a second random access point is received.

Abstract: A method and apparatus is disclosed to compensate for an in-phase/quadrature phase (I/Q) imbalance in a communications receiver. The communications receiver may utilize information gained from observing one or more observational interferers to adjust one or more sequence parameters, such as gain and/or phase to provide some examples. The one or more observational interferers including one or more images outside of a desired frequency band of interest. The communications receiver provides one or more sequence parameter values to allow for real-time adjustment of the sequence parameters to compensate for the I/Q imbalances.

Abstract: Techniques are provided for handling failures of DNS (domain name system) servers to respond to DNS queries. A DNS resolver is configured to resolve domain names, and includes a time-to-live (TTL)-based cache, a negative cache, and a long term store cache. The TTL-based cache is configured to temporarily store domain names with resolved IP addresses. The negative cache is configured to store negative entries that include information indicating domain names that were failed to be resolved. The long term store cache is configured to store domain names with resolved IP address for an indefinite time period. The caches are accessed in a manner that enables fewer DNS query retries to be performed when a DNS server is non-responsive, to reduce delays and network traffic. Furthermore, the DNS resolver may reduce a number of DNS queries performed the longer the DNS server stays non-responsive.

Abstract: A method and apparatus is disclosed that is capable of transmitting video signals and/or audio signals using the HDMI interface standard or the DisplayPort interface standard. A dual mode transmitter is disclosed that is configurable to transmit to a first sink device, configured in accordance with a HDMI display interface, in a HDMI mode of operation and/or a second sink device, configured in accordance with a DisplayPort display interface, in a DisplayPort mode of operation. The dual mode transmitter is configured to receive a biasing current from the first sink device in the HDMI mode of operation or to internally provide the biasing current in DisplayPort mode of operation by selecting impedances from selectable impedance networks. The dual mode transmitter is configured to transmit the video signals and/or audio signals by biasing one or more transistors using the biasing current.

Abstract: Various embodiments are disclosed relating to wireless systems, and also relating to transmitter amplifiers, such as, for example, polar transmitter amplifiers with variable output power. According to an example embodiment, a circuit is provided including a plurality of selectable amplifier cells. Each amplifier cell may receive a phase or frequency modulated signal and an amplitude modulated signal. Each amplifier cell may output a signal based upon a combination of the received amplitude modulated signal and the received phase or frequency modulated signal if the amplifier cell is selected. The circuit may provide a variable output current or output power based upon the selection of one or more of the amplifier cells.

Abstract: The present invention enables the coupling and decoupling of multiple processing devices to a network without disrupting the network. In an embodiment, the invention provides a switch having a network port and several initiator ports each configured for coupling to a processing device. The switch is configured to route data from the network port to the initiator ports and from the initiator ports to the network port. A management agent facilitates operation of the switch by processing port initializations, replying to device registration requests, and processing predetermined unsolicited discovery commands. During operation, the management agent enables configuration changes caused, for example, by the coupling and/or decoupling of processing device to initiator ports.