Abstract: A transmit signal generated by the baseband processor in a translational loop type RF transmitter is “pre-distorted” so as to counter act magnitude distortion and group delay variation imposed by a narrow PLL signal filter. The pre-distortion occurs in two steps: a magnitude equalizer in the baseband processor pre-distorts the amplitude of the transmit signal according to the inverse of the PLL signal filter magnitude response, and a group delay equalizer linearizes the phase response of the entire transmitter chain, i.e., pre-distorts the transmit signal such that the combined phase response of magnitude equalizer, group delay equalizer, and PLL signal filter is linear. With such pre-distortion, a loop filter is provided for with component values that define a relatively small bandwidth for the loop filter to filter spurious tones that result from an IF reference feedthrough to a voltage controlled oscillator of the translational loop.
Abstract: A multi-band receiver includes a first receiver coupled to receive a first desired signal component of an RF signal over a first range of frequencies and generate a first received signal. A second receiver receives a second desired signal component of the RF signal over a second range of frequencies and generates a second received signal. The second receiver includes a harmonic cancellation module that attenuates a harmonic of the first desired signal component that falls within the second range of frequencies.
Abstract: A receiver includes an antenna array that generates a plurality of received signals from at least a first remote transmitter and a second remote transmitter, the antenna array having a beam pattern that is controllable based on at least one control signal. A plurality of receiver sections process the plurality of received signals to generate a plurality of down-converted signals.
Abstract: A mobile video device includes a transceiver module that receives navigation data corresponding to a plurality of video programs including at least one unicast video program and at least one multicast video program, that transmits selection data and that receives a video signal in response thereto. An interface module receives interface data in response to actions of a user. A video display device generates a selection display based on selection display data in a video selection mode and that generates a video display in a video display mode based on the video signal. A video application module generates the selection display data based on navigation data, that generates selection data based on user interface data.
Type:
Application
Filed:
August 12, 2008
Publication date:
November 26, 2009
Applicant:
BROADCOM CORPORATION
Inventors:
Thomas J. Quigley, Jeyhan Karaoguz, Sherman (Xuemin) Chen, Michael Dove, David Rosmann, Stephen E. Gordon
Abstract: The present invention provides several scalable integrated circuit high density capacitors and their layout techniques. The capacitors are scaled, for example, by varying the number of metal layers and/or the area of the metal layers used to from the capacitors. The capacitors use different metallization patterns to form the metal layers, and different via patterns to couple adjacent metal layers. In embodiments, optional shields are included as the top-most and/or bottom-most layers of the capacitors, and/or as side shields, to reduce unwanted parasitic capacitance.
Type:
Application
Filed:
July 29, 2009
Publication date:
November 26, 2009
Applicant:
BROADCOM CORPORATION
Inventors:
Victor Chiu-Kit Fong, Eric Bruce Blecker, Tom W. Kwan, Ning Li, Sumant Ranganathan, Chao Tang, Pieter Vorenkamp
Abstract: A receiver includes an antenna array that generates a plurality of received signals from at least a first remote transmitter and a second remote transmitter. Aa plurality of receiver sections process the plurality of received signals to generate a plurality of down-converted signals. A receiver processing module generates a first plurality of reception matrices corresponding to the first remote transmitter based on the plurality of down-converted signals, generates a first reception statistic from a sum based on the first plurality of reception matrices, and generates an association decision corresponding to one of: the first remote transmitter and the second remote transmitter, based on the first reception statistic.
Abstract: A video transmission system includes a video server module that selectively operates in a unicast mode and a multicast mode, wherein the video server module generates a video signal that includes a unicast video signal when the video server module is in the unicast mode and that includes a multicast video signal when the video server module is in the multicast mode. A wireless access device transmits the video signal to at least one mobile video device.
Type:
Application
Filed:
August 12, 2008
Publication date:
November 26, 2009
Applicant:
BROADCOM CORPORATION
Inventors:
Jeyhan Karaoguz, Sherman (Xuemin) Chen, Michael Dove, David Rosmann, Thomas J. Quigley, Stephen E. Gordon
Abstract: A video processing system includes a video decoder that decodes a first video signal based on at least one first conditional access code. A video control module maintains a key table that includes the at the at least one first conditional access code and at least one second conditional access code for use in conjunction with a second video signal.
Type:
Application
Filed:
August 12, 2008
Publication date:
November 26, 2009
Applicant:
BROADCOM CORPORATION
Inventors:
Sherman (Xuemin) Chen, Michael Dove, David Rosmann, Thomas J. Quigley, Stephen E. Gordon, Jeyhan Karaoguz
Abstract: A wireless access point and multiple wireless terminals exchange utilization, status, mobility and reception characteristics. Each wireless terminal generates reception characteristics based on transmissions received from the wireless access point and from other devices in the network. In one operating mode, the characteristics gathered by the wireless devices are forwarded to the wireless access point, and, based on all received characteristics, the wireless access point selects its own transmission power for different types of the transmission. In another mode, all characteristics are exchanged between every wireless terminal and the access point so that each can independently or cooperatively make transmission power control decisions. In a further mode, the wireless access point adjusts protocol parameters based on an assessment of the characteristics received from the client devices.
Abstract: A video display device includes a video post processing module that processes a video signal to generate a processed video signal and a backlight control signal. A video display produces a video image, based on the processed video signal. The video display includes at least one controllable backlight that is controlled based on the backlight control signal.
Type:
Application
Filed:
August 12, 2008
Publication date:
November 26, 2009
Applicant:
BROADCOM CORPORATION
Inventors:
Michael Dove, Jeyhan Karaoguz, Sherman (Xuemin) Chen, David Rosmann, Thomas J. Quigley, Stephen E. Gordon
Abstract: A video processing system includes a video encoder that encodes a video stream into a independent video layer stream and a first dependent video layer stream based on a motion vector data or grayscale and color data.
Type:
Application
Filed:
August 12, 2008
Publication date:
November 26, 2009
Applicant:
Broadcom Corporation
Inventors:
Stephen E. Gordon, Jeyhan Karaoguz, Sherman (Xuemin) Chen, Michael Dove, David Rosmann, Thomas J. Quigley
Abstract: An apparatus for scaling a load device with frequency in a phase interpolator can include an analog loop and a digital loop. The load device of the phase interpolator can include a transistor and a plurality of resistors selectively configured in parallel with the transistor. The analog loop controls a resistance of the transistor based on a voltage applied to a control terminal of the transistor. For instance, the analog loop can tune the resistance of a PMOS device by adjusting a voltage applied to the PMOS device's gate terminal. In addition, the analog loop can include a comparator to compare a voltage across the transistor to a reference voltage such that an optimal voltage is maintained for an output swing of the phase interpolator. The analog loop can also include a low pass filter coupled to an output of the comparator to define frequency stability and loop bandwidth of the analog loop.
Abstract: A video processing system includes a video device that generates a request corresponding to video content. A conditional access module generates a video signal for transmission to the video device during a first time period, and terminates transmission of the video signal when the request is not authenticated during the first time period. In a further embodiment, the conditional access module generates a video signal for unscrambled transmission to the video device during a first time period, terminates the unscrambled transmission of the video signal at the expiration of the first time period, and continues with scrambled transmission of the video signal after the first time period.
Type:
Application
Filed:
August 12, 2008
Publication date:
November 26, 2009
Applicant:
BROADCOM CORPORATION
Inventors:
Stephen E. Gordon, Jeyhan Karaoguz, Sherman (Xuemin) Chen, Michael Dove, David Rosmann, Thomas J. Quigley
Abstract: A Radio Frequency (RF) receiver includes a RF front end and a baseband processing module coupled to the RF front end that is operable to determine equalizer coefficients for a composite signal that includes a first information signal and a second information signal. First and second information signal channel estimates and channel powers based upon training symbols are determined. A composite signal power is determined. A noise variance of the composite signal is determined based upon the first information signal channel power, the second information signal channel power, and the composite signal power. A plurality of equalizer coefficients are determined based upon the first information signal channel estimate, the second information signal channel estimate, and the noise variance of the composite signal.
Abstract: In a wireless communication system, a method and system for implementing the A5/3 encryption algorithm for GSM and EDGE compliant handsets are provided. Input variables may be initialized in a keystream generator and an intermediate value may be generated with a cipher key parameter and a key modifier. A number of processing blocks of output bits may be determined based on a number of bits in an output keystream. The processing blocks of output bits may be generated utilizing a KASUMI operation and may be based on an immediately previous processing block of output bits, the intermediate value, and an indication of the processing block of output bits being processed. The processing blocks of output bits may be generated after an indication that an immediately previous processing block of output bits is available and may be grouped into two final blocks of output bits in the output keystream.
Abstract: A method for decoding bi-phase encoded data begins by interpreting a first bit boundary of a bit of the bi-phase encoded data to produce a first boundary value. The method continues by interpreting a second bit boundary of the bit of the bi-phase encoded data to produce a second boundary value. The method continues by comparing the first boundary value to the second boundary value to produce a decoded bit.
Abstract: An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more first diodes coupled in series between the supply voltage and terminal pad, and a second diode coupled to ground. One or more third diodes are coupled in series between the terminal pad and second diode, and are configured to permit a voltage on the interconnection nodes between the one or more third diodes and second diode different from ground. The one or more third diodes include an n+ on an area of P-substrate. A deep N-well separates the area of P-substrate from a common area of P-substrate, which is coupled to ground. The allowable signal swing at the terminal pad is increased to greater than supply voltage plus 1.4 V. The ESD protection circuit is useful for, among other things, relatively low supply voltage ICs.
Abstract: A method and apparatus to counter effects of an offset voltage by calibrating an analog-to-digital converter (ADC). A digital calibration loop minimizes the effects of offset voltage to improve ADC accuracy as well as provide a low-power, submicron-scale ADC. A calibration circuit senses an ADC output and adjusts a variable calibration voltage to counter the effects of the offset voltage. Reduction of the offset voltage effects increases the ADC accuracy.
Type:
Grant
Filed:
December 13, 2006
Date of Patent:
November 24, 2009
Assignee:
Broadcom Corporation
Inventors:
Michael Le, Chun-Ying Chen, Wynstan Tong, Kwang Young Kim, Hui Pan
Abstract: Equalization is provided in a high speed communication receiver that includes in various aspects an automatic gain control input stage, a decision feedback equalizer, a clock and data recovery circuit and equalization control circuits. The automatic gain control stage may include a continuous time filter with an adjustable bandwidth. A threshold adjust signal may be applied to the output of the automatic gain control stage. The equalization control circuits may be implemented in the digital domain and operate at a lower clock speed than the data path.
Type:
Grant
Filed:
June 30, 2004
Date of Patent:
November 24, 2009
Assignee:
Broadcom Corporation
Inventors:
Afshin Momtaz, Mario Caresosa, David Chung, Davide Tonietto, Guangming Yin, Bruce Currivan, Thomas Kolze, Ichiro Fujimori
Abstract: According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier receives a reference voltage, and a feedback voltage of the bias circuit. The bias circuit further includes an output transistor driven by the output of the second amplifier, where the output transistor provides the output of the bias circuit and the feedback voltage. The bias circuit further includes a feedback resistor coupled between an input and an output of the second amplifier. According to this embodiment, the output of the second amplifier forms a non-dominant pole of the bias circuit and the output of the bias circuit forms a dominant pole of the bias circuit, thereby increasing power supply rejection of the bias circuit.