Abstract: An oscillator that provides a quadrature output and has a cross-coupled configuration is disclosed. The oscillator generates an output signal having a frequency. Two phase shift circuits, or stages, are activated by a control signal to provide phase shifts within the oscillator. Each phase shift circuit includes poles to provide the phase shift. A pole includes a varactor to tune, adjust or vary the phase shift accordingly.

Abstract: An improved logic methodology that combines the speed advantages of dynamic logic with the low contention of static logic, such that the logic circuits are not adversely affected by high-leakage transistors. The logic circuit of the present invention comprises first and second stages, wherein first logic stage comprises clocked precharge and evaluate transistors and full-complementary low-beta-ratio static logic. Subsequent stages of the logic circuit comprise full-complementary low-beta-ratio static logic, wherein the logic devices in the subsequent stages are not connected to a clock signal. The low-beta-ratio static logic devices in said subsequent stage comprise pMOS transistors that are not connected to a contention keeper. Furthermore, the low-beta-ratio static logic transistors in the subsequent stage comprise pMOS transistors that are significantly smaller than pMOS devices found in normal static logic.

Abstract: A network switch for switching packets from a source to a destination includes a source port for receiving an incoming packet from a source, a destination port that contains a path to a destination for the packet, and a programmable counter unit for counting a number of packets of selected packet types which are received by the switch.

Abstract: The present invention is an integrated set-top box. In one embodiment, the up-stream path and the down-stream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and a digital receiver portion that is integrated on the common semiconductor substrate with a power amplifier of the up-stream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the set-top box appears to be a single chip configuration to the user.

Abstract: The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user.

Abstract: A highly integrated set-top box is implemented on a single semiconductor substrate. For instance, an analog RF tuner is implemented on the same substrate with a digital receiver, and audio-video back-end circuits. The single chip set-top box can be used for satellite, cable, internet, or terrestrial TV applications, or other applications. As a result, the substrate area, assembly time, and associated costs per chip are reduced.

Abstract: An improved adaptive mixer for use in the down conversion module of a wireless transceiver. The adaptive mixer comprises a conversion gain module that is operable to receive a radio frequency signal and to generate an intermediate frequency that is provided to a radio interface in a wireless transceiver. The radio interface is operable to generate a gain control signal and a bandwidth control signal. The gain control signal is provided to a gain control module that is operable to select a combination of load resistance values that will provide a predetermined gain level for the output of the conversion gain module. Bandwidth control logic in the adaptive mixer uses the bandwidth control signal to operably connect a plurality of bandwidth control capacitors to the conversion gain module to control the bandwidth of the output signal.

Abstract: A system and method is provided for interleaving data in a communication device. The system includes a memory that stores blocks of data to be interleaved. In addition to the memory, the system includes a write module and a read module, each of which is coupled to the memory. The write module is configured to receive a burst of data and write blocks of data from the burst into the memory. The write module is also configured to provide control information to the read logic. The control information includes a rolling burst counter and a burst profile bank identifier for each block. If interleaving is activated, the control information also includes information pertaining to how the read module should interleave the block. If interleaving is not activated, the control information also includes the byte length size of the burst. The read module reads blocks of data from memory in either an interleaved fashion or a non-interleaved fashion in accordance with the control information.

Abstract: A system for detecting connector compatibility with a time domain reflectometry (TDR) circuit on a peripheral device. A cable connects the peripheral device and a second peripheral device. A first connector is for mating to a second connector on the second peripheral device. The time domain reflectometry can be used to detect electrical compatibility of the first and second connectors. The first connector can be an RJ11 connector. The second connector can be an RJ45 connector. The first connector can be a plug, and the second connector can be a socket. The number of pins of the first and second connectors can be different. The first connector can be a telco connector, and the second connector can be an Ethernet connector. The TDR circuit can be part of the peripheral device diagnostics.

Abstract: The present invention is a metal bond pad that provides electrical and mechanical connection to an integrated circuit (IC). The metal bond pad is configured to accommodate for probe travel during probing measurements, without modifying the size of the passivation opening of the bond pad. This enables higher density of active devices on the IC and therefore increases integration and lowers IC cost. The metal bond pad for the integrated circuit includes a substrate, a first metal layer, and a second metal layer. The substrate has the first metal layer disposed therein, having an opening from the top surface of the substrate. The second metal layer has a first-end portion, a second-end portion and a center portion disposed between the first-end portion and the second-end portion. The center portion of the second metal layer is aligned with the opening in the substrate and a bottom surface of the center portion is in contact with the top surface of the first metal layer.

Abstract: An improved method and apparatus for using common mode feedback to maintain a predetermined DC level for an intermediate frequency output signal. A common mode feedback capacitor-select switch module is operable to use a bandwidth control signal from a radio interface of a wireless device to selectively connect a plurality of common mode feedback capacitors to an operational amplifier, thereby generating a common mode feedback signal as an input to an active mixer conversion gain module. The predetermined combination of common mode feedback capacitors is used in combination with a plurality of bandwidth capacitors to generate an overall capacitance that maintains the bandwidth of the system at a predetermined value.

Abstract: In a phase locked loop in which a phase detector compares an input signal to a reference signal and provides a difference signal to a charge pump or to a transconductance amplifier, a digital to analog converter is provided for connecting the output of the charge pump or transconductance amplifier to a voltage controlled oscillator whereby loop bandwidth can be increased from an operating value to an acquisition value for loop phase acquisition by changing the input to the DAC, thereby changing the amplification of the DAC.

Abstract: A method and system for increasing the efficiency of providing bandwidth for voice traffic to a data provider via asynchronous communication mediums is provided. This is generally accomplished by not transmitting any data during the silence periods and playing out background noise (i.e., comfort noise) at the other end, to obtain significant bandwidth savings.

Abstract: Provided is a system and method for converting digital data audio data audio data that has a predetermined input sample rate, into an analog data signal. A system includes a digital to analog converter (DAC) including a digital processing portion configured to receive as an input the digital audio data and timing information, the timing information being representative of a time base of the input sample rate. The digital processing portion is similarly configured to digitally process the digital audio data and the timing information to produce serialized output data. The DAC also includes an analog processing portion configured to convert serialized data to an analog format. The digital processing portion operates in accordance with at least one clock having a corresponding clock rate wherein the corresponding clock rate is unrelated to the input sample rate.

Abstract: A method of determining a start of a transmitted frame at a receiver on a frame-based communications network. A received transmitted frame is filtered using filter coefficients matched to a preamble symbol sequence to provide a correlation sequence. The correlation sequence is low-pass filtered and delayed to provide a delayed low-pass filtered correlation signal. The delayed low-pass filtered correlation signal is compared with the low-pass filtered correlation signal and a fixed predetermined threshold to provide a correlation difference indicator. Energy of the received transmitted frame is detected and the energy is low-pass filtered to provide a low-pass filtered energy signal. The low-pass filtered correlation signal is compared with the low-pass filtered energy signal to provide a correlation peak indicator. A logical-AND of the correlation difference indicator and the correlation peak indicator is formed to determine a match/no match comparison indicative of the start of a transmitted frame.

Abstract: Determination and processing for fractional-N programming values. The present invention is operable to receive a clock signal (CLK) and to transform that CLK into a new CLK, when necessary, for use by various circuitries within a system. The present invention is operable to generate two different CLKs for use by a radio frequency (RF) circuitry and a baseband processing circuitry in certain embodiments. The present invention employs a measurement circuitry and to characterize a first CLK and uses a fractional-N synthesizer to perform any necessary processing to generate the one or more CLKs to the other CLKs within the system. The first CLK may be received from an external source or it may be generated internally; in either case, the present invention is able to modify the CLK into another CLK for use by other circuitries within the system or for use by another external device.

Abstract: A method for preventing out-of-ordering of frames in a network switch, wherein the method includes the steps of receiving a first portion of a string of packets from a source port on a first port, transferring the first portion of the string of packets to a second port for transmission to a destination, and sending an indicator from the first port to the second port. The method further includes the steps of receiving the indicator at the second port, sending a response indicator from the second port to the first port, and receiving a second portion of the string of packets from the source port on a third port. Additionally, a method for preventing out-of-ordering of frames in network switch, wherein the method includes receiving packets on a first ingress port from a source port, transmitting the packets from the first ingress port to an egress port for transmission to a destination, and determining to switch the receiving of the packets to a second ingress port.

Abstract: Limit-cycle oscillations are caused by the compounding of quantization errors that occurs when previous digital filter outputs are used as inputs to the digital filter for the current operation. Where a signal in a digital waveform has become a constant common value applied to the input of the digital filter (indicative that the digital waveform has suspended conveyance of data), limit-cycle oscillations often appear as “random” outputs, with values different from the common value, that occur long after the signal in the digital waveform has become the constant common value. Limit-cycle oscillations are manifested as noise in the filtered digital waveform. Such noise hampers the ability of the system to extract the signal from the filtered digital waveform. The present invention identifies the occurrence of a limit-cycle oscillation as an output different from the common value. The identified limit-cycle oscillation is set equal to the common value.

Abstract: A first node includes a first cache and a plurality of coherent agents. In response to a transaction to a coherency block by a first coherent agent of the plurality of coherent agents, the first node is configured to fetch the coherency block from another node. The other node is configured to record a state in which the coherency block is provided to the first node. The first cache is designated to store the state of the coherency block recorded by the first node.

Abstract: A system may include two or more agents, at least some of which may cache data. In response to a read transaction, a caching agent may snoop its cached data and provide a response in a response phase of the transaction. Particularly, the response may include an exclusive indication used to represent both exclusive and modified states within that agent. In one embodiment, the agent responding exclusive may be responsible for providing the data for a read transaction, and may transmit an indication of which of the exclusive or modified state that agent had the data in concurrent with transmitting the data.