Abstract: A method of searching a plurality of Vector Quantization (VQ) codevectors for a preferred one of the VQ codevectors to be used as an output of a vector quantizer for encoding a speech signal, includes determining a quantized prediction residual vector, and calculating a corresponding unquantized prediction residual vector and the energy of the difference between these two vectors (that is, a VQ error vector).
Abstract: A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a descriptor-based packet processing mechanism for use in efficiently assigning and processing packets to a plurality of processors. A plurality of descriptors associated with each packet transfer are written back to memory in order, divided into subset groups and assigned to processors, where each processor searches the assigned subset for EOP and associated SOP descriptors to process.
Abstract: An RF MOS transistor having improved AC output conductance and AC output capacitance includes parallel interdigitated source and drain regions separated by channel regions and overlying gates. Grounded tap regions contacting an underlying well are placed contiguous to source regions and reduce distributed backgate resistance, lower backgate channel modulation, and lower output conductance.
Abstract: The motherboard comprises a CPU and a memory component; further at least one video data processing chip mounted to the motherboard wherein the video data processing chip is programmable; and further at least one additional memory component provided to store a software that is executable by the video data processing chip.
Abstract: A system, device and method are disclosed for predicting the opacity of primitives used to produce an image using one or more equations, prior to producing an image. More specifically, the present invention relates to a 3D device adapted to produce an image comprising an opacity estimate predictor adapted to predict opacity of at least one primitive using at least one first equation and further adapted to reject the primitive if the predicted opacity is equal to a minimum value.
Abstract: A squeezable tail current source for use in a differential operational amplifier is disclosed that regulates the current through a main input differential pair while preventing output distortion and allowing high linearity. The squeezable tail current source includes a first transistor pair that replicates a main input transistor pair, wherein both the first transistor pair and the main input transistor pair receive a common voltage input at their respective gates. The squeezable tail current source also includes a second transistor pair, a bias transistor, a first current source, a folding transistor, and a second current source that biases the folding transistor. These components are configured such that current through the main input transistor pair is maintained as the voltage input varies.
Abstract: One or more methods and systems of validating the operation of one or more register designs are presented. In one embodiment, the system utilizes a processor, an integrated circuit design simulator software, a storage media, a storage device, user interface, and a display. In one embodiment, the method includes executing a set of instructions operating on a register design parameter file to produce an output that is easily incorporated into the integrated circuit design simulator software. The output specifies one or more tests to be performed using the integrated circuit design simulator software. The one or more tests are subsequently performed to validate the register design. The method automates the incorporation of register design parameters into the integrated circuit design simulator software by way of executing a set of instructions that operates on the register design parameter file.
Abstract: A method for determining a peak value of a radio frequency (RF) signal begins by receiving an RF signal. The method continues by high pass filtering the RF signal to produce a first input. The method continues by rectifying the first input signal with respect to a rectifying input to produce a rectified signal. The method continues by low pass filtering the rectified signal to produce the peak value.
Abstract: A low-error fixed-width multiplier receives a W-bit input and produces a W-bit product. In an embodiment, a multiplier (Y) is encoded using modified Booth coding. The encoded multiplier (Y) and a multiplicand (X) are processed together to generate partial products. The partial products are accumulated to generate a product (P). To compensate for the quantization error, Booth encoder outputs are used for the generation of error compensation bias. The truncated bits are divided into two groups, a major least significant bit group and a minor least significant bit group, depending upon their effects on the quantization error. Different error compensation methods are applied to each group.
Type:
Grant
Filed:
August 30, 2002
Date of Patent:
December 20, 2005
Assignee:
Broadcom Corporation
Inventors:
Keshab K. Parhi, Jin-Gyun Chung, Kwang-Cheol Lee, Kyung-Ju Cho
Abstract: A processing pipeline with a plurality of pipeline stages is described, with the processing pipeline comprising a front end and a back end. The processing pipeline's front end comprises an array for storing at least two condition bits, said condition bits being adapted for indicating respective conditions. The front end is adapted for resolving conditional branch instructions by accessing said array of condition bits whenever a conditional branch instruction occurs, the respective branch instruction being resolved in accordance with a corresponding condition bit. In another embodiment, the condition bits are combined with predicated execution of instructions, with the instruction's predicates being evaluated at the processing pipeline's back end.
Abstract: A method for controlling a video stream bit rate while encoding a macroblock of a video stream having pictures comprising the step of using a quantiser_scale_code of the general form: quantiser—scale—code=ROUND(A+B(D+logC(MIN{VAR[luma—0], . . . ,VAR[luma—n]}))) with A being an adjustable gear shift parameter; and B being an adjustable gas pedal parameter; and [luma_n] being a nth luminance block of said macroblock; and D being a constant parameter depending on the encoded picture type.
Abstract: A system and method for removing impulsive noise from a digital signal are disclosed. The system and method determines either a neighborhood maximum and/or a neighborhood minimum for a pixel of interest. The intensity of the pixel of interest is then compared to the neighborhood maximum or the neighborhood minimum to determine whether the pixel of interest should be replaced.
Abstract: A video data processing device, such as a set-top box for satellite, DSL, or cable video and data services, has a USB 2.0 interface to support connections to local devices and networks. The interface is supported by drivers that provide data connectivity with the internal system bus of the data processing device, to support wired and/or wireless home networking with computers and other set-top boxes, data storage and retrieval on hard drives and other storage media, and other data transfer operations to support digital cameras, game ports, and printers.
Type:
Application
Filed:
June 9, 2004
Publication date:
December 15, 2005
Applicant:
Broadcom Corporation
Inventors:
Jonathan Kuo, Khanh Vu, Tony Turner, Joseph Fiorenza
Abstract: A system and method are disclosed for efficiently determining a prediction block for a current block of interest in a video signal encoding protocol. In a preferred embodiment, this is achieved by determining whether there is a correlation between the intra 4×4 predictions and the 16×16 prediction modes. If the correlation to the 16×16 prediction modes is lower than a predetermined threshold value, then the additional prediction blocks using 16×16 intra luma prediction are not calculated. If the correlation to the 16×16 prediction modes is higher than the predetermined threshold value, then the additional prediction blocks are calculated using 16×16 intra luma prediction. A cost function may then be used to determine the predicted bit cost of each prediction block, and the prediction block with the lowest cost may be selected as the prediction block for the current block of interest.
Abstract: A method and system, compatible with low-voltage CMOS technology, for controlling the charging of a battery. The method includes monitoring a battery voltage with respect to a threshold voltage. The method further includes coupling a charging control logic supply to ground, generating an active low first control signal, inverting the active low first control signal, and charging the battery at a first rate when the battery voltage is below the threshold voltage. The method further includes coupling the charging control logic supply to the battery voltage, generating an active high second control signal, and charging the battery at a second rate when the battery voltage exceeds the threshold voltage. The first charging rate is slower than the second charging rate. The method further includes supplying battery power to a charger line when the battery voltage exceeds the charger voltage, and suppressing a leakage current.
Abstract: A method of and device for performing a data expansion operation on a plurality of input data objects to generate expanded output data objects is disclosed. The method comprises receiving and decoding a data manipulation instruction defining a data expansion operation, a portion of the data manipulation instruction indicating an expansion operation from a number of predetermined types of data manipulation operations. The method includes generating one or more expansion objects responsive to the indication of an expansion operation, said expansion objects being for use in extending an input data object. The input data objects and said expansion objects are manipulated according to control information programmed to produce a set of expanded output data objects.
Abstract: An apparatus for a processor includes a first scoreboard, a second scoreboard, and a control circuit coupled to the first scoreboard and the second scoreboard. The control circuit is configured to update the first scoreboard to indicate that a write is pending for a first destination register of a first instruction in response to issuing the first instruction into a first pipeline. The control circuit is configured to update the second scoreboard to indicate that the write is pending for the first destination register in response to the first instruction passing a first stage of the pipeline. Replay may be signaled for a given instruction at the first stage. In response to a replay of a second instruction, the control circuit is configured to copy a contents of the second scoreboard to the first scoreboard. In various embodiments, additional scoreboards may be used for detecting different types of dependencies.
Type:
Grant
Filed:
February 4, 2002
Date of Patent:
December 13, 2005
Assignee:
Broadcom Corporation
Inventors:
Tse-Yu Yeh, David A. Kruckemyer, Randel P. Blake-Campos, Robert Rogenmoser, Robert Stepanian
Abstract: A method and system that allows the distribution of hot spare space across multiple disk drives that also store the data and redundant data in a fully active array of redundant independent disks, so that an automatic rebuilding of the array to an array of the identical level of redundancy can be achieved with fewer disk drives. The method configures the array with D disk drives of B physical blocks each. N user data and redundant data blocks are allocated to each disk drive, and F free blocks are allocated as hot spare space to each disk drive, where N+F<=B, and ((D?M)×F)>=N. Thus, rebuilding of data and redundant blocks of a failed disk drive in the free blocks of the remaining disk drives is enabled after M disk drive failures.
Abstract: A radio transceiver includes a charge pump formed within a local oscillator that adjusts a voltage input to a voltage-controlled oscillator in a manner that flattens a response curve for small changes in voltage due to a variety of effects including channel length modulation. Thus, a local oscillation tends to provide a greater degree of stability. More specifically, the charge pump of the transceiver includes a pair of feedback circuits that source an additional amount of current into a filter to slightly increase a voltage input to the voltage-controlled oscillator in response to small upward changes in output voltage levels (input with respect to the voltage-controlled oscillator). Similarly, when the output voltage level drops slightly, a second feedback circuit causes a small amount of current to be sinked from the output node thereby slightly decreasing the input voltage to the voltage-controlled oscillator.
Abstract: A method of controlling data sampling clocking of asynchronous network nodes, each asynchronous network node having a local clock and transmitting and receiving packets to and from an asynchronous network according to an asynchronous network media access protocol. An asynchronous network node capable of transmitting and receiving packets on the asynchronous network is designated as a master node. Each non-master asynchronous network node which desires to synchronously transport packets across the asynchronous network is designated as a slave node. A master node clock of the master node is synchronized with a slave node clock of each slave node. Each slave node clock is continuously corrected compared with the master node clock to smooth slave clock error to an average of zero compared with the master clock as a reference using timestamp information from the master node.
Type:
Grant
Filed:
April 4, 2001
Date of Patent:
December 13, 2005
Assignee:
Broadcom Corporation
Inventors:
Matthew James Fischer, Tracy D. Mallory