Abstract: A CMOS input level shifting circuit includes a temperature-compensating N-channel field effect transistor structure wherein a resistance in series with the source region includes an extension of a lightly doped P-type region in which the source and drain regions are diffused. This structure produces a temperature-compensating variation in the drain current proportional to the square of the series resistance without requiring modification of standard processes for manufacturing CMOS integrated circuits. The relatively large, temperature-dependent variation of the series resistance produces a corresponding temperature-dependent variation in the drain current that effectively temperature-compensates the switching point of the CMOS input level shifting circuit.

Abstract: A latching comparator has a signal input connected to the output of a device under test. A strobe input of the comparator has a strobe signal applied thereto, whereby the output of the device under test is repeatedly sampled. The output of the comparator drives an integrator, preferably through a filter. The output of the integrator drives a reference input of the comparator and a computer. The computer is driven via an A/D converter, whereby a digitized representation of the output of the device under test is provided to the computer.

Abstract: In the primary circuit of dc-to-dc converter or a dc-to-ac converter, transistor switching units are associated with two primary windings of a transformer. The transistor switching units each control the flow of current through an associated winding. The first transistor is activated by apparatus that alternatively applies and removes activation signals to the transistor and consequently allows conduction through the transistor and the associated winding. The second transistor receives activation signals from a third primary winding and causes conduction of current through the associated primary transformer winding. The activation signal from the third winding, causing the second transistor to be conductive, is the result of interruption of current in the first primary transformer winding. The activation signals produced by the third primary transformer winding is removed when the first transistor is activated and current is flows in the first primary winding.

Abstract: In view of the limited speed times accuracy product of A-to-D and D-to-A converters, a required digital accuracy or sufficiently smooth analogue waveform cannot always be obtained. The present invention is useful in enhancing available converters. In the A-to-D version a stepped interpolation waveform obtained from a generator 13 is added to samples of an analogue waveform obtained from a sample-and-hold circuit 11 at a frequency 2f.sub.B (where f.sub.B is the bandwidth of the input signal). The resultant signal is applied to an n-bit A-to-D converter 15 operating at 2.sup.m times 2f.sub.B and the converter output is averaged using an accumulator 16 reset at 2f.sub.B. The accumulator output is a higher accuracy signal since it has m+n bits. An analogous technique is described for D-to-A conversion.

Abstract: A serial-to-parallel converter receiving a clock signal and continuous serial stream of input data, each having TTL logic levels, produces parallel outputs for driving current switches of a digital-to-analog converter (DAC). The data and clock signals each are converted to ECL logic levels by a pair of emitter-coupled differential lateral PNP transistors having their collectors coupled to a pair of NPN current mirror circuits, the outputs of which drive the bases and emitters of a pair of NPN emitter follower transistors, resulting in very high bandwidth operation. Master-slave ECL shift register bit outputs are directly coupled, without emitter followers, to ECL inputs of output latches that drive the DAC current switches, resulting in substantially reduced power consumption and chip area.

Abstract: A 12 bit, 10 megahertz subranging analog-to-digital converter feeds a sampled analog input signal forward, without delay or attenuation, to a summing node. The sampled analog signal is converted by an MSB flash encoder to a 7 bit MSB word that is converted to an analog signal by a 7 bit DAC having 14 bit accuracy. The result is subtracted from the sampled analog signal to produce a residue signal. A MOSFET isolation switch coupled between the summing node and the input of a high speed amplifier isolates the amplifier until the residue signal is stable, to prevent overdriving of the amplifier. A positive error voltage is added to the reference voltage inputs of the MSB flash encoder to enable use of a digital error correcting circuit that does not need to operate on negative binary numbers.

Abstract: A subsurface zener diode is formed in an N.sup.- epitaxial region formed on a P type substrate. The N.sup.- epitaxial region is isolated by a P.sup.+ isolation region. An N.sup.+ buried layer region is disposed between a portion of the N.sup.- epitaxial region and the P type substrate. A first P.sup.+ region is formed in the middle of the N.sup.- epitaxial region at the same time as the P.sup.+ isolation regions. Second and third adjacent P.sup.+ regions also are formed in the N.sup.- epitaxial region adjacent to and slightly overlapping the first P.sup.+ region, all three P.sup.+ regions terminating at the N.sup.+ buried layer. An N.sup.+ region, formed during an emitter diffusion operation, has first and second opposed edges centered within the overlapping portions of the first, second, and third P.sup.+ regions. Two other opposed edges of the N.sup.+ region extend beyond the other edges of the first P.sup.+ region, forming N.sup.+N.sup.- contacts to the N.sup.

Abstract: A modular plug-in instrumentation system for enabling a personal computer to perform instrumentation functions, including receiving analog and digital signals from an external device and transmitting analog and digital signals to an external device, includes a carrier module pluggable into a bus of the personal computer, and also includes an internal instrumentation bus into which a plurality of different interchangeable instrument modules can be plugged. The instrumentation bus includes a digital portion, and also includes a segmented analog portion that is extendable merely by plugging instrumentation modules into bus connectors which span gaps between the analog bus segments. Analog and/or digital signals are communicated between various instrument modules and external devices by means of cables connected to the instrument modules.

Abstract: A pressure sensing device including a single crystal of silicon configured to have a diaphram portion, a frame portion and associated circuitry formed on the crystal is described. Piezo-resistive elements on the boundary of the frame and the diaphram portions of the crystal responds to changes in pressure. The piezo-resistive elements, associated elements, and connecting conducting paths are formed by thin film and/or doping techniques to provide a monolithically integrated circuit. The elements are passive and require only application of input voltages and detection of output signals to provide an operative component. Trimmable resistors are provided for compensation and resistive adjustment, and at least one resistive element provides temperature compensation.

Abstract: A housing for a remote interface unit is shown. The housing has a geometry to be appropriate for use with a small data processing system. The housing contains an upper and lower sections that permit convenient assembly and disassembly and, when assembled are securely fastened together with only two coupling units, such as screws. Expansion modules can be coupled to or removed from the unit circuit board without the use of tools, and typically with only one hand.

Abstract: A high voltage constant current source circuit includes first transistor biased as a constant current source and a second transistor connected in series with the first transistor. The second transistor has a punch-through voltage that is substantially less than any breakdown voltage of the second transistor. The emitter of the second transistor is connected to the collector of the first transistor. The collector of the second transistor supplies the constant current, provides an increased high output impedance, and allows low voltage operation if the collector-to-emitter voltage of the second transistor is less than its punch-through voltage. If its punch-through voltage is exceeded, that punch-through voltage adds to the collector-to-emitter breakdown voltage of the first transistor, allowing high voltage operation.

Abstract: A digital audio system for high-fidelity replication of wideband audio material. The system comprises a high-speed, low-noise and low-distortion, digital-to-analog converter including means for reducing spurious switching currents in the reconstructed audio signal. Such a converter is employed in both the encoding and decoding portions of the system.

Abstract: An integrated circuit digital-to-analog converter includes a nichrome feedback resistor having .+-.1% accuracy in its output amplifier, a plurality of bit current determining resistors that have .+-.30% manufacturing accuracy, a bias voltage circuit that produces a temperature-compensated bias voltage including an integrated potentiometer that is laser trimmed to compensate for the inaccuracy of the bit current determining resistors. The bit current determining resistors thereby produce constant, precise temperature-independent bit currents. The integrated potentiometer is accurately laser trimmed without changing the series resistance of the potentiometer. This prevents current density changes that change the temperature sensitivity of temperature-compensating elements in the bias voltage circuit.

Abstract: In a circuit including a differential amplifier, a switching device is coupled to the input terminals of the differential amplifier for periodically applying signals thereto. A second switching device is coupled to the output terminals of the differential amplifier and is synchronized with the switching device coupled to the input terminal. By providing an output signal that is constructed from signals amplified in an inverted and non-inverted mode of the differential amplifier, sources of noise and drift-related errors can be minimized.

Abstract: A sampling digitizer system which may be expanded for the dynamic testing of high speed data conversion components is provided. The system includes latching comparators which are supplied with the waveform under test and the comparator digital output is integrated by an operational amplifier integrator and fed back to the reference input of the latching comparator to form a comparator-integrator loop. A circuit provides strobe pulses which repeatedly sample the latch enable input of the comparators at a selected time/point until the integrator feedback forces the comparator reference input to be equal to the sample value of the input signal. At this point, an equilibrium state is reached where the integrator output oscillates about the sampled value, and when the loop settles, an analog-to-digital converter reads the final value under computer command. The sample point is computer controlled through a programmable delay line.

Abstract: Method and apparatus for minimizing unpredictable sources of noise, or error voltages, at the microvolt level in precision analog components such as operational amplifiers is described. Sources of such error voltages are temperature gradients across the dice of the precision components enclosed in a hermetically sealed package, thermoelectric voltages caused by temperature differences between junctions of leads of the package with other metals, and light reflected from the substrate through the glass seals around the leads in the base of such packages. A skirted heat sink is positioned in thermal contact with the sides of the package which package is mounted on a substrate. The heat sink transfers heat from the heat sink to its ambient environment by radiation and convection to maintain the temperature within the package substantially constant.

Abstract: A sample and hold circuit includes a high gain, low drift closed loop operational amplifier that isolates the sampling capacitor and provides low output impedance, and a low, stable, input offset voltage and very high bandwidth. The operational amplifier includes N-channel FET source followers coupled by balanced bias and level shifting circuitry to an NPN differential amplifier stage. Symmetrical, buffered cross-coupling from each of the source follower FETs to the opposite level shifting circuitry increases the amplification thereof and results in low DC offset voltage, high input impedance, and high gain and bandwidth.

Abstract: In view of the limited speed times accuracy product of A-to-D and D-to-A converters, a required digital accuracy or sufficiently smooth analogue waveform cannot always be obtained. The present invention is useful in enhancing available converters. In the A-to-D version a stepped interpolation waveform obtained from a generator 13 is added to samples of an analogue waveform obtained from a sample-and-hold circuit 11 at a frequency 2f.sub.B (where f.sub.B is the bandwidth of the input signal). The resultant signal is applied to an n-bit A-to-D converter 15 operating at 2.sup.m times 2f.sub.B and the converter output is averaged using an accumulator 16 reset at 2f.sub.B. The accumulator output is a higher accuracy signal since it has m+n bits. An analogous technique is described for D-to-A conversion.

Abstract: An isolation amplifier circuit is described that utilizes a magnetic field in combination with a Hall effect device to isolate input signals and output signals. The input signal is applied to a conducting coil that produces a magnetic field in a Hall effect material through which current is flowing. Because of the Hall effect, terminals on the sides of the Hall effect material can provide a voltage difference. This voltage difference is amplified and applied to a second conducting coil. The second conducting coil is adapted to provide a magnetic field in the opposite direction from the magnetic field produced by the input signal. When the magnetic fields are identical, no difference in current flowing through the two terminals will be present. The output signal of the difference amplifier circuit will be a function of the input signal. According to a second embodiment, apparatus is included for cancelling ambient magnetic fields.

Abstract: A low voltage sixteen bit digital-to-analog converter operable between +5 and -5 volt power supplies and capable of providing output voltage levels to within about 1.4 volts of +V.sub.CC and -V.sub.CC includes a push-pull output stage with only a pullup transistor and a pulldown transistor connected in series between the positive and negative supply voltages. The output stage includes circuitry that reduces the base voltage of the pullup transistor or pulldown transistor enough to reduce its collector current to near zero, greatly increasing its effective collector-to-emitter breakdown voltage.