Abstract: Active stylus operation when there is no physical connection between the stylus and the touch array requires communication and synchronization. It is possible to use the touchscreen stack-up itself to communicate synchronization signals or other information optically by outfitting the active stylus with an optical receiver and transmitting signals either with additional diodes or by modulating the display clock itself.

Abstract: A method and apparatus determine a difference value, the determined difference value reflecting a difference between a plurality of presence values. In an embodiment, the method and apparatus perform an operation associated with the plurality of presence values, based on the determined difference value.

Abstract: A verification circuit for a capacitor power supply measures at least two voltages across the terminals of the capacitor at two points in time, the two points in time defining a time interval dT. A change in voltage dV over the time interval dT is determined. An operation powered by the capacitor is initiated, or not, by deriving from the time interval dT and/or the voltage change dV, a total required time or a total required voltage for completing the operation, and comparing the total required time or total required voltage to a pre-determined necessary total time or predetermined necessary total voltage, respectively (a “time interval test”).

Abstract: A circuit is configured to supply a first gate voltage (PG1) at a first voltage bias (VP1) to a source of a first transistor providing an output (WLS), providing the first voltage bias (VP1) to a second transistor and supplying a second voltage bias (VN1) and a second gate voltage (NG1) to a third transistor, the second transistor coupled in series to the third transistor and in parallel with the first transistor, to supply a third voltage bias (VP2) and a third gate voltage (PG2) to a fourth transistor, and a fourth voltage bias (VN2) and a fourth gate voltage (NG2) to a fifth transistor, the fourth transistor coupled in series to the fifth transistor, and the fourth and fifth transistors coupled to a gate of the second transistor, and to provide a fifth voltage bias (VN3) to a line connecting the third transistor to the fifth transistor.

Abstract: A capacitance sensing system can include at least a first conductive pattern formed on a first surface of a housing of an electronic device; and a capacitance sensing circuit electrically connected to the first conductive pattern.

Abstract: A controller for optical transducers uses stochastic signal density modulation to reduce electromagnetic interference.

Abstract: Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.

Abstract: A method for emulating and debugging a microcontroller is described. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.

Abstract: An optical navigation system is provided to sense relative movement between the system and a surface. Generally, the system includes: (i) an illuminator having a light source to illuminate a portion of the surface; (ii) a detector to receive light reflected from the portion of the surface; and (iii) an enclosure enclosing the illuminator and the detector, the enclosure having a window covering the detector and through which light reflected from the portion of the surface is transmitted to the detector, the window being substantially transparent to at least one wavelength of light emitted by the light source. In certain embodiments, the window is a filter-window that is substantially non-transparent to light from other sources, such as ambient light, having shorter or longer wavelengths. Other embodiments are also described.

Abstract: A system and method is provided for hot de-latch of a parasitic device in an integrated circuit (IC) that restores the IC to normal operation without de-powering the IC or resulting in a loss of data. In one embodiment the method, includes reducing a voltage supplied to at least a portion of the IC from a normal operation voltage to a de-latch voltage for a time to de-latch the parasitic device without de-powering the IC. Other embodiments are also disclosed.

Abstract: A process of operating a memory circuit involves RECALLing a state of a volatile memory cell from a nonvolatile memory cell, and inverting an output of the volatile memory cell after every other RECALL.

Abstract: A driver circuit, and light emitting system and method are provided. The driver circuit includes possibly a controller and a phase detector coupled to produce an intermittent output proportional to a value of an input relative to upper and lower threshold values, and a difference between the input signal, which is the intermittent output signal, and a reference value. The light emitting system can include a switch and at least one light emitting device coupled to the switch. The driver circuit can be coupled to forward the intermittent output signal to the switch that is active in proportion to current level through the light emitting device, rising and falling between the modifiable upper and lower threshold values.

Abstract: A method and apparatus varying, by interval, a frequency of a drive signal applied to one electrode of each of a plurality of electrode pairs, select a frequency corresponding to the frequency of the drive signal, monitor changes in capacitance of each of the electrode pairs through receive signals at the selected frequency, from the other electrode of each of the plurality of electrode pairs; and determine a position of at least two objects, which are simultaneously on a touch device, according to the monitored capacitance changes.

Abstract: Identification of at least one of a plurality of possible touch locations as an actual touch location may include detecting a plurality of possible touch locations at a touch sensing surface, wherein detecting the plurality of possible touch locations comprises performing a resolve scan of at least a first sensor element at the touch sensing surface, where the first sensor element corresponds to at least a first coordinate of the plurality of coordinates.

Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element. Multiple state-monitoring memory elements may be disturbed in different locations on the IC for better coverage.

Abstract: A serial interface device includes multiple serial link connections that receive at least address values and at least one error detection code (EDC) on different serial link connections, the EDC generated from at least the address values, the serial link connections for the address values and EDC operated separately from one another; and multiple output serial links, at least a first one of the output serial links outputting data values read from memory locations corresponding to the address values, and at least a second one of the output serial links different from and operated separately from the first one outputting EDC values generated for the data values read from the memory locations.

Abstract: A circuit including a first pin connection, a second pin connection, a first diode-switch arrangement and a second diode-switch arrangement. The first diode-switch arrangement is connected in series and configured to allow a current to pass from the second pin connection to the first pin connection. The second diode-switch arrangement is connected in series and configured to allow a current to pass from the first pin connection to the second pin connection. An energized state of the first and second diode-switch arrangements is determined according to a voltage detected on the first or second pin connection.

Abstract: A method and apparatus to program data into a row of a non-volatile memory array and verify, internally to the non-volatile memory array, that the data was successfully programmed. The verification includes comparing the programmed data from the row of the non-volatile memory array to data in the plurality of high voltage page latches that were used to program the row.

Abstract: At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port.

Abstract: Flash memory devices and systems are provided. One flash memory device includes an n-channel metal oxide semiconductor field-effect transistor (nMOSFET), a silicon-oxide-nitride-oxide silicon (SONOS) transistor coupled to the nMOSFET, and an isolated p-well coupled to the nMOSFET and the SONOS transistor. A flash memory system includes an array of memory devices divided into a plurality of paired sectors, a global bit line (GBL) configured to provide high voltage to each respective sector during erase and program operations coupled to each of the plurality of sectors, and a plurality of sense amplifiers coupled between a respective pair of sectors. Methods for operating a flash memory are also provided. One method includes providing high voltage, via the GBL, to the paired sectors during erase and program operations and providing low voltage, via a local bit line, to each memory device during read operations.