Abstract: A memory device can include a random access memory array configured to store data values; a plurality of bi-directional ports, configured to transfer data values into and out of the memory device on rising and falling transitions of at least one access clock signal; and at least one address bus configured to receive at least a portion of address values to random access locations on rising and falling transitions a timing clock signal having the same frequency as the access clock signal.

Abstract: Embodiments described herein provide methods, devices, and systems for a touch sensor, or capacitive sensing device, interact with external objects. One method utilizes a capacitive profile on the external object. Another method involves the use of a capacitive sensor array for wireless communication.

Abstract: A method and apparatus to determine capacitance variations of a first number of two or more sense elements of a touch screen device. A processing device is configured to detect a presence of a conductive object on any one of a second number of three or more button areas of the touch screen device. The first number of sense elements is less than the second number of button areas. The processing device is further configured to recognize an activation of one of the three or more button areas using the determined capacitance variations of the first number of two or more sense elements.

Abstract: Disclosed is a non-volatile, ferroelectric random access memory (F-RAM) device and a method for fabricating a damascene self-aligned F-RAM that allows for the formation of a ferroelectric capacitor with separated PZT layers aligned with a preexisting, three dimensional (3-D) transistor structure.

Abstract: One embodiment in accordance with the invention can include a circuit for controlling a light emitting diode (LED) lighting fixture via a power line. The circuit can include a power switch coupled to the power line and is for outputting a firing angle. Additionally, the circuit can include a control circuit coupled to the power switch and is for implementing firing angle control of the power switch. Furthermore, the circuit can include a translator coupled to receive the firing angle and for mapping the firing angle to a function of the LED lighting fixture.

Abstract: An example wireless device includes a radio receiver to measure a signal quality of a data signal independent of a direct frequency measurement, the signal quality correlated to an offset between a transmitter reference frequency and a receiver reference frequency but not indicative of a direction of the offset. The example wireless device further includes a reference frequency generator to determine from the measured signal quality that a previous adjustment to the receiver reference frequency in a first direction has worsened the signal quality, and responsive to that determination adjust the receiver reference frequency in a second direction that is opposite to the first direction.

Abstract: Disclosed is a non-volatile, ferroelectric random access memory (F-RAM) device and a method for fabricating the same in the form of a damascene self-aligned F-RAM device comprising a PZT capacitor built on the sidewalls of an oxide trench, while allowing for the simultaneous formation of two ferroelectric sidewall capacitors.

Abstract: A method, system and apparatus is described for measuring a sensor, comparing measured values of a sensor to a reference value, adjusting a calibration parameter in response to the comparing of measured values to a reference value and determining sensor integrity based on the value o the adjusted parameter.

Abstract: A system includes a plurality of datapaths, each having structural arithmetic elements to perform various arithmetic operations based, at least in part, on configuration data. The system also includes a configuration memory coupled to the datapaths, the configuration memory to provide the configuration data to the datapaths, which causes the datapaths to collaborate when performing the arithmetic operations.

Abstract: A photodiode pixel sensor is provided having a buried region of opposite conductivity type than a semiconductor substrate in which the sensor is formed. The photodiode pixel sensor further includes a well region arranged upon and in contact with an upper surface of the buried region and a collection-junction extending into the well region. The well region and collection-junction are of the same conductivity type as the buried region and include greater net concentrations of dopants than the buried region and the well region, respectively. Such a configuration creates a drift field to channel (i.e., funnel) charge to the collection-junction. In some cases, the collection-junction may be a drain region of a transistor spaced above the buried region. An imaging device is also provided which includes at least two adjacent photodiode pixel sensors each including the aforementioned architecture isolated from each other by a distance less than approximately 2.0 microns.

Abstract: An apparatus includes a contact grid array disposed on a substrate in a non-orthogonal row-column format with connection elements arranged in a hexagonal configuration. The contact grid array has an orientation based, at least in part, on an area available for the contact grid array on the substrate. A method to determine the orientation of the contact grid array includes identifying the area available for a contact grid array on a substrate and determining the orientation for the contact grid array based, at least in part, on the area available for the contact grid array on the substrate.

Abstract: Embodiments of a method of integration of a non-volatile memory device into a MOS flow are described. Generally, the method includes: forming a dielectric stack on a surface of a substrate, the dielectric stack including a tunneling dielectric overlying the surface of the substrate and a charge-trapping layer overlying the tunneling dielectric; forming a cap layer overlying the dielectric stack; patterning the cap layer and the dielectric stack to form a gate stack of a memory device in a first region of the substrate and to remove the cap layer and the charge-trapping layer from a second region of the substrate; and performing an oxidation process to form a gate oxide of a MOS device overlying the surface of the substrate in the second region while simultaneously oxidizing the cap layer to form a blocking oxide overlying the charge-trapping layer. Other embodiments are also disclosed.

Abstract: System and method for optimizing the consumption of power while maintaining performance in capacitive sensor arrays. A limited sensing area is used to improve the update rate and sensitivity of a row/column array of capacitive sensors. According to one embodiment, a method is provided for scanning a plurality of capacitive sensors by: detecting a stimulus in the field of capacitive sensors, scanning the field of capacitive sensors to determine the position of the stimulus. Once the position of the stimulus is determined, a subsection of the field comprising window corresponding to the position of the stimulus remains activated while the remaining sensors in the field are deactivated.

Abstract: A processing circuit may include a command source that receives at least one feature input control signal for a lighting fixture; and an adaptive filtering mechanism that generates a filtered control signal in response to the input control signal, wherein the adaptive filtering mechanism varies a filter function in response to at least a temporal state of the input control signal.

Abstract: A system and method are provided for configuring a programmable integrated circuit including a number of function blocks. In one embodiment, the system includes a programmable integrated circuit including a number of function blocks, and a host computing device to configure the number of function blocks to perform a number of functions. The host computing device utilizes a graphical user interface to provide specification of configuration parameters of the function blocks, and the graphical user interface updates a given configuration parameter if a value of the given configuration parameter is affected by a value specified for another configuration parameter. Other embodiments are also provided.

Abstract: A system comprising a sensing device and a capacitive sense array configured to track the position of a stylus and synchronize the capacitive sense array to the stylus transmit signal. The system is configured to track the position of both a stylus and a passive touch object. The system is further configured to track the position of the stylus using self capacitance sensing and track the position of the passive touch object using mutual capacitance sensing. The system further configured to modulate the stylus transmit signal to include additional data to support additional stylus functions.

Abstract: A system comprises a processing device, a signal generator to generate a first signal and a single receiver to receive a second signal from a capacitive sense array. The single receiver is configured to process the second signal for stylus sensing of a stylus proximate to the capacitive sense array in a first mode of operation and to process the second signal for touch sensing of a passive touch object proximate to the capacitive sense array in a second mode of operation. The second signal is unsynchronized with the first signal.

Abstract: A switch circuit and method is described. In one embodiment, the switch circuit is configured to couple each of a plurality of plurality of capacitive sense elements and a plurality of capacitance sensors in different modes. In a first mode, the switch circuit is configured to couple each of the plurality of capacitance sensors to a group of two or more of the plurality of capacitive sense elements. In a second mode, the switch circuit is configured to couple the plurality of capacitance sensors to individual ones of the two or more of the plurality of capacitive sense elements in one of the groups.

Abstract: An embodiment includes configuring a current-limiting device to place along a power-supply bus to limit current through a first complimentary-metal-oxide semiconductor (CMOS) circuit coupled to the power-supply bus so that current does not exceed a trigger current level of a pnpn diode in a second CMOS circuit coupled to the power bus.

Abstract: A system and apparatus are described for providing greater flexibility and performance in a mixed-signal array through improved and highly configurable routing, control elements and signal processing capabilities.