Patents Assigned to Cypress Semiconductor
  • Patent number: 8565693
    Abstract: A method and apparatus receive first input through a touch screen and communicate over a cellular network responsive to the first input. The method and apparatus receive second input through the touch screen and use the second input to control, through a wireless network other than the cellular network, an image displayed on a screen of a second device.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: October 22, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Browley Xiao
  • Patent number: 8558578
    Abstract: A programmable input/output circuit includes a programmable output circuit configured to drive an output signal to an input/output pad at a plurality of voltages, at least one of the plurality of voltages being supplied by an external circuit. The programmable input/output circuit further includes a programmable input configured to detect an input signal from the input/output pad at the plurality of voltages. The voltage levels of the input and output circuits may be independently and dynamically controllable.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: October 15, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Timothy J. Williams, David G. Wright, Gregory J. Verge, Bruce E. Byrkett
  • Patent number: 8559262
    Abstract: A verification circuit for a capacitor power supply measures at least two voltages across the terminals of the capacitor at two points in time, the two points in time defining a time interval dT. A change in voltage dV over the time interval dT is determined. An operation powered by the capacitor is initiated, or not, by deriving from the time interval dT and/or the voltage change dV, a total required time or a total required voltage for completing the operation, and comparing the total required time or total required voltage to a pre-determined necessary total time or predetermined necessary total voltage, respectively (a “time interval test”).
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: October 15, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Srikanth Reddy Tiyyagura, David Still, Jayant Ashokkumar, David G Wright
  • Patent number: 8558163
    Abstract: An optical navigation system and method are provided. In one embodiment, the system includes: (i) a coherent light source to emit light to illuminate a portion of a finger; and (ii) a detector to receive light reflected from the portion of the finger, the detector including a speckle-based sensor configured to sense movement of the finger relative to the detector based on changes in a complex interference pattern created by the light reflected from the portion of the finger. Other embodiments are also described.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: October 15, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Harold Zarem
  • Patent number: 8558497
    Abstract: A method and apparatus to drive a load using a pulse-width modulated (PWM) signal and spread a spectrum of the PWM signal across a plurality of frequencies while maintaining a constant duty cycle for the load.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: October 15, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G. Wright
  • Publication number: 20130265089
    Abstract: Circuits, systems, and methods for starting up analog devices are provided. One circuit includes an output node at an output voltage (VOUT), a comparator configured to be coupled to a reference voltage (VREF), a feedback loop coupling the output node to the comparator, and a turbo circuit coupled between the output and the output node. The turbo circuit is configured to increase VOUT, the comparator is configured to compare VOUT and VREF, and the turbo circuit is enabled and disabled based on the comparison of VOUT and VREF. One system includes an analog device coupled to the above circuit. A method includes enabling the startup portion to start up the driver portion when VOUT is outside a predetermined voltage of VREF, disabling the startup portion when VOUT is within the predetermined voltage, and enabling the driver portion to drive the analog device subsequent to disabling the startup portion.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 10, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: GARY MOSCALUK
  • Patent number: 8555032
    Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 8, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Warren Snyder
  • Patent number: 8555011
    Abstract: A method of and apparatus for arbitrating a memory access conflict to a memory array. The apparatus may include selection logic coupled with a plurality of ports and a memory array to arbitrate among a plurality of contending memory access requests and to conditionally block write data from accessing the memory array when write data arrives late in time.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: October 8, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Rishi Yadav
  • Patent number: 8552515
    Abstract: Disclosed is a novel non-volatile, ferroelectric random access memory (F-RAM) device and a method for fabricating a damascene self-aligned F-RAM device structure on a planar surface using a reduced number of masks and etching steps.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: October 8, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Shan Sun, Thomas E. Davenport, John Cronin
  • Patent number: 8547336
    Abstract: An optical navigation system and method are provided. In one embodiment, the method includes: (i) generating for a first group of photosensitive elements a first quasi-sinusoidal signal at a first time, and a second quasi-sinusoidal signal at a second time in response to motion of light received thereon in a first direction; (ii) computing from the first and second quasi-sinusoidal signals a phase angle change; and (iii) computing from the first and second quasi-sinusoidal signals a radius value. Other embodiments are also described.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: October 1, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Yansun Xu, Brian Todoroff
  • Patent number: 8547135
    Abstract: A self-modulated voltage reference circuit may generate a reference voltage by receiving an internal reference voltage of a programmable device at a first input of a comparator block of the programmable device, receiving a feedback voltage at a second input of the comparator block, generating a pulse density modulated (PDM) signal based on a difference between the reference voltage and the feedback voltage, outputting the PDM signal at a digital output pin of the programmable device, and filtering the PDM signal to generate the output reference voltage.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: October 1, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Archana Yarlagadda, Dave Van Ess, Jeffrey Dahlin
  • Patent number: 8547118
    Abstract: An apparatus includes multiple capacitive sensing elements coupled through a filter network. The apparatus can include a control device configured to excite the capacitive sensing elements with different scanning frequencies and determine capacitances corresponding to each of the capacitive sensing elements based on sensor responses to the excitation of the capacitive sensing elements with the different scanning frequencies and a configuration of the filter network.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: October 1, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Santhosh Kumar Vojjala, Vibheesh Bharathan, Sai Prashanth Chinnapalli, Jijeesh Choorakottayil Gopinathan, Edward Grivna, David G. Wright
  • Patent number: 8547114
    Abstract: An apparatus and method for converting a capacitance measured on a sensor element to a digital code. The apparatus may include a switching capacitor as a sensor element of a sensing device, and a sigma-delta modulator coupled to the sensor element to convert a capacitance measured on the sensor element to a digital code. The switching capacitor is in a feedback loop of the sigma-delta modulator. The method may include measuring a capacitance on a sensor element of a sensing device using a sigma-delta modulator, and converting the capacitance measured on the sensor element to a digital code.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: October 1, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Viktor Kremin
  • Publication number: 20130249314
    Abstract: Systems and methods for switching between voltages are provided. One system includes an output, first and second switches coupled to the output. The system also includes a first transmission gate coupled to the first switch and a second transmission gate coupled to the second switch. One method includes receiving, at the first transmission gate, a first pair of complementary voltages and receiving, at the second transmission gate, a second pair of complementary voltages. The method further includes selecting the smallest voltage amongst both pairs of complementary voltages and outputting a third pair of complementary voltages. In one method, the first pair of complementary voltages includes a first negative voltage and a positive voltage, the second pair of complementary voltages includes a second negative voltage and the positive voltage, and the third pair of complementary voltages includes the smaller of the first and second negative voltages and the positive voltage.
    Type: Application
    Filed: March 26, 2012
    Publication date: September 26, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Ashish AMONKAR, Leonard GITLAN
  • Patent number: 8541727
    Abstract: A circuit and method are provided to control the strength of signals from an array of photo-detectors (PDs) in an optical navigation sensor. The circuit includes a number of transimpedance-amplifiers (TIAs) each coupled to an output of at least one PD to receive a current signal therefrom and generate a signal in response thereto. A controller coupled to outputs of the TIAs receives the signals and executes an algorithm to adjust gain of a signal processor coupled to the array. In one embodiment, the signal processor includes differential transimpedance-amplifiers (DIFF-TIAs) each including inputs coupled to receive current signals from the array, and the controller outputs a control signal to adjust a time over which the DIFF-TIAs and the TIAs integrate the current signals. Optionally, the signal processor includes gain-amplifiers coupled to the DIFF-TIAs and TIAs, and the controller outputs a signal to adjust gain thereof.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 24, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Yansun Xu, Steven Sanders, Jahja Trisnadi
  • Patent number: 8542514
    Abstract: A memory structure and method to fabricate the same is described. The memory structure includes a first memory cell having a first pair of non-volatile portions. The memory structure also includes a second memory cell having a second pair of non-volatile portions. The first and second pairs of non-volatile portions are disposed in an inter-locking arrangement.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 24, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Sethuraman Lakshminarayanan, Myongseob Kim
  • Patent number: 8542541
    Abstract: In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: September 24, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Ryan T. Hirose, Fredrick Jenne, Vijay Srinivasaraghavan, Igor G. Kouznetsov, Paul Fredrick Ruths, Cristinel Zonte, Bogdan Georgescu, Leonard Vasile Gitlan, James Paul Myers
  • Patent number: 8541728
    Abstract: A circuit and method are provided to control the strength of signals from an array of photo-detectors in an optical navigation sensor. In one embodiment, the method includes receiving a current signal from an automatic gain control (AGC) photo-detector and generating an AGC signal in response thereto; generating an illumination control signal in response to the AGC signal; and coupling the illumination control signal to an illuminator configured to illuminate at least a portion of an array of photo-detectors with light reflected from a surface to sense displacement of the optical navigation sensor relative to a surface, and adjusting illumination from the illuminator. Other embodiments are also disclosed.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: September 24, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Yansun Xu, Steven Sanders, Jahja Trisnadi
  • Patent number: 8543628
    Abstract: A system comprises a system interface to receive one or more instruction sets from a microcontroller and to receive digital data to be processed. The system further comprises a controller that is reconfigurable according to the one or more instruction sets received by the system interface. The system further comprises a data path device to perform digital filtering operations on the digital data as directed by the controller according to the reconfiguration of the controller by the one or more instruction sets.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: September 24, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Monte Mar
  • Publication number: 20130241630
    Abstract: An apparatus may include an internal charge pump within an integrated circuit package, an external pin positioned at an exterior of the integrated circuit package, and a select circuit configured to operate independently from the internal charge pump and located within the integrated circuit package, wherein the select circuit is configurable to selectively couple at least one of the internal charge pump and the external pin to a transmit (TX) sensor electrode.
    Type: Application
    Filed: June 28, 2012
    Publication date: September 19, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Hans Klein, Edward Grivna, Daniel O'Keeffe