Patents Assigned to Cypress Semiconductor
  • Output buffer circuit
    Patent number: 8373455
    Abstract: An output driver circuit can include at least a first driver transistor having a source-drain path coupled between a first power supply node and an output node. A first variable current supply can generate a current having at least one component that is inversely proportional to a power supply voltage. A first driver switch element can be coupled in series with the first variable current supply between a gate of the at least first driver transistor and a second power supply node.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: February 12, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Alan McLaughlin, Gabriel Li
  • Watchdog timer with mode dependent time out
    Patent number: 8375258
    Abstract: A method and apparatus to operate a watchdog timer having a first time out period in a processing system. The watchdog timer receives an indication of a change in a mode of operation in the processing system. In response to the change in the mode of operation of the processing system, the watchdog timer changes the time out period to a second time out period corresponding to the new mode of operation.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: February 12, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, David G. Wright
  • System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
    Patent number: 8370791
    Abstract: A system and method for graphically displaying modules and resources within a chip design software application. The system and method provide a data driven model for matching the hardware resource requirements for an associated user module and the available hardware resources on an underlying chip. Databases are utilized to describe the hardware resource requirements which are dictated by the particular user module and the available hardware resources of a particular chip. The user module descriptive database can be updated in response to additional user modules being added or changes to the hardware resource requirements of existing user modules. The hardware description database can be updated in response to additional chips being added. Further, the graphical interface relates both a user module and the possible hardware resource.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: February 5, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Frederick R. Hood
  • Busy detection logic for asynchronous communication port
    Patent number: 8370543
    Abstract: An embodiment of the present invention is directed to a system for synchronizing independent time domain information. The synchronization of the device resource access information allows a memory access device to reliably access memory in a time domain independent of a device issuing requests. The system may synchronize device resource information for requests made by a processor to access (e.g., read/write) locations of a memory device. The present invention synchronizes the device access information without restricting pulse width of a read/write signal or requiring a high speed clock.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: February 5, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Syed Babar Raza, Pradeep Bajpai
  • Current compensation scheme for LED current control
    Patent number: 8362706
    Abstract: Disclosed herein is an apparatus and method to control a current through one or more Light Emitting Diode (LED) circuits, wherein a control command compensation unit generates a compensation function to offset errors in the LED circuit by modifying a temporal density modulation function.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: January 29, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Kedar Godbole
  • USB port connected to multiple USB compliant devices
    Patent number: 8364870
    Abstract: At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: January 29, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hans Van Antwerpen, Herve Letourneur
  • QUADRATURE SIGNAL RECEIVER USING SYNCHRONIZED OSCILLATOR
    Publication number: 20130021291
    Abstract: A system comprises a processing device, a signal generator to generate a first signal and a single receiver to receive a second signal from a capacitive sense array. The single receiver is configured to process the second signal for stylus sensing of a stylus proximate to the capacitive sense array in a first mode of operation and to process the second signal for touch sensing of a passive touch object proximate to the capacitive sense array in a second mode of operation. The second signal is unsynchronized with the first signal.
    Type: Application
    Filed: March 29, 2012
    Publication date: January 24, 2013
    Applicant: Cypress Semiconductor Corporation
    Inventors: Viktor Kremin, Ruslan Omelchuk, Mykhaylo Krekhovelskyy, Milton Ribeiro
  • Memory device and method
    Patent number: 8358557
    Abstract: A method of accessing a memory device multiple times in a same time period can include, in a first sequence of accesses, starting an access operation to one of a plurality of banks in synchronism with a first part of a first clock cycle and starting an access operation to another of the plurality of banks in synchronism with a second part of the first clock cycle, each bank having separate access circuits; and the time between consecutive accesses is faster than an access speed for back-to-back accesses to a same one of the banks; wherein during the access operations, storage locations of each bank are accessed in a same time period.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: January 22, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Joseph Tzou, Thinh Tran, Jun Li
  • Methods and circuits for measuring mutual and self capacitance
    Patent number: 8358142
    Abstract: A capacitance measurement circuit for measuring self and mutual capacitances may include a first electrode capacitively coupled with a second electrode, a first plurality of switches coupled with the first electrode, and a second plurality of switches coupled with the second electrode, wherein, during a first operation stage, the first plurality of switches is configured to apply a first initial voltage to the first electrode and the second plurality of switches is configured to apply a second initial voltage to the second electrode, and wherein, during a second operation stage, the first plurality of switches is configured to connect the first electrode with a measurement circuit, and the second plurality of switches is configured to connect the second electrode with a constant voltage.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: January 22, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Andriy Maharyta
  • Programmable microcontroller architecture(mixed analog/digital)
    Patent number: 8358150
    Abstract: A circuit formed in an integrated circuit (chip) is disclosed. The circuit can include a plurality of analog circuit blocks each configured to provide at least one analog function; at least one digital circuit block that provides a digital function; and a programmable interconnect coupled to the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another. The programmable interconnect can include a plurality of multiplexer (MUX) circuits including port MUX circuits coupled between the analog circuit blocks and ports that provide signal connections for the chip.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: January 22, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Warren Snyder, Monte Mar
  • REDUCED ELETROMAGNETIC INTERFERENCE FOR PULSE-WIDTH MODULATION
    Publication number: 20130015798
    Abstract: A method and apparatus to drive a load using a pulse-width modulated (PWM) signal and spread a spectrum of the PWM signal across a plurality of frequencies while maintaining a constant duty cycle for the load.
    Type: Application
    Filed: September 7, 2011
    Publication date: January 17, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: David G. Wright
  • CAPACITANCE SENSING CIRCUITS, METHODS AND SYSTEMS HAVING GROUND INSERTION ELECTRODES
    Publication number: 20130015868
    Abstract: A capacitance sensing system can include a plurality of transmit (TX) electrodes disposed in a first direction; a plurality of first electrodes disposed in a second direction and coupled to the TX electrodes by a mutual capacitance, and coupled to a capacitance sense circuit when at least one TX electrode receives a transmit signal; and a plurality of second electrodes structures, interspersed with the first electrodes and coupled to a ground node at least while the one TX electrode receives the transmit signal.
    Type: Application
    Filed: September 27, 2011
    Publication date: January 17, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Tao Peng
  • Proximity based gesturing devices, systems and methods
    Patent number: 8355887
    Abstract: A device may include a plurality of sensors substantially coplanar with one another in a sensor plane, each sensor generating a sense value that varies according to a physical distance between the sensor and an object without contacting the object; and control circuits that generates at least first position values, second position values and third position values in response to the sensor values, the first and second position values identifying a position in a space adjacent to the sensor plane.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: January 15, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Richard Harding, John B. Foreman
  • Statistical method for filter convergence without accumulating residual error
    Patent number: 8352527
    Abstract: Disclosed is a filter circuit, comprising a signal to be filtered, a difference circuit coupled to the signal to be filtered, a filter having an input coupled to the difference circuit, an integrator (or accumulator) having a first input coupled to an output of the filter circuit, and having a second input, and an accumulator coupled to an output of the integrator. A method of filtering is described also.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: January 8, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: David Van Ess
  • Optical positioning device using telecentric imaging
    Patent number: 8345003
    Abstract: One embodiment relates to an optical displacement sensor for sensing movement of a data input device across a surface by determining displacement of optical features in a succession of frames. The sensor includes at least an illuminator, telecentric imaging optics on the object (scattering surface) side, and an array of photosensitive elements. The illuminator is configured to illuminate a portion of the surface. The telecentric imaging optics is configured to image the optical features emanating from the illuminated portion of the surface, and the array of photosensitive elements is configured to detect intensity data relating to the optical features imaged by the telecentric imaging optics. Other embodiments are also disclosed.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: January 1, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jahja Trisnadi, Clinton Carlisle, Charles Roxlo, David A. Lehoty
  • Floating gate reference for sleep/hibernate regulator
    Patent number: 8339188
    Abstract: A system includes power saving circuitry to revive a system controller from a sleep mode for performance of operations in an active mode. The system also includes a regulator including a floating gate reference device to generate output voltage and current capable of powering the power saving circuitry during the sleep mode. A method includes generating a reference voltage and current with a float gate device, and powering wake-up circuitry with the reference voltage and current while in a power saving mode. The wake-up circuitry is configured to activate a main system controller from the power saving mode.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: December 25, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: John Silver, Harold Kutz, Gary Moscaluk
  • OPTICAL NAVIGATION MODULE WITH CAPACITIVE SENSOR
    Publication number: 20120320385
    Abstract: Optical navigation modules and methods of operating the same to sense relative movement between the optical navigation module and a tracking surface are provided. In one embodiment, the optical navigation module comprises: (i) a light source to illuminate at least a portion of a surface relative to which the optical navigation module is moved; (ii) an integrated circuit (IC) including a photo-detector array (PDA) to detect a light pattern propagated onto the PDA from the surface, and a signal processor to translate changes in the light pattern propagated onto the PDA into data representing motion of the optical navigation module relative to the surface; and (iii) a substrate to which the light source and IC are mounted, the substrate including an aperture in a light path between the surface and the PDA. Other embodiments are also disclosed.
    Type: Application
    Filed: September 29, 2011
    Publication date: December 20, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Jinghui MU, Brett Alan SPURLOCK, Yansun XU, John FRAME, KeCai ZENG, Brian TODOROFF
  • Variable reference voltage circuit for non-volatile memory
    Patent number: 8325540
    Abstract: A variable reference voltage circuit for performing memory operation on non-volatile memory includes a multi-level voltage source and a selector circuit. The multi-level voltage source generates multiple voltages. The selector circuit includes a selector input and a selector output. The selector input is coupled to the multi-level voltage source to selectively couple any of the multiple voltages to the selector output. The selector output of the selector circuit is coupled to a non-volatile memory array to provide the NV memory array with a selectable program voltage for programming the NV memory array and a selectable erase voltage for erasing the NV memory array.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: December 4, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Mark Rouse, Eric D. Blom
  • Method and apparatus for using empty time slots for spread spectrum encoding
    Patent number: 8325782
    Abstract: Communication circuitry uses a combination of Pseudo-Noise (PN) coded and non-PN coded transmission periods to represent different data values. In one embodiment, a number of data values are encoded into a smaller second number of encoded ternary values. The Pseudo-Noise (PN) codes are transmitted representing some of the encoded ternary values and no transmitted PN codes represent other encoded ternary values. The throughput of spread spectrum radio systems is increased by representing data values in fewer spread spectrum time slots.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: December 4, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: David Wright
  • System and method to measure capacitance of capacitive sensor array
    Patent number: 8321174
    Abstract: A system and method for measuring capacitance of a capacitive sensor array is disclosed. Upon measuring the capacitance, position information with respect to the sensor array may be determined. A column, a first row, and a second row of a capacitive sensor array may be selected. The first row and the second row intersect with the column of the capacitive sensor array. A differential capacitance between the first row and the second row may be measured. The differential capacitance may be utilized in determining a location of an object proximate to the capacitive sensor array.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: November 27, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Nathan Moyal, Dana Olson