Patents Assigned to Cypress Semiconductor
  • Patent number: 8266405
    Abstract: An improved memory interface circuit is provided for accessing a storage array in one of two available modes, including a synchronous mode and an asynchronous mode. The improved memory interface circuit also includes logic, which enables the storage array to reside within substantially any clock domain.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: September 11, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hamid Khodabandehlou, Syed Babar Raza
  • Patent number: 8266361
    Abstract: An integrated circuit device may include a mask register that stores mask values writable from a processor interface; and mask logic that selectively masks status indications from each of a plurality of buffers according to stored mask values; wherein the buffers alter the status indications in response to accesses from at least one different interface other than the processor interface.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: September 11, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: John Jikku, Venkata Suresh Babu
  • Patent number: 8266575
    Abstract: Systems and methods for dynamically reconfiguring a programmable system on a chip. A graphical user interface for dynamically reconfiguring a programmable system on a chip includes graphical user interface (GUI) display elements of a plurality of parameter values presently controlling operation of a device on a target apparatus. The GUI display elements are operable to accept modifications to the plurality of parameter values and for communicating the modifications to the programmable system on a chip. The GUI display elements may present parameter values in alphanumeric and/or graphical formats, and may accept changes via keyboard or cursor directing device input.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: September 11, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Marat Zhaksilikov, Andrew Best
  • Patent number: 8258986
    Abstract: An apparatus and method for detecting activation of one or more capacitive keys when presences of the one or more touches are detected on unique combinations of three or more sensor elements at the respective locations of the capacitive keys on which the one or more touches are detected. In one embodiment, the method correctly detects the activations of multiple keys when multiple substantially simultaneous touches are detected.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: September 4, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Mykhailo Makovetskyy
  • Patent number: 8259069
    Abstract: A speckle-based trackball apparatus with an optical architecture employing curved-wavefront illumination beam or a modified imaging lens and aperture configuration is provided. The apparatus includes a trackball configured to be rotated by a user. In the curved-wavefront embodiment, an illuminator is configured to illuminate a spot area of the curved surface of the trackball with a curved-wavefront illumination beam so that an ensemble of optical features used for motion sensing interact with the illumination beam at different phase points as a function of a location within the illuminated spot area on the curved surface of the trackball. In the modified imaging lens and aperture configuration, the aperture is positioned between the back focal plane and the image plane of the imaging lens, and the illuminator may be configured to illuminate a portion of the trackball with a planar-wavefront illumination beam. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: September 4, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jahja I. Trisnadi, Clinton B. Carlisle
  • Publication number: 20120217982
    Abstract: An embodiment of an integrated circuit device may comprise an integrated circuit package, a sensor element attached within the integrated circuit package, a capacitance sensor coupled with the sensor element and situated within the integrated circuit package, wherein the capacitance sensor is configured to measure a capacitance of the sensor element, and an output pin positioned at the exterior of the integrated circuit package, wherein the output pin is configured to carry a signal based on the measured capacitance of the sensor element.
    Type: Application
    Filed: December 29, 2011
    Publication date: August 30, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Rajagopal Narayanasamy, Mahadevan Krishnamurthy Narayana Swamy, David Wright, Steven Kolokowsky
  • Publication number: 20120213027
    Abstract: A system and method for resetting semiconductor memory is disclosed. The present invention uses an array reset circuit to independently drive the bit lines of a volatile memory cell high or low so as to reset either a single memory cell or all memory cells in an array with all 0's or all 1's.
    Type: Application
    Filed: August 24, 2011
    Publication date: August 23, 2012
    Applicant: Cypress Semiconductor Corporation
    Inventors: James D. Allan, Jayant Ashokkumar
  • Patent number: 8248143
    Abstract: A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 21, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Harold Kutz
  • Patent number: 8248084
    Abstract: A technique for recognizing and rejecting false activation events related to a capacitance sense interface includes measuring a capacitance value of a capacitance sense element. The measured capacitance value is analyzed to determine a baseline capacitance value for the capacitance sensor. The capacitance sense interface monitors a rate of change of the measured capacitance values and rejects an activation of the capacitance sense element as a non-touch event when the rate of change of the measured capacitance values have a magnitude greater than a threshold level, indicative of a maximum rate of change of a touch event.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: August 21, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Louis W. Bokma, Andrew C. Page, Dennis R. Seguine
  • Patent number: 8248081
    Abstract: A single-layer touch-sensor device having a calibration mechanism coupled therewith is described. Included is a charge measurement circuit coupled, by a pair of electrical traces, with a slider of the single-layer touch-sensor device. A pair of calibration capacitors is included, each calibration capacitor coupled, between the slider and the charge measurement circuit, with one of the pair of electrical traces. A pair of connection switches is also included, each connection switch coupled with one of the pair of calibration capacitors.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: August 21, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andriy Maharyta, Robert Michael Birch
  • Patent number: 8250249
    Abstract: A programmable system includes a core processing unit to perform various data operations. The programmable system includes a transceiver having programmable analog and digital devices that, when initially configured by the programmable system, receive and collect status information of other programmable systems independently of the data operations performed by the core processing unit.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: August 21, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Gaurang Kavaiya, Rick Harding, Mark Ainsworth, Bert Sullam
  • Patent number: 8245579
    Abstract: A method and apparatus to detect the presence of a material at a sensing device and to determine whether the material is a first material having a first material property or a second material having a second material property.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: August 21, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Corey Steven Wilner, Viktor Kremin
  • Publication number: 20120200524
    Abstract: A capacitance sensing system can filter noise that presents in a subset of electrodes in the proximity of a sense object (i.e., finger). A capacitance sensing system can include a sense network comprising a plurality of electrodes for generating sense values; a noise listening circuit configured to detect noise on a plurality of the electrodes; and a filtering circuit that enables a filtering for localized noise events when detected noise values are above one level, and disables the filtering for localized noise events when detected noise values are below the one level.
    Type: Application
    Filed: September 28, 2011
    Publication date: August 9, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Darrin Vallis, Victor Kremin, Andriy Maharyta, Yuriy Boychuk, Anton Konovalov, Oleksandr Karpin, Ihor Musijchuk, Hans Klein, Edward Grivna
  • Publication number: 20120200229
    Abstract: Embodiments described herein provide a LED lighting system and method. A transformer has a primary winding and a secondary winding. A plurality of LED strings are coupled to the secondary winding of the transformer. At least one switch is coupled to at least one of the plurality of LED strings. A controller is coupled to the at least one switch and configured to control the operation of the at least one switch such that current flows through the plurality of LED strings in an alternating manner.
    Type: Application
    Filed: September 26, 2011
    Publication date: August 9, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: David Kunst, Barry Loveridge
  • Publication number: 20120200307
    Abstract: A capacitive sensor may include a transmit electrode and a receive electrode capacitively coupled with the transmit electrode. A capacitance sensing circuit senses a capacitance between the transmit and receive electrodes by applying a signal to the transmit electrode and rectifying a signal induced at the receive electrode. A compensation circuit reduces the effect of a mutual and parasitic capacitances of the transmit and receive electrode pair by adding a compensation signal to the rectified signal.
    Type: Application
    Filed: January 6, 2012
    Publication date: August 9, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Andriy Maharyta, Viktor Kremin
  • Patent number: 8237418
    Abstract: A replica biased voltage regulator circuit and method of load regulation are provided herein. According to one embodiment, the replica biased voltage regulator circuit includes an operational amplifier and a comparator, wherein outputs of the operational amplifier and comparator are respectively and simultaneously supplied to a front gate and a back gate of an output stage transistor included for regulating an output voltage generated by the replica biased voltage regulator circuit.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: August 7, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Damaraji Naga Radha Krishna
  • Patent number: 8239658
    Abstract: An address generation system and method is provided for internally storing and thereafter producing an address to be sent to a memory device. The address that is stored need not be sent from an external address bus at each clock cycle, but the processing can remain internal to the memory device. The burst-block starting address can be stored in the mirror register and output from a selector circuit, such as a multiplexer, when that address is chosen. Otherwise, the multiplexer can simply perform its normal operation of selecting between an address pointed to by a counter, the external address, or the incremented counter output, based on the state of the external counter control signals. The system includes a mirror register, a counter, and a multiplexer that selects either the mirror register stored address or the internally processed address.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: August 7, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Stefan-Cristian Rezeanu
  • Patent number: 8236151
    Abstract: A carrier provides the ability to perform wet chemical processing on substrates using low cost equipment inspired by the electroplating methods typically utilized in leadframe-based semiconductor packaging or printed circuit board industries. Two frame pieces are mated together to form the carrier which enables transport of at least one substrate through wet chemical processing and includes a non-conductive frame with an exposed conductive flange to allow electrical coupling with processing equipment. Electrical contacts within the non-conductive frame make contact with the at least one substrate and are coupled to the conductive flange allowing an electrical potential to develop across the substrate while undergoing processing within the electroplating equipment.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: August 7, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Timothy L. Olson, Kenneth Charles Blaisdell, William Walter Charles Koutny, Jr.
  • Publication number: 20120188826
    Abstract: In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.
    Type: Application
    Filed: February 28, 2012
    Publication date: July 26, 2012
    Applicant: Cypress Semiconductor Corporation
    Inventors: Ryan T. Hirose, Fredrick Jenne, Vijay Raghavan, Igor G. Kouznetsov, Paul Fredrick Ruths, Cristinel Zonte, Bogdan I. Georgescu, Leonard Vasile Gitlan, James Paul Myers
  • Publication number: 20120188163
    Abstract: A method and apparatus receive first input through a touch screen and communicate over a cellular network responsive to the first input. The method and apparatus receive second input through the touch screen and use the second input to control, through a wireless network other than the cellular network, an image displayed on a screen of a second device.
    Type: Application
    Filed: January 24, 2012
    Publication date: July 26, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Browley Xiao