Abstract: Apparatus and methods for offsetting the reference voltage range of a relaxation-type oscillator decreases sensing time and reduces noise-induced jitter.

Abstract: A method for detecting a magnitude of force applied to a capacitive sensor array may comprise receiving a plurality of capacitance measurements affected by a contact at a touch-sensing surface, and determining a magnitude of a force applied to the touch-sensing surface at a location of the contact based on the location of the contact and a capacitance measurement of the first plurality of capacitance measurements.

Abstract: A capacitance sensing circuit may include a capacitive sensor configured to conduct a sensor current, a current source for supplying a compensation current to the capacitive sensor, and a current mirror that generates a mirror current based on a compensated sensor current, where the compensated sensor current represents a difference between the compensation current and the sensor current. A measurement circuit generates an output signal corresponding to the capacitance of the capacitive sensor.

Abstract: A method and system for protecting a wireless network by establishing virtual walls to confine wireless connection to devices located within a three-dimensional region. A network of wireless monitoring nodes is established at physical locations. The monitoring nodes are arranged in a frame of reference and determine locations of one another and of mobile nodes by conducting measurements of either roundtrip travel time of signals sent and received or of differences in the times of receiving a signal at different known locations. Initially mobile nodes are placed, sequentially, in a triangle at a boundary to be established as a virtual wall for confining communication within the wireless network. The mobile node locations are then stored. The position of a device requesting admission to the wireless network is similarly determined and, if within the established virtual walls, the device may be admitted to the network. Admission is otherwise denied.

Abstract: Improved semiconductor topographies and methods are provided herein for reducing the gate induced drain leakage (GIDL) associated with MOS transistors. In particular, a disposable spacer layer is used as an additional mask during implantation of one or more source/drain regions. The physical spacing between the gate and the source/drain regions of a MOS transistor (i.e., the gate/drain overlap) can be varied by varying the thickness of the disposable spacer layer. For example, a larger spacer layer thickness may be used to decrease the gate/drain overlap and reduce the GIDL associated with the MOS transistor. The disposable spacer layer is completely removed after implantation to enable electrical contact between the source/drain regions and subsequently formed source/drain contacts. A method is also provided herein for independently customizing the amount of current leakage associated with two or more MOS transistors.

Abstract: One embodiment in accordance with the invention can include a circuit for controlling a light emitting diode (LED) lighting fixture via a power line. The circuit can include a power switch coupled to the power line and is for outputting a firing angle. Additionally, the circuit can include a control circuit coupled to the power switch and is for implementing firing angle control of the power switch. Furthermore, the circuit can include a translator coupled to receive the firing angle and for mapping the firing angle to a function of the LED lighting fixture.

Abstract: At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port.

Abstract: A memory device and method may include separating alternating read and write accesses to different banks of a memory device.

Abstract: An apparatus and method for programmable power management in a programmable analog circuit block. Specifically, the present invention describes an operational amplifier circuit that includes current sources that are coupled in parallel. Configuration bits are asserted to selectively enable or selectively disable one or more of the current sources in order to modulate the performance of the operational amplifier circuit block. Selective addition or removal of current sources increases or decreases the amount of current within the operational amplifier and, correspondingly, the speed and power consumption of the operational amplifier. Combinations of asserted configuration bits pass a bias voltage in order enable selected current sources. In one embodiment, the bias voltage can be increased in order to increase the current output of one of the current sources which, correspondingly, increases the speed of the operational amplifier circuit block.

Abstract: A wireless tracking device including a positioning system for determining a location of the device and a processor connected to the positioning system. The wireless tracking device further including a wireless radio connected to the processor for transmitting the location of the device across a wireless area network. A vehicle monitoring system including a sensor, a microcontroller configured to receive a sensor input from the sensor and determine a vehicle condition data, and a wireless transmitter in communication with the microcontroller. The wireless transmitter is configured to transmit the vehicle condition data to a remote data network access point. A method of monitoring a vehicle including determining a status of the vehicle, locating an available wireless data network access point, and transmitting the status of the vehicle though the access point.

Abstract: An apparatus and method for reducing power consumption of capacitance sensing device in a reduce power mode. In one embodiment, the method includes individually measuring a capacitance on each of a plurality of sensor elements of a device, coupling a group of sensor elements of the plurality of sensor elements together when a presence of a conductive object is not detected on the plurality of sensor elements while individually measuring the capacitance on each of the plurality of sensor elements, and collectively measuring a capacitance on the group of sensor elements. In one embodiment, the apparatus includes a processing device, and a plurality of sensor elements that are individually coupled in a first mode and collectively coupled in a second mode.

Abstract: A circuit with electrostatic discharge protection is described. The circuit includes an output driver transistor with an extended drain contact region. The circuit also includes a distinct device configured to provide electrostatic discharge protection for the output driver transistor. The distinct device includes an electrostatic discharge protection transistor with an extended drain region.

Abstract: A system includes a current sensor to receive an input signal based on a sense current provided to load circuitry. The current sensor is configurable to generate an output signal from the input signal based, at least in part, on one or more configurable characteristics of the current sensor. The system also includes a processing element to compare the output signal from the current sensor to one or more programmable parameters. The processing element is configurable to direct a current controller to regulate the sense current provided to the load circuitry according to the comparison, and is further configurable to set a configurable parameter associated with the current sense amplifier.

Abstract: A system includes a voltage pump to generate a first pump voltage from an analog voltage signal. The system further includes switching pad to receive an analog signal from an external source and route the analog signal to analog processing circuitry over one or more analog signal busses based on the first pump voltage and the analog voltage signal.

Abstract: An embodiment of the present invention is directed to a system for synchronizing independent time domain information. The synchronization of the device resource access information allows a memory access device to reliably access memory in a time domain independent of a device issuing requests. The system may synchronize device resource information for requests made by a processor to access (e.g., read/write) locations of a memory device. The present invention synchronizes the device access information without restricting pulse width of a read/write signal or requiring a high speed clock.

Abstract: A semiconductor structure and method to form the same. The semiconductor structure includes a substrate having a non-volatile charge trap memory device disposed on a first region and a logic device disposed on a second region. A charge trap dielectric stack may be formed subsequent to forming wells and channels of the logic device. HF pre-cleans and SC1 cleans may be avoided to improve the quality of a blocking layer of the non-volatile charge trap memory device. The blocking layer may be thermally reoxidized or nitridized during a thermal oxidation or nitridation of a logic MOS gate insulator layer to densify the blocking layer. A multi-layered liner may be utilized to first offset a source and drain implant in a high voltage logic device and also block silicidation of the nonvolatile charge trap memory device.

Abstract: A system comprising a sensing device and a capacitive sense array configured to track the position of a stylus and synchronize the capacitive sense array to the stylus transmit signal. The system is configured to track the position of both a stylus and a passive touch object. The system is further configured to track the position of the stylus using self capacitance sensing and track the position of the passive touch object using mutual capacitance sensing. The system further configured to modulate the stylus transmit signal to include additional data to support additional stylus functions.

Abstract: A wireless communication device and associated method is described. The device includes a radio and a controller to operate the radio in a normal communications range responsive to the controller binding the radio to a host in a reduced binding range, where the radio and the controller are integrated into a single chip.

Abstract: Disclosed is a mass-storage device, comprising a Universal Serial Bus (USB) interface, a locking function coupled to the USB interface wherein the locking function is accessible via a USB device class other than a mass-storage class, and a data mass-storage memory coupled to the locking circuit.

Abstract: A method is described including extracting protocol information from a received packet within a framer, comparing the protocol information in a first pass to predetermined values to produce a first result, and tagging the packet based on the set of results.