Patents Assigned to Cypress Semiconductor
  • Patent number: 8179161
    Abstract: A programmable input/output circuit includes a programmable output circuit configured to drive an output signal to an input/output pad at a plurality of voltages. The programmable input/output circuit further includes a programmable input configured to detect an input signal from the input/output pad at a plurality of voltages. The voltage levels of the input and output circuits may be independently and dynamically controllable.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: May 15, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Timothy J. Williams, David G. Wright, Gregory J. Verge, Bruce E. Byrkett
  • Patent number: 8179193
    Abstract: A voltage regulator includes a programming interface via which programming instructions may be applied to a processor of the voltage regulator. The voltage regulator operates the processor according to the programming instructions to select one of multiple active internally-generated analog voltage levels to determine an output voltage level of the voltage regulator.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: May 15, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G Wright
  • Publication number: 20120113718
    Abstract: A memory circuit includes a high voltage region providing storage of a nonvolatile bit, and a low voltage region providing at least partial storage of a volatile bit. The high and low voltage regions are isolated from one another and formed by a plurality of transistors in series between a current source and a bit line.
    Type: Application
    Filed: October 11, 2011
    Publication date: May 10, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Andreas Scade, Stefan Guenther
  • Patent number: 8174332
    Abstract: A phase lock loop pre-charging system and method are described. In one embodiment, a phase lock loop pre-charge system includes a bias component for generating a pre-charge voltage, and an activation component for activating the bias component. In one exemplary implementation the pre-charge voltage is utilized to facilitate pre-charging of a phase lock loop voltage controlled oscillator. In one embodiment, the bias component includes replica bias components that track the voltage controlled oscillation control voltage over varying process, voltage and temperature characteristics. The phase lock loop pre-charging systems and methods can be utilized to reduce lock time for a circuit.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Carel J. Lombaard, Eugene O'Sullivan, Paul Walsh
  • Patent number: 8174291
    Abstract: An improved buffer circuit and method for minimizing (or altogether eliminating) duty cycle distortion between input and output signals of the buffer circuit are provided herein. In general, the improved buffer circuit essentially decouples the charging and discharging current paths of the buffer circuit from a reference voltage supplied to the buffer circuit. This ensures substantially equal time delays between rising and falling edges of the input and output signals, thereby decreasing duty cycle distortion and maintaining a maximum operating frequency of the buffer circuit, even when the reference voltage approaches a transistor threshold voltage. In addition, the improved method may include forwarding an input signal with an input duty cycle onto mutually connected gate terminals of a pair of pull-down transistors, and activating/inactivating at least one of the pair of pull-down transistors during logic high and logic low voltage values of the input duty cycle, respectively.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Pulkit Shah, Gajendar Rohilla
  • Patent number: 8176468
    Abstract: In one embodiment, a method for supporting multivariable functions of an application includes receiving user input pertaining to two or more variables associated with a multivariable function of the application, and then causing code for the function to be automatically generated to update the variables based on the user input.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Doug Anderson, Andrew Best
  • Patent number: 8174510
    Abstract: One embodiment in accordance with the invention can include a capacitive touch screen. The capacitive touch screen includes a substantially transparent substrate and a plurality of electrodes formed on the substantially transparent substrate. The plurality of electrodes are substantially parallel in a first direction and each of the plurality of electrodes includes a layer of light altering material.
    Type: Grant
    Filed: March 29, 2009
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Igor Polishchuk, Edward Grivna
  • Patent number: 8174326
    Abstract: In one embodiment, a cross zero best error selection system includes an error input interface, a most significant bit summation component and a multiplexer. The error input interface in coupled to a most significant bit summation component which in turn is coupled to a multiplexer. The error input interface receives a plurality of future error values. The most significant bit summation component sums most significant bits of said future error values. The multiplexer for selects error value based upon said summation of said most significant bits.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Shuliang Li
  • Patent number: 8174507
    Abstract: A method and apparatus to detect a conductive object at a location determines a capacitance variation of a first sensor element and a capacitance variation of a second sensor element. The method and apparatus detects a touch at a first location if the capacitance variation of the first sensor element is greater than a reference value and the capacitance variation of the second sensor element is not greater than the reference value. The method and apparatus detects the touch at a second location if the capacitance variation of the first sensor element is not greater than the reference value and the capacitance variation of the second sensor element is greater than the reference value. The method and apparatus detects the touch at a third location if the capacitance variation of the first sensor element and the capacitance variation of the second sensor element are both greater than the reference value.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Jiang XiaoPing
  • Patent number: 8176296
    Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: May 8, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Warren Snyder
  • Publication number: 20120105361
    Abstract: A system comprising a sensing device and a capacitive sense array configured to detect a presence of a passive touch object and a stylus where the capacitive sense array receives a transmit signal from the stylus via capacitive coupling. The system further comprising a processing device configured to determine the stylus location on the capacitive sense array based on the transmit signal and to synchronize the stylus to the capacitive sense array. A system further comprises a demodulation block to extract additional data that is modulated into the transmit signal by the stylus. The demodulation block is configured to extract the additional data by amplitude shift keying. The additional data comprises at least one of an applied force value of the stylus tip, a button status data, a battery status data, or a stylus acceleration data.
    Type: Application
    Filed: August 19, 2011
    Publication date: May 3, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: VIKTOR KREMIN, ROMAN OGIRKO, OLEKSANDR PIROGOV, ANDRIY RYSHTUN, DARRIN VALLIS
  • Publication number: 20120105362
    Abstract: A system and method for tracking a stylus on a capacitive sense array. The system comprising the capacitive sense array configured to detect a presence of the stylus, a processing device to generate a synchronization signal, and a transmitter to transmit the synchronization signal to the stylus to synchronize the stylus to the capacitive sense array. The system further comprises a magnetic antenna configured to inductively transmit the synchronization signal to the stylus, wherein the magnetic antenna is disposed around the outer edges of the capacitance sense array, according to an embodiment of the invention.
    Type: Application
    Filed: August 19, 2011
    Publication date: May 3, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: VIKTOR KREMIN, ROMAN OGIRKO, OLEKSANDR PIROGOV, ANDRIY RYSHTUN, DARRIN VALLIS
  • Patent number: 8169238
    Abstract: A capacitance to frequency converter includes a switching capacitor circuit, a charge dissipation circuit, a comparator, and a signal generator. The switching capacitor circuit charges a sensing capacitor and transfers charge from the sensing capacitor to a circuit node of the charge dissipation circuit. The comparator is coupled to the charge dissipation circuit to compare a potential at the circuit node to a reference voltage. The signal generator is coupled to an output of the comparator and to the charge dissipation circuit. The signal generator is responsive to the output of the comparator to generate a signal fed back to control the charge dissipation circuit. A frequency of the signal is proportional to a capacitance of the sensing capacitor.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: May 1, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andriy Maharyta, Viktor Kremin
  • Patent number: 8169421
    Abstract: An apparatus and method for distinguishing a particular gesture from among multiple gestures, performed by a conductive object on the sensing device, using fewer than three time intervals. The apparatus may include a sensing device to detect a presence of a conductive object, and a processing device, coupled to the sensing device, to distinguish the multiple gestures. The method may include distinguishing between a tap gesture, a double tap gesture, a drag gesture, and a motion gesture.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: May 1, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: David G. Wright, Edward L. Grivna, Ronald H. Sartore
  • Publication number: 20120098783
    Abstract: A method for detecting force applied to a capacitive sensor array and compensating for coordinate inaccuracy due to force includes receiving a plurality of capacitance measurements from the capacitive sensor array, where the plurality of capacitance measurements includes a first capacitance measurement and a second capacitance measurement, and detecting pressure on the capacitive sensor array based on a comparison between the first capacitance measurement and the second capacitance measurement.
    Type: Application
    Filed: April 21, 2011
    Publication date: April 26, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Massoud Badaye, Greg Landry
  • Patent number: 8163660
    Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes forming a first oxide layer on a surface of a substrate. The first oxide layer is exposed to a first decoupled plasma nitridation process having a first bias. Subsequently, a charge-trapping layer is formed on the first oxide layer. The charge-trapping layer is exposed to an oxidation process and then to a second decoupled plasma nitridation process having a second, different, bias.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: April 24, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Helmut Puchner, Igor Polishchuk, Sagy Levy
  • Patent number: 8165339
    Abstract: A system for monitoring equipment in a non-invasive fashion may include at least one sense device comprising an electronics module that includes a image sensor, at least one controller coupled to receive image data from the image sensor and generate a reading value, a display that displays the reading value from the at least one controller. In addition, a mounting adapter, separate from and attachable to the electronics module, may be included that has a fitting portion adaptable to be affixed to the monitored equipment and an image opening that enables an image of the monitored equipment to be acquired. In other embodiments, a sense device may provide a signal, such as a DC signal from piece of equipment. A configuration tool may configure parameters by which a reading value is generated from such a DC signal. In one arrangement, a configuration tool may configure sense devices via a wireless connection, and display any images of the monitored equipment captured by the sense device.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: April 24, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harry Sim, Steve Y. Kim, Marcus Kramer
  • Patent number: 8164365
    Abstract: Embodiments of the invention relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit and a low-drive circuit, to drive rail-to-rail output voltages and to stabilize the output voltages at a substantially constant level. The high-drive circuit may drive the output voltage of the non-resistive load driver to a threshold level, whereas the low-drive circuit may modify the output voltage of the non-resistive load driver to approximate an input voltage of the non-resistive load driver, and compensate any leakage associated with the non-resistive loads to provide a substantially constant output voltage. The low-drive circuit consumes less current than the high-drive circuit. The non-resistive load driver consumes less power and use less chip space.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: April 24, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: David Wright, Jason Muriby, Erhan Hancioglu
  • Publication number: 20120096301
    Abstract: An improved memory interface circuit is provided for accessing a storage array in one of two available modes, including a synchronous mode and an asynchronous mode. The improved memory interface circuit also includes logic, which enables the storage array to reside within substantially any clock domain.
    Type: Application
    Filed: December 6, 2011
    Publication date: April 19, 2012
    Applicant: Cypress Semiconductor Corporation
    Inventors: Hamid Khodabandehlou, Syed Babar Raza
  • Patent number: 8160864
    Abstract: A synchronized boot process for an In-Circuit Emulator system. A real microcontroller is operated in lock-step synchronization with a virtual microcontroller to permit In-Circuit Emulation that allows debugging of the real microcontroller without interfering with its real time operation. The synchronized boot is accomplished by running boot code in the real microcontroller while the virtual microcontroller runs dummy code with the same timing as the boot code. Registers and memory contents are then copied from the real microcontroller to the virtual microcontroller to complete initialization and enter a state of readiness for lock-step operation.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: April 17, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Craig Nemecek, Steve Roe