Patents Assigned to Cypress Semiconductor
  • Patent number: 8073005
    Abstract: A method and apparatus for configuring signal lines with idle codes is disclosed. According to one embodiment, data transmission system (100) may include encoders (112, 114, 116 and 118) that transmit data over signal line lanes (Lane 0 to Lane n). In an idle state, an encoder (112, 114, 116 and 118) may output one of at least two idle codes (IDLE A and IDLE B). One idle code (IDLE A) may indicate a first lane of a group of lanes. Another idle code (IDLE B) may indicate subsequent lanes of a group of lanes.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: David V. James, Jagadeesan Rajamanickam
  • Patent number: 8069436
    Abstract: A user application is generated in response to user input, wherein the user application is described in a user application description. Processing device code is generated for a targeted processing device based at least in part on the user application description without user intervention, wherein the processing device code includes a system layer, wherein functionality of the system layer is independent of the targeted processing device.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: November 29, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Warren Snyder, Dinesh Maheshwari, Kenneth Ogami, Mark Hastings
  • Patent number: 8067948
    Abstract: An input/output (“I/O”) system includes a plurality of input/output (“I/O”) ports, measurement circuitry, and an I/O multiplexer bus. The measurement circuitry is coupled to measure one or more electrical properties of one or more devices to be externally coupled to one or more of the I/O ports. The I/O multiplexer bus is coupled between the I/O ports and the measurement circuitry. The I/O multiplexer bus is programmable to selectively couple the measurement circuitry to any of the I/O ports.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: November 29, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dennis R. Sequine
  • Patent number: 8069428
    Abstract: A method and apparatus for configuring a microcontroller. An XML description of the microcontroller's hardware resources may be accessed. A user may select from available hardware resources and pre-defined user modules to select a configuration. Configuration information, which may include register bit patterns and microprocessor instructions, may be automatically generated. Additionally, application programming interface calls and structure, as well as interrupt vector tables may be automatically generated. Embodiments of the present invention provide improved ease of use and the ability to manage greater complexity in the configuration of configurable microcontrollers.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: November 29, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Y. Ogami, Doug Anderson, Matthew Pleis, Frederick Redding Hood, III
  • Patent number: 8068097
    Abstract: An apparatus and method for distinguishing a particular button operation from among multiple button operations on a sensing device having multiple sensor elements that are electrically coupled together. The apparatus may include a sensing device having a first sensor element and a second element that are electrically coupled to detect a presence of a conductive object on the sensing device. The method may include detecting a presence of a conductive object on a sensing device having multiple sensor elements that are electrically coupled, each sensor element corresponding to a button operation, and distinguishing between the multiple button operations.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: November 29, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Li GuangHai
  • Patent number: 8069405
    Abstract: A method and system for helping a user efficiently browse an electronic document using data-driven tabs. A datasheet providing technical details of a corresponding user module is scanned for indicators (e.g., embedded anchors), wherein a user module is a pre-configured circuit design operating on a microcontroller. The indicators are for indicating a predetermined location within the datasheet. The datasheet description is read and graphic elements (e.g., tabs) are automatically rendered for each corresponding indicator, wherein a graphic element is rendered according to information within the indicator. Interacting with one of the graphic elements allows a user to jump to a predetermined location within the datasheet. The graphic elements are operable for efficient navigation of the datasheet, allowing for a large datasheet to be easily viewed in a small area of a display.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: November 29, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manfred Bartz, Marat Zhaksilikov, Doug Anderson
  • Patent number: 8067284
    Abstract: A semiconductor device including a bilayer charge storing layer and methods of forming the same are provided. Generally, the method includes: (i) forming a first layer of the bilayer charge storing layer; and (ii) forming a second layer formed on a surface of the first layer, the second layer including an oxynitride charge trapping layer. Preferably, the first layer includes a substantially trap free oxynitride layer. More preferably, the oxynitride charge trapping layer includes a significantly higher stoichiometric composition of silicon than that of the first layer. In certain embodiments, the oxynitride charge trapping layer has a concentration of carbon selected to increase the number of traps therein. Other embodiments are also disclosed.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: November 29, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Sagy Levy
  • Patent number: 8063603
    Abstract: A method and apparatus for driving a stepper motor and using the stepper motor as a rotary sensor when the stepper motor is not being driven.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Rakesh Reddy
  • Patent number: 8065653
    Abstract: Techniques for configuring a programmable integrated circuit (IC) include determining design elements of the programmable integrated circuit that need to be configured prior to run-time operation of the programmable IC. A user interface provides for configuring one or more parameters for each of the determined design elements that need to be configured. Thereafter, the design elements are configured based on the one or more parameter values specified through the user interface.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andrew Best, Kenneth Ogami, Marat Zhaksilikov
  • Patent number: 8063434
    Abstract: An embodiment of a semiconductor device includes a non-volatile memory transistor including an oxide-nitride-oxide (ONO) dielectric stack on a surface of a semiconductor substrate, the ONO dielectric stack comprising a multilayer charge storage layer including a silicon-rich, oxygen-lean top silicon oxynitride layer and a silicon-rich, oxygen-rich bottom silicon oxynitride layer, and a metal oxide semiconductor (MOS) logic transistor including a gate oxide and a high work function gate electrode.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Igor Polishchuk, Sagy Levy, Krishnaswamy Ramkumar
  • Patent number: 8063805
    Abstract: A voltage regulator uses a digital feedback technique to regulate the voltage at an output of the regulator. The voltage level of an output signal is measured. The voltage level of the output signal is compared to a first reference voltage. A programmable digital control logic block regulates the voltage level of the output signal and operates in a first mode if the voltage level of the output signal is above a first reference voltage and in a second mode if the voltage level of the output signal is below the first reference voltage. Depending on the mode of operation, the programmable digital control logic block provides digital control signals to other elements of the feedback loop.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Sherif Eid
  • Patent number: 8063655
    Abstract: A regulated circuit having a number of metal-oxide-semiconductor field effect transistors (MOS FETs) and a method for using the same are provided to reduce Negative Bias Temperature Instability degradation of the MOS FETs on the circuit. In one embodiment, the method involves steps of: (i) detecting degradation in performance of at least one of the MOS FETs causing a shift in threshold voltage (VT) of the MOS FET; and (ii) if the shift in VT exceeds a predetermined value, forward biasing the MOS FETs, thereby reducing or reversing the shift in VT. Optionally, the method includes an initial step of determining if the circuit is in a non-dynamic operating mode before forward biasing the MOS FETs. Other embodiments are also disclosed.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Helmut Puchner, Oliver Pohland
  • Patent number: 8064255
    Abstract: A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data interface.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andreas Scade, Stefan Guenther
  • Patent number: 8064281
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, Timothy Williams
  • Patent number: 8063881
    Abstract: A method and an apparatus for determining displacement of a surface member coupled to a user interface mechanism, for example a joystick handle, using a fixed optical motion sensor. Using the displacement of the surface member, the method, and apparatus may determine an absolute position of the surface member, recalibrating a center point upon detecting a difference in light reflection of the center point.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: David Gordon Wright
  • Patent number: 8063665
    Abstract: A buffer circuit includes an input configured to receive an input signal; and a buffer configured to generate an output signal based on the input signal. In an embodiment, the output signal has a linear relationship with the input signal when the input signal is within the input voltage range; and the buffer circuit further includes a level-shifting circuit coupled with the input, wherein the level shifting circuit determines an input voltage range, and wherein one of an upper limit and a lower limit of the input voltage range is within 50 millivolts from a supply rail voltage. In another embodiment, the buffer circuit further includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Gajender Rohilla, Eashwar Thiagarajan, Harold Kutz, Monte Mar, Mohandas Palatholmana Sivadasan
  • Publication number: 20110283057
    Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.
    Type: Application
    Filed: June 27, 2011
    Publication date: November 17, 2011
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Warren Snyder
  • Patent number: 8058937
    Abstract: An apparatus and method for setting a ratio of a discharge rate to a charge rate for measuring a capacitance on a sensor element of a sensing device. The apparatus may include a sensor element of a sensing device, a relaxation oscillator having a first and a second programmable current source, and a ratio decoder to receive a ratio of a discharge rate to a charge rate, and to set the first and second programmable current sources based on the received ratio.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: November 15, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Zheng Qin, Tao Peng
  • Patent number: 8060721
    Abstract: A method of and apparatus for arbitrating a memory access conflict to a memory array. The apparatus may include selection logic coupled with a plurality of ports and a memory array to arbitrate among a plurality of contending memory access requests and to conditionally block write data from accessing the memory array when write data arrives late in time.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: November 15, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Rishi Yadav
  • Patent number: 8058911
    Abstract: A programmable power-on reset circuit in accordance with one embodiment of the invention can include a programmable voltage divider. The programmable power-on reset circuit can also include a comparator that is coupled to the programmable voltage divider and that is coupled to receive a reference voltage. Additionally, the programmable power-on reset circuit can include a non-volatile memory that is coupled to the programmable voltage divider, wherein the non-volatile memory can be coupled to receive programming for controlling an output of the programmable voltage divider.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: November 15, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G. Wright