Patents Assigned to Cypress Semiconductor
  • Patent number: 8085067
    Abstract: A differential-to-single ended converter circuit can include a latching circuit having first and second latch field effect transistors (FETs) with drains and gates cross-coupled between a first latch node and a second latch node. The source-drain paths of the first and second latch FETs are coupled to a first reference potential node via separate current paths. A sense circuit can include a first sense FET having a source-drain path coupled between the first sense node and the first reference potential node, and a gate coupled to a first input node. A second sense FET has a source-drain path coupled between the second sense node and the first reference potential node, and a gate coupled to a second input node.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: December 27, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Jonathon Stiff
  • Patent number: 8085252
    Abstract: Direction of motion in a sensor array of a touch sensing device may be determined using a rule-based algorithm. A presence of a conductive object on a sensing device may be detected. First, second, and third locations of the detected presence of the conductive object may be determined. The first location may be compared with the second location using the rule-based algorithm, and a first direction of motion of the conductive object may be recognized based on the comparison. The second location may be compared with the third location using the rule-based algorithm, and the same first direction of motion of the conductive object may be recognized based on the comparison.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: December 27, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mark R. Lee, Christopher R. Hammer
  • Patent number: 8086417
    Abstract: An embodiment of the present invention is directed to a method for processing a position signal. The method includes receiving a first position signal from a capacitive sensor and determining a proximity of the capacitive sensor to a connection of an array of capacitive sensors. The sensitivity of the capacitive sensor is then adjusted and a second position signal is received from the capacitive sensor. The second position signal may then be reported. The present invention facilitates more accurate readings from an array of capacitive sensors.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: December 27, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Ryan D. Seguine
  • Publication number: 20110308955
    Abstract: A semiconductor substrate carrier for use during wet chemical processing may comprise a conductive flange to couple the carrier with processing equipment, a frame coupled with the conductive flange, where the frame is configured to hold a semiconductor substrate, and an integrated shield coupled with the frame. The integrated shield is configured to alter an electric field near at least a portion of a surface of the semiconductor substrate during the wet chemical processing.
    Type: Application
    Filed: February 16, 2011
    Publication date: December 22, 2011
    Applicant: Cypress Semiconductor Corporation
    Inventor: Tim Olson
  • Patent number: 8080453
    Abstract: A semiconductor structure includes a semiconductor substrate, a gate layer containing silicon on the semiconductor substrate, a metallic layer on the gate layer, and a nitride layer on the metallic layer. The gate layer contains a P+ region and an N+ region.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: December 20, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Alain Blosse, Krishnaswamy Ramkumar
  • Patent number: 8082373
    Abstract: A universal serial bus controller pre-generates and stores a subset of USB commands in a memory, the pre-generated commands available for transmission to at least one USB peripheral device over universal serial bus, and transfers at least one command from the subset of pre-generated commands stored in the memory to the USB peripheral device over the universal serial bus. The universal serial bus controller may receive a response to the transferred command from the USB peripheral device over the universal serial bus, and send an acknowledgment packet to the USB peripheral device over the universal serial bus responsive to receiving the response from the USB peripheral device.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: December 20, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: David Wright, Steve Kolokowsky
  • Patent number: 8082531
    Abstract: A method and an apparatus to design a processing system using a graphical user interface (GUI) are described. The method includes allowing a user to define a transfer function via a GUI. The method may further include submitting the transfer function to a processing device maker associated with a processing device. The processing device maker may generate processing device code without intervention by the user. Furthermore, the processing device may execute the processing device code to perform the transfer function defined.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: December 20, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kenneth Ogami, Douglas Anderson, Jon Pearson
  • Patent number: 8080984
    Abstract: A voltage regulator is provided having high accuracy, low PSRR, and no headroom limitation. Generally, the regulator includes: an operational amplifier (OPAMP) having a non-inverting input coupled to a reference voltage; an output source follower coupled to and controlled by an output of the OPAMP, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the regulator; a replica source follower coupled to and controlled by the OPAMP, the replica source follower including a drain coupled to the voltage source and a source coupled to circuit ground through a resistor network; and a feedback circuit extending from the output-node through a feedback resistor to the source of the replica source follower and through at least a first resistor of the resistor network to an inverting input of the OPAMP to couple a feedback voltage thereto. Other embodiments are also provided.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: December 20, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Lionel Geynet
  • Publication number: 20110304354
    Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other mirco-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.
    Type: Application
    Filed: May 2, 2011
    Publication date: December 15, 2011
    Applicant: Cypress Semiconductor Corporation
    Inventors: Warren Snyder, Bert Sullman, Haneef Mohammed
  • Patent number: 8076949
    Abstract: An embodiment of the present invention is directed to a method for rejecting sensor information when a switch is being pressed in a system having sensors over switches. A switch in the process of being pressed may be determined based on an increase in pressure which may be determined by measuring the increase in capacitance at a plurality of capacitive sensors. The rejection of sensor information when the switch is being pressed allows the user interface to more accurately thus facilitates smooth and jitterless interface operation.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: December 13, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andrew Best, Robert Birch, Louis Bokma, Jonathan R. Peterson
  • Patent number: 8078973
    Abstract: A method of providing visual indication of a device connection speed proceeds by determining a connection speed of the device and selecting a visual indicator representative of the connection speed. Once the appropriate indicator has been selected, the visual indicator is then displayed.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: December 13, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eric J. Luttmann, Dave Gilbert
  • Patent number: 8078970
    Abstract: A graphical user interface for configuring a programmable integrated circuit is disclosed. More specifically, the graphical user interface may comprise a displayed graphical representation of the programmable integrated circuit, where the graphical representation includes one or more selectable portions which may represent actual circuitry or components of the programmable integrated circuit. A user-selectable list box may be displayed which comprises one or more selectable items for configuring a selected portion of the graphical representation of the programmable integrated circuit. The user-selectable list box may be displayed in response to a selection of a selectable portion of the programmable integrated circuit for configuration. Additionally, the user-selectable list box may disappear or no longer be displayed in response to a user interaction outside the user-selectable list box, in response to a selection of an item from the user-selectable list box, etc.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: December 13, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Doug Anderson
  • Patent number: 8078894
    Abstract: Power management architectures, methods and systems for programmable integrated circuit are disclosed. One embodiment of the present invention pertains to a power management software architecture which comprises power management modules each associated with a respective driver. Each driver is associated with a component of a programmable integrated circuit and displayable as a graphic image within an on-screen display of an integrated circuit design tool for programming the programmable integrated circuit. In addition, each power management module is operable to report power consumption data customized to its respective driver. The power management software architecture also comprises a power source module associated with a power source for the programmable integrated circuit for reporting power supply characteristics.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: December 13, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Kenneth Y. Ogami
  • Patent number: 8072429
    Abstract: An apparatus and a method for resolving locations of two or more substantially simultaneous touches on a touch-sensor device. The method may include detecting presences of two or more substantially simultaneous touches on a touch-sensor device at respective locations on the touch-sensor device, and resolving locations of two or more substantially simultaneous touches on the touch-sensor device. The apparatus may include a first set of sensor elements disposed in a first axis, a second set of sensor elements disposed in a second axis, and a third set of sensor elements disposed in a third axis.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Edward L. Grivna
  • Patent number: 8072230
    Abstract: Disclosed is method for compensating for variation in the capacitance between multiple capacitive sensors. Prior to sensing operations, baseline capacitance values can be acquired for all sensors. A correction factor can be calculated based on such baseline values. During sensing operations (run-time), variations in capacitance from baseline values can be modified by appropriate correction factors. Sensitivity between sensors can thus be made more uniform.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dennis Seguine
  • Patent number: 8072247
    Abstract: A circuit in accordance with one embodiment of the invention can include a variable voltage generator that is coupled to receive an input voltage. Furthermore, the circuit can include a non-volatile memory that is coupled to the variable voltage generator. The non-volatile memory can be coupled to receive programming for controlling an output voltage of the variable voltage generator.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G. Wright
  • Patent number: 8074086
    Abstract: Disclosed are a circuit and a method for controlling dynamic in-rush current in a power management circuit. The circuit includes a current limiting unit having a first quantity of sleep mode devices. A voltage drop minimization unit is coupled to the current limiting unit and has a second quantity of sleep mode devices. The second quantity of sleep mode devices is greater than the first quantity of sleep mode devices. A sequential enabling unit is coupled to both the current limiting unit and the voltage drop minimization unit. The sequential enabling unit is configured to turn on the voltage drop minimization unit after the current limiting unit in accordance with a predetermined delay.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Sanjay Kumar Sancheti, Anup Nayak, Bo Gao
  • Patent number: 8072277
    Abstract: A frequency synthesizer is described illustrating a method for modulation having an adjustable standard curve used to modulate an input signal for spread spectrum modulation. In particular, the a standard curve is generated, wherein the standard curve modulates an input signal to generate a spread spectrum of frequencies. The standard curve is associated with a standard modulation frequency. The standard curve is sampled at a constant sampling frequency. A shape of the standard curve is adjusted, such that critical points of the standard curve are captured when sampling the standard curve. The shape of said standard curve that is altered varies between at least two periods.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Shuliang Li
  • Patent number: 8073042
    Abstract: A method and apparatus for detecting out-of-specification data streams and voltage controller oscillator operation. Data may be received over evaluation periods. Each evaluation period is segmented into n sub-periods. Each n sub-period has the same length. Each n sub-period spans a portion of the data. The corresponding data period starting at each of the n sub-period is evaluated. The sub-period interval counts may be stored in a first-in-first-out register.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Edward L. Grivna
  • Patent number: 8073005
    Abstract: A method and apparatus for configuring signal lines with idle codes is disclosed. According to one embodiment, data transmission system (100) may include encoders (112, 114, 116 and 118) that transmit data over signal line lanes (Lane 0 to Lane n). In an idle state, an encoder (112, 114, 116 and 118) may output one of at least two idle codes (IDLE A and IDLE B). One idle code (IDLE A) may indicate a first lane of a group of lanes. Another idle code (IDLE B) may indicate subsequent lanes of a group of lanes.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: December 6, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: David V. James, Jagadeesan Rajamanickam