Patents Assigned to Cypress Semiconductor
  • Patent number: 10834692
    Abstract: A method can include receiving a timing signal that is part of a first communication protocol; by operation of a master device operating according to a second communication protocol, determining event timing windows for a plurality of slave devices of the master device; and by operation of the master device, transmitting control packets to the slave devices, adjusting clock values in the slave devices to sequentially order the event timing windows within an event group window; wherein the event window is timed according to the timing signal. Related devices and systems are also disclosed.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: November 10, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventor: Raghunatha Kondareddy
  • Patent number: 10832029
    Abstract: A fingerprint sensor-compatible overlay material which uses anisotropic conductive material to enable accurate imaging of a fingerprint through an overlay is disclosed. The anisotropic conductive material has increased conductivity in a direction orthogonal to the fingerprint sensor, increasing the capacitive coupling of the fingerprint to the sensor surface, allowing the fingerprint sensor to accurately image the fingerprint through the overlay. Methods for forming a fingerprint sensor-compatible overlay are also disclosed.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: November 10, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Roman Ogirko, Hans Klein, David G. Wright, Igor Kolych, Andriy Maharyta, Hassane El-Khoury, Oleksandr Karpin, Oleksandr Hoshtanar, Igor Kravets
  • Patent number: 10826499
    Abstract: A method for operating a system level interconnect in an integrated circuit (IC) is provided in an example embodiment. The method comprises: writing, by a microcontroller in the IC, a first configuration value into a configuration register, where the first configuration value programs the system level interconnect to couple a first peripheral to a second peripheral; monitoring the IC to determine an operational state of the IC; and in response to determining a change in the operational state of the IC, writing by the microcontroller a second configuration value into the configuration register to dynamically change interconnections in the system level interconnect between the first peripheral and the second peripheral.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 3, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bert Sullam, Warren Snyder, Haneef Mohammed
  • Patent number: 10824423
    Abstract: A reconfigurable arithmetic device includes a plurality of processor elements configured to perform first arithmetic processes corresponding to a first type of instruction and second arithmetic processes corresponding to a second type of instruction, a random-access memory (RAM), and a control unit. The first type of instruction is written into the RAM at a first address, data for the first type of instruction is written into the RAM at a second address, and data for the second type of instruction is written into the RAM at a third address. When the first type of instruction is written at the first address, the control unit decodes the first type of instruction and configures the processor elements to perform the first arithmetic processes. When data for the second type of instruction is written at the third address, the control unit configures the processor elements to perform the second arithmetic processes.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: November 3, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hiroshi Furukawa, Ichiro Kasama
  • Patent number: 10818761
    Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: October 27, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Shenqing Fang, Chun Chen, Unsoon Kim, Mark Ramsbey, Kuo Tung Chang, Sameer Haddad, James Pak
  • Publication number: 20200336993
    Abstract: A method can include at a first station in a wireless network, receiving path loss (PL) transmissions from at least a second station, dynamically changing power for transmissions from the first station to the second station based on the received PL information, determining PL values for transmissions received at the first station from other stations, and sending PL transmissions from the first station that include the determined PL values for at least one other station. The PL transmissions are configured to be received by stations of the same wireless network and stations of a different wireless network. Corresponding devices and systems are also disclosed.
    Type: Application
    Filed: September 16, 2019
    Publication date: October 22, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Xianmin Wang, Hui Luo, Hongwei Kong
  • Patent number: 10809787
    Abstract: A device includes a USB-C controller instantiated as a first integrated circuit that includes a first set of host terminals coupled to host controllers and a second set of terminals coupled to sets of D+/D? terminals of a type-C receptacle. A D+/D? multiplexer is to selectively couple the first set of host terminals to the second set of terminals. An electrostatic discharge (ESD) protection circuit is coupled between the D+/D? multiplexer and the second set of terminals. A charger detector circuit is coupled between a positive data system terminal and a negative data system terminal of the first set of terminals, the charger detector circuit to detect whether the second set of terminals is coupled to a USB charger through the type-C receptacle.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: October 20, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Anup Nayak, Karri Rajesh, Hemant P. Vispute, Arun Khamesra
  • Patent number: 10811952
    Abstract: Systems, methods, and devices implement direct current (DC)-DC converters having fast wake up times and low ripple effects. Methods include determining a DC-DC converter is to be transitioned from an operational mode to a low power mode, and storing a voltage at an input of a comparator coupled to an input of a charge pump, the voltage being stored in a feedback capacitor of a feedback regulation loop. The methods further include uncoupling a voltage trimming circuit from the input of the comparator, and maintaining, at least in part, the stored voltage at the feedback capacitor during the low power mode.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: October 20, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventor: Oren Shlomo
  • Patent number: 10809944
    Abstract: A non-volatile memory (NVM) integrated circuit device includes an NVM array of memory cells partitioned into a first physical region to store a first firmware stack and a second physical region to store a second firmware stack. The NVM integrated circuit device also includes a processing device that enables a host microcontroller to execute in place the first firmware stack stored within a first set of logical addresses that is mapped to the first physical region. The processing device tracks accesses, by the host microcontroller, to the first set of logical addresses. The processing device, in response to detecting one of a certain number or a certain type of the accesses by the host microcontroller, initiates a recovery operation including to remap the first set of logical addresses to the second physical region.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: October 20, 2020
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Sergey Ostrikov, Stephan Rosner, Avi Avanindra, Hans Van Antwerpen
  • Publication number: 20200329037
    Abstract: A device includes a security controller to determine whether a wireless security device is authorized to access at least one resource protected by a secure access device based, at least in part, on identification signals that originate from the wireless security device. The security controller is configured to receive location information corresponding to the wireless security device from at least one wireless device. When the wireless security device is authorized to access at least one resource, the security controller is configured to direct the security access device to disable at least one security measure that restricts user access to the at least one resource based, at least in part, on the location information corresponding to the wireless security device.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Paul Frank Beard, David G. Wright
  • Patent number: 10805936
    Abstract: A wireless communication device and method for operating the same for mitigating interference in a wireless communication network are provided. Generally, the method includes sensing with the wireless communication device pulses of electromagnetic radiation recurring within a band of frequencies used by the device for communication of signals, identifying the pulses as interference, and determining a number of frequencies of the interference within the band of frequencies used by the wireless communication device. Next, a sensitivity of the wireless communication device is reduced upon sensing one of the pulses and repeated at a frequency corresponding to the frequency of the interference. Thus, a spectrum of electromagnetic radiation around the wireless communication device is perceived by the device as free of interference, enabling it to transmit and/or receive more often. Other embodiments are also disclosed.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: October 13, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kiran Uln, Kamesh Medapalli
  • Patent number: 10802571
    Abstract: Techniques for power-Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a method for an USB-enabled system with an integrated circuit (IC) controller comprises: determining, by the IC controller, whether a first power path or a second power path is coupled to the IC controller, where the first power path comprises an external N-channel power-FET and the second power path comprises an external P-channel power-FET; turning and maintaining ON the external N-channel power-FET by the IC controller, when the first power path is determined as being coupled to the IC controller; and turning OFF the external N-channel power-FET and turning and maintaining ON the external P-channel power-FET by the IC controller, when the second power path is determined as being coupled to the IC controller.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: October 13, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Anup Nayak, Ramakrishna Venigalla
  • Publication number: 20200321963
    Abstract: A programmable input/output (I/O) circuit includes an output buffer coupled between an output signal and an I/O pad and an input comparator coupled between an input signal and the I/O pad. The input comparator includes a first input coupled to the I/O pad. A multiplexor receives a select signal for selecting a first reference voltage from the plurality of reference voltages at a first time and for dynamically selecting a second reference voltage from the plurality of reference voltages at a second time.
    Type: Application
    Filed: April 29, 2020
    Publication date: October 8, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Timothy John Williams, David G. Wright, Gregory John Verge, Bruce E. Byrkett
  • Publication number: 20200319733
    Abstract: An apparatus for inductive sensing or capacitive sensing is described. The apparatus may include a signal generator to output on a first terminal a first signal in a first mode and a second signal in a second mode. The apparatus may include a charge measuring circuit to receive on a second terminal a third signal in the first mode and a fourth signal in the second mode. The third signal is representative of an inductance of a sense unit coupled between the first terminal and the second terminal. The fourth signal is representative of a capacitance of the sense unit.
    Type: Application
    Filed: March 20, 2020
    Publication date: October 8, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Cathal O'Lionaird, Markus Unseld, Paul Walsh
  • Publication number: 20200321734
    Abstract: In an example embodiment, a method for a Universal Serial Bus Type-C (USB-C) controller is provided. The method comprises: coupling a control channel PHY of the USB-C controller to a first configuration channel (CC) terminal of the USB-C controller; coupling a VCONN supply terminal to a second CC terminal of the USB-C controller; detecting that a voltage across the second CC terminal of the USB-C controller and the VCONN supply terminal is greater than a predetermined threshold; and in response to detecting that the voltage is greater than the predetermined threshold, decoupling the VCONN supply terminal from the second CC terminal of the USB-C controller.
    Type: Application
    Filed: March 17, 2020
    Publication date: October 8, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Hemant P. Vispute, Partha Mondal
  • Patent number: 10797744
    Abstract: An example system and method operate a wireless device in a first mode with power to operate a communication resource of the wireless device turned off. While operating the wireless device in the first mode, the system and method evaluates an attribute in a first portion of sensor data. Responsive to the evaluation of the attribute, the system and method transitions to the wireless device to operate in a second mode with power to operate the communication resource turned on. The system and method use the communication resource to establish a wireless connection and communicate packets via the wireless connection.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: October 6, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kamesh Medapalli, Brian Bedrosian
  • Publication number: 20200313988
    Abstract: According to embodiments, methods, devices and systems can include monitoring all of a first channel for a first monitoring period. After the first monitoring period, monitoring at least one narrow band for at least a first narrow band signal. In response to detecting the first narrow band signal, establishing a network connection over the narrow band, wherein the at least one narrow band has a frequency range less than one half that of the first channel.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Paul Strauch, Ayush Sood, Kiran Uln, Kamesh Medapalli, Prasanna Sethuraman, Rajendra Kumar Gundu Rao, Saishankar Nandagopalan
  • Publication number: 20200314767
    Abstract: Embodiments can include methods, devices and systems which can transmitting a preamble across a first channel according to a first communication protocol; sequentially transmitting signal values in a plurality of narrow bands; monitoring the narrow bands for response communications; and upon detecting response communications on at least one of the narrow bands, establishing communications across at least one of the narrow bands. Each narrow band can be a different portion of the first channel.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Paul Strauch, Ayush Sood, Kiran Uln, Kamesh Medapalli, Prasanna Kumar Sethuraman, Rajendra Kumar Gundu Rao, Saishankar Nandagopalan
  • Patent number: 10788875
    Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 29, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Anup Nayak
  • Patent number: 10788937
    Abstract: An apparatus and method of measuring a collective capacitance on a group of capacitive sense elements from at least one of rows or columns of a capacitance sense array when in a first mode, and individually measuring capacitances on each of the rows and columns when in a second mode.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: September 29, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G. Wright