Patents Assigned to Cypress Semiconductor
  • Publication number: 20190306806
    Abstract: A system and method are provided for extending range of devices in a legacy wireless network. Generally, the method involves providing in a transmitter of the system a frame having a first field including a number of preamble segments and a second field including a number of data segments. The transmitter in the system is then operated to transmit at least one of the preamble segments with at least a first transmit power, and to transmit the segments of the second field at a second transmit power, wherein the first transmit power is greater than the second transmit power. Other embodiments are also described.
    Type: Application
    Filed: March 20, 2019
    Publication date: October 3, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Ayush Sood, Ashok Nimmala, Kempraju G., Kamesh Medapalli
  • Publication number: 20190304486
    Abstract: Systems and methods provide a first sample of audio data and detect speech onset in the first sample of the audio data. Responsive to detecting the speech onset, systems and methods switch from capturing second samples of the audio data at first intervals, to capturing the second samples of the audio data at second intervals. Systems and methods provide contiguous audio data using the second samples of the audio data captured at the first intervals and at least one captured portion of the second samples of the audio data captured at the second intervals.
    Type: Application
    Filed: April 16, 2019
    Publication date: October 3, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Robert Zopf, Victor Simileysky, Ashutosh Pandey, Patrick Cruise
  • Patent number: 10429998
    Abstract: A capacitance-sensing circuit may include a plurality of channel inputs associated with measuring a capacitance of a unit cell of a capacitive sense array. The capacitance-sensing circuit may also include a baseliner component that is coupled to the plurality of channel inputs. The baseliner component may generate a baseline compensation signal using a capacitive circuit and may provide the baseline compensation signal to each of the plurality of channel inputs of the capacitive sense array.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: October 1, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Roman Ogirko, Denis Ellis, Kaveh Hosseini, Brendan Lawton
  • Patent number: 10433346
    Abstract: A method includes receiving an absence schedule and storing the absence schedule in a memory. The absence schedule indicates a plurality of absence periods during which a group owner device in a wireless network will be unavailable for receiving transmissions in a frequency band. The method further includes controlling a primary radio transceiver of a wireless device based on the absence schedule, receiving a first request from a secondary radio transceiver of the wireless device to transmit a first wireless message in the frequency band, and granting the first request in response to determining based on the stored absence schedule that a transmission time of the first wireless message is within one of the plurality of absence periods.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: October 1, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventor: Raghavendra Kencharla
  • Publication number: 20190294855
    Abstract: A fingerprint sensor-compatible overlay material which uses anisotropic conductive material to enable accurate imaging of a fingerprint through an overlay is disclosed. The anisotropic conductive material has increased conductivity in a direction orthogonal to the fingerprint sensor, increasing the capacitive coupling of the fingerprint to the sensor surface, allowing the fingerprint sensor to accurately image the fingerprint through the overlay. Methods for forming a fingerprint sensor-compatible overlay are also disclosed.
    Type: Application
    Filed: March 27, 2019
    Publication date: September 26, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Roman Ogirko, Hans Klein, David G. Wright, Igor Kolych, Andriy Maharyta, Hassane El-Khoury, Oleksandr Karpin, Oleksandr Hoshtanar, Igor Kravets
  • Publication number: 20190294226
    Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.
    Type: Application
    Filed: February 15, 2019
    Publication date: September 26, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Anup Nayak
  • Publication number: 20190288532
    Abstract: Techniques for control of power switches in a USB Power Delivery (USB-PD) system are described herein. In an example embodiment, an integrated circuit comprises a programmable gate control circuit coupled to a provider field effect transistor (FET) and a consumer FET to provide control signals to the provider and consumer FETs in response to system conditions and application requirements of the USB-PD system. A pulldown current control circuit may provide additional control to slew rate for the slow turn-ON of provider and consumer FETs.
    Type: Application
    Filed: May 18, 2018
    Publication date: September 19, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin Mattos, Hamid Khodabandehlou, Sumeet Gupta, Syed Raza, Anup Nayak
  • Publication number: 20190289487
    Abstract: An apparatus includes a Bluetooth transceiver configured to receive a packet transmitted to a Bluetooth mesh network via a radio-frequency signal. The apparatus also includes a processing device coupled to the Bluetooth transceiver. The processing device is configured to determine a strength of the radio-frequency signal. The processing device is also configured to determine a time period based on the measure of strength of the radio-frequency signal. The processing device is further configured to determine whether the Packet was received again during the time period. The processing device is further configured to transmit the Packet to the Bluetooth mesh network in response to determining that the Packet was not received again during the time period.
    Type: Application
    Filed: June 28, 2018
    Publication date: September 19, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventor: Robert Hulvey
  • Publication number: 20190288792
    Abstract: A system includes a transmitter configured to transmit an original packet. The system also includes a receiver comprising a processing device. The processing device is configured to receive a corrupted Bluetooth® packet of the original packet and at least one retransmitted packet of the original packet. The processing device is also configured to generate an accumulated packet based on the corrupted packet and the at least one retransmitted packet, and generate a decision packet for the original packet based on the accumulated packet. The processing device is further configured to verify the decision packet to determine whether the decision packet is correct.
    Type: Application
    Filed: September 14, 2018
    Publication date: September 19, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventor: Robert Zopf
  • Publication number: 20190289448
    Abstract: Disclosed herein are systems, methods, and devices for time of arrival estimation in wireless systems and devices. Devices include a packet detector configured to identify a data packet included in a received signal having a symbol frequency. Devices also include a time stamping unit configured to generate an initial time stamp in response to the packet detector identifying the data packet. Devices further include an IQ capture unit configured to acquire a plurality of IQ samples representing phase features of the received signal. Devices additionally include a processing unit that includes one or more processors configured to generate an estimated time of arrival based on the initial time stamp and the plurality of IQ samples.
    Type: Application
    Filed: June 28, 2018
    Publication date: September 19, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventor: Victor Simileysky
  • Publication number: 20190278731
    Abstract: Techniques for voltage discharge from a USB Power Delivery (USB-PD) VBUS line are described herein. In an example embodiment, an integrated circuit comprises a discharge control logic coupled to a first discharge circuit and to a second discharge circuit. The first discharge circuit configured to couple to a power source node on the VBUS line. The second discharge circuit configured to couple to an output node on the VBUS line. The discharge control logic is configured to independently control the first discharge circuit and the second discharge circuit to discharge the voltage on the VBUS line.
    Type: Application
    Filed: May 18, 2018
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin Mattos, Godwin Gerald Arulappan, Syed Raza, Anup Nayak, Sumeet Gupta, Venkat Mandagulathur
  • Publication number: 20190279641
    Abstract: A phrase detection device includes a high latency pipeline to transmit a first portion of audio data from an audio data source to a processing unit, where the high latency pipeline includes a history buffer to store the first portion of the audio data, and a low latency pipeline to transmit a second portion of the audio data from the audio data source to the processing unit with a lower latency than the high latency pipeline. A sound onset detector coupled with the audio data source detects a sound onset event based on the audio data. A synchronization circuit coupled with the high latency pipeline and the low latency pipeline, in response to the sound onset event, synchronizes output to the processing unit of the first portion of the audio data stored in the history buffer and the second portion of the audio data via the low latency pipeline.
    Type: Application
    Filed: June 5, 2018
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Victor Simileysky, Robert Zopf
  • Publication number: 20190278360
    Abstract: Techniques for power-Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a method for an USB-enabled system with an integrated circuit (IC) controller comprises: determining, by the IC controller, whether a first power path or a second power path is coupled to the IC controller, where the first power path comprises an external N-channel power-FET and the second power path comprises an external P-channel power-FET; turning and maintaining ON the external N-channel power-FET by the IC controller, when the first power path is determined as being coupled to the IC controller; and turning OFF the external N-channel power-FET and turning and maintaining ON the external P-channel power-FET by the IC controller, when the second power path is determined as being coupled to the IC controller.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Anup Nayak, Ramakrishna Venigalla
  • Publication number: 20190279702
    Abstract: Semiconductor memory devices and methods of operating the same are provided. The method of operation may include the steps of selecting a ferroelectric memory cell for a read operation, coupling a first pulse signal to interrogate the selected ferroelectric memory cell, the selected ferroelectric memory cell outputting a memory signal to a bit-line in response to the first pulse signal, coupling the memory signal to a first input of a sense amplifier via the bit-line, electrically isolating the sense amplifier from the selected ferroelectric memory cell, and enabling the sense amplifier for sensing after the sense amplifier is electrically isolated from the selected ferroelectric memory cell. Other embodiments are also disclosed.
    Type: Application
    Filed: August 24, 2018
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Alan D. DeVilbiss, Jonathan Lachman
  • Publication number: 20190281449
    Abstract: A method includes transmitting one or more segments of a security certificate on a wireless advertising channel of a peripheral device, where at least one of the segments of the security certificate identifies an authentication server, participating in a public key exchange between the peripheral device and a host device by transmitting a signed public key of the peripheral device, where the signed public key is signed in the security certificate, and transmitting one or more encrypted messages from the peripheral device to the host device via a first secure connection established based on the public key.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventor: Hui Luo
  • Publication number: 20190281455
    Abstract: A method can include detecting local devices with a wireless first communication interface (IF) of a gateway device; authenticating at least one local device with the gateway device, including by operation of the first communication IF and a second communication IF, relaying secure communications between the at least one local device and a server to enable authentication of the at least one local device by the server, and after receiving authentication of the at least one local device at the gateway device, transmitting user information for storage in a secure memory of the authenticated local device; and operating the gateway device as a common access point to the network for any of a plurality of local devices authenticated with the gateway device. Related systems and gateway devices are also disclosed.
    Type: Application
    Filed: September 19, 2018
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Hui Luo, Hongwei Kong, Kaiping Li, Sungeun Lee, Sridhar Prakasam
  • Publication number: 20190279729
    Abstract: Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, a method for suppression of program disturb in a flash memory array is provided. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). During a program memory operation, a first voltage, of a selected SG line, and a second voltage, of an unselected BL, are regulated independently of a power supply voltage of the flash memory array, where the first voltage is regulated in a first range of 0.9V to 1.1V and the second voltage is regulated in a second range of 0.4V to 1.2V.
    Type: Application
    Filed: February 6, 2019
    Publication date: September 12, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Chun Chen, Kuo Tung Chang, Yoram Betser, Shivananda Shetty, Giovanni Mazzeo, Tio Wei Neo, Pawan Singh
  • Patent number: 10403731
    Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: September 3, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Shenqing Fang, Chun Chen, Unsoon Kim, Mark Ramsbey, Kuo Tung Chang, Sameer Haddad, James Pak
  • Patent number: 10402022
    Abstract: A capacitive sensor array may include a first set of sensor electrodes and a second set of sensor electrodes. Each of the second set of sensor electrodes may intersect each of the first set of sensor electrodes to form a plurality of unit cells each corresponding to a pair of sensor electrodes including one of the first set of sensor electrodes and one of the second set of sensor electrodes. Each point within each of the plurality of unit cells may nearer to a gap between the pair of sensor electrodes corresponding to the unit cell than to a gap between any different pair of sensor electrodes, and a first trace pattern within a first unit cell of the plurality of unit cells may be different from a second trace pattern within an adjacent unit cell of the plurality of unit cells.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: September 3, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Massoud Badaye, Peter G Vavaroutsos, Milton D. A. Ribeiro, Oleksandr Hoshtanar
  • Patent number: 10394749
    Abstract: An on-vehicle system comprises a Clock Extension Peripheral Interface (CXPI) bus and a device coupled to the CXPI bus. The device comprises a transceiver configured to: detect a baud rate clock signal and a phase difference between the baud rate clock signal and an input data signal that was generated asynchronously from the baud rate clock signal; obtain a timing from an edge of the baud rate clock signal based the phase difference; capture a value of the input data signal at the timing; and transmit the captured value as an output data signal over the CXPI bus.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: August 27, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Akihiro Suzuki, Masami Nakashima, Masuo Inui, Koji Okada, Takeo Zaitsu, Takashi Shimizu, Shinichi Yamamoto, Kazuhiro Tomita, Susumu Kuroda