Abstract: A method can include receiving frequency hop configuration data for a first wireless communication protocol via a second wireless communication protocol in second communication circuits; and configuring first communication circuits to communicate according to the first communication protocol with frequency hopping indicated by the frequency hop configuration data; wherein the first communication circuits and second communication circuits are formed in a same combination device. Related devices and systems are also disclosed.

Abstract: An example system and method operate a wireless device in a first mode with power to operate a communication resource of the wireless device turned off. While operating the wireless device in the first mode, the system and method detects a voice attribute in a first portion of audio data, the audio data based on microphone input. Responsive to the detection of the voice attribute, the system and method transitions to the wireless device to operate in a second mode with power to operate the communication resource turned on. The system and method use the communication resource to establish a Bluetooth (BT) connection and communicate packets via the BT connection, the communicating of the packets based on the audio data.

Abstract: A method and apparatus for sensing a conductive object by a mutual capacitance sensing array is described according to an embodiment of the present invention. The mutual capacitance sensing array comprises one or more sensor elements. Each sensor element comprises an outer frame including a conductive material. A cavity is formed within the interior of the outer frame.

Abstract: A system and method for determining position information. The method includes selecting a column, a first row, and a second row of a capacitive sensor array. The first row and second row intersect with the column of the capacitive sensor array. The method further includes measuring a differential capacitance between the first row and the second row and utilizing the differential capacitance in determining a location of an object proximate to the capacitive sensor array.

Abstract: A communication system and method are disclosed for parallel processing of received signals to improve sensitivity of the system. Generally, the method includes demodulating a modulated signal in a first demodulator circuit and a second demodulator circuit in parallel. The first and second demodulated signals are then de-whitened, and a cyclic redundancy code (CRC) check performed on each. If the de-whitened first demodulated signal passes the CRC check a first packet included in the signal is sent to a central processing unit (CPU) for further processing. If the de-whitened second demodulated signal passes the CRC check, and the de-whitened first demodulated signal fails, a second packet included in the de-whitened second demodulated signal is transmitted to the CPU for further processing. In one embodiment, one of demodulator circuits is a GFSK demodulator operated in the phase domain and configured to use maximum likelihood sequence estimation. Other embodiments are also described.

Abstract: An electronic device includes a first switch configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a first SBU terminal of a USB-C receptacle. The electronic device also includes a second switch configured to connect a second sideband use (SBU) terminal of the USB-C controller to a second SBU terminal of the USB-C receptacle. The electronic device further includes a voltage protection circuit configured to deactivate one or more of the first switch and the second switch when a voltage exceeding a predetermined threshold is detected. The voltage protection circuit includes a first set of diodes coupled to the first SBU terminal of the USB-C controller and a second set of diodes coupled to the second SBU terminal of the USB-C controller.

Abstract: Fingerprint detection circuits with common mode noise rejection are described. The Fingerprint detection circuit includes a half-bridge circuit coupled to a receive (RX) electrode of an array of fingerprint detection electrodes and to a buried capacitance that is unalterable by the presence of a conductive object on the array. The fingerprint detection circuit may also include a listener electrode configured to enable common mode noise rejection through a differential input stage of a low noise amplifier (LNA).

Abstract: An example system and method, during operation of first communication circuitry in a first operating mode comprising first power consumption, uses the first communication circuitry to perform packet arbitration for wireless communications by the first communication circuitry, second communication circuitry, and third communication circuitry. During operation of the first communication circuitry in a second operating mode comprising second power consumption, the example system and method uses the second communication circuitry to perform packet arbitration for wireless communications by the second communication circuitry and a third communication circuitry.

Abstract: In an example embodiment, a device comprises a gate driver and a current detector circuit. The gate driver is configured to be coupled to a power switch on the VBUS line of a USB connector. The current detector circuit is configured to be coupled to the VBUS line and comprises a current sense amplifier, a reference voltage generator circuit, and a comparator. The current sense amplifier is configured to receive a pair of input voltages and to output an indicator signal responsive to the input voltage difference. The reference voltage generator circuit comprises a digital-to-analog converter configured to generate a reference voltage signal based on a received voltage selector signal that is a binary input signal comprising multiple bit values. The comparator is configured to receive the indicator signal and the reference voltage signal and to output an interrupt signal responsive to the indicator signal exceeding the reference voltage signal.

Abstract: An example system and method operate a wireless device in a first mode with power to operate a communication resource of the wireless device turned off. While operating the wireless device in the first mode, the system and method detects a voice attribute in a first portion of audio data, the audio data based on microphone input. Responsive to the detection of the voice attribute, the system and method transitions to the wireless device to operate in a second mode with power to operate the communication resource turned on. The system and method use the communication resource to establish a Bluetooth (BT) connection and communicate packets via the BT connection, the communicating of the packets based on the audio data.

Abstract: Wireless communication schemes and techniques are described, wherein a secondary device is configured to eavesdrop information communicated between a source and a primary device. Secondary device transmits a NACK signal to jam ACK signals from the primary device to the audio source, forcing a retransmit of audio information from the source to the primary, and available over an eavesdropping link between the secondary device and the source.

Abstract: A device includes an analog block array, a first analog bus segment coupled to the analog block array, a second analog bus segment coupled to the analog block array, and a third analog bus segment coupled to the analog block array. The device also includes a first I/O pin selectively couplable to the first analog bus segment, a second I/O pin selectively couplable to the second analog bus segment, and a third I/O pin selectively couplable to the third analog bus segment. A first switch is configured to selectively propagate a first analog signal on the first analog bus segment to the second analog bus segment, and a second switch is configured to selectively propagate a second analog signal on the first analog bus segment to the third analog bus segment. In a first mode of operation, the first and second switches are open. In a second mode of operation, the first switch is closed. In a third mode of operation, the second switch is closed.

Abstract: A method, apparatus, and system to detect whether a two-electrode touch button is pressed using a first self-capacitance measurement of an inner electrode of the two-electrode touch button and a second self-capacitance measurement of an outer electrode of the two-electrode touch button. The method, apparatus, and system further to detect whether the two-electrode touch button is pressed in view of presence of water proximate to the touch button.

Abstract: A memory string is disclosed including a plurality of core cells serially connected between a source select gate and a drain select gate along a channel. Each core cell includes a wordline separated from the channel by a stack of layers including a charge trapping layer. At least one of the source and drain select gates is a stacked select gate with a plurality of components, including a first component adjacent to the plurality of core cells and a second component separated from the core cells by the first component. The first component includes a wordline separated from the channel by a stack of layers including a charge trapping layer, and a distance between the wordline of the first component and the wordline of a first core cell in the plurality of core cells is substantially the same as distances between each wordline in the plurality of word core cells.

Abstract: An example embodiment provides a transceiver for communication includes a timing determiner that detects a fall from high level to low level of a bus signal generated by pulse width modulation of a clock signal and input from a communication bus; a transmission data signal delay adjuster that determines a second timing having a predetermined time difference from a first timing, the bus signal rising from the low level to the high level at the first timing; an encoder that extends a low level of the bus signal by changing a data signal to be output to the communication bus from high level to low level; and a timing adjustment circuit that changes the data signal to the low level at the second timing.

Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.

Abstract: Apparatuses and methods of distinguishing between a finger and stylus proximate to a touch surface are described. One apparatus includes a first circuit to obtain capacitance measurements of sense elements when a conductive object is proximate to a touch surface. The apparatus also includes a second circuit coupled to the first circuit. The second circuit is operable to detect whether the conductive object activates the first sense element, second sense element, or both, in view of the capacitance measurements. To distinguish between a stylus and a finger as the conductive object, the second circuit determines the conductive object as being the stylus when the second sense element is activated and the first sense element is not activated and determines the conductive object as being the finger when the first sense element and the second sense element are activated.

Abstract: A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.

Abstract: A device includes a USB-C controller instantiated as a first integrated circuit, the USB-C controller comprising a first pair of terminals to communicate with a first communication protocol that is other than USB, a second pair of terminals to communicate with a second communication protocol that is other than USB, and a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a type-C receptacle. The controller further includes a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals. The controller further includes a series of cascaded, low-voltage n-type field-effect transistors (LVNFETs) coupled between the multiplexer and each terminal of the third pair of terminals.

Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.