Abstract: An apparatus includes a non-volatile memory (NVM) device coupled to a host, the NVM device including a processing device to: receive a communication packet from a server via the host computing system that is coupled to the NVM device and communicatively coupled to the server, the communication packet comprising clear text data that requests to initiate secure communications; perform a secure handshake with the server, via communication through the host computing system, using a secure protocol that generates a session key; receive data, via the host computing system, from the server within a secure protocol packet, wherein the data is inaccessible to the host computing system; authenticate the data using secure protocol metadata of the secure protocol packet; optionally decrypt, using the session key, the data to generate plaintext data; and store the plaintext data in NVM storage elements of the NVM device.

Abstract: A semiconductor device having a substrate, a dielectric layer, a polycrystalline silicon (“poly”) resistor, a drain, and a source is disclosed. After implantation, the poly resistor may have a lateral doping profile with two peaks, one near each edge of the poly resistor, and a trough near the middle of the poly resistor. Such a doping profile can allow the poly resistor to have a resistance that is insensitive to small variations in critical dimension of the poly resistor. The resistance of the poly resistor may be determined by the doping dose of the tilted implant used to form the poly resistor. The tilted implant may be used to form the drain and the source of a transistor substantially simultaneously as forming the poly resistor.

Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.

Abstract: A method can include, by operation of a first device, generating sequence information for a plurality of sequential transmission windows, the sequence information including at least a channel identification (ID) corresponding to a base frequency for each window; generating payload data for a packet and wirelessly transmitting the packet in one of the windows, the payload data including sequence information for a window later in the sequence than the window in which the packet is transmitted. By operation of an application executed on a second device, a target packet can be composed that includes inverse whitened data; wherein the whitening of the inverse whitened data by the second device results in a substantially sinusoidal signal when the target packet is transmitted. The first device can determine a direction of the second device by processing the substantially sinusoidal signal. Devices for executing such a method are also disclosed.

Abstract: A power supply architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller comprises a power rail, a VDDD terminal, a VCONN terminal, and a VBUS terminal. The VDDD terminal, the VCONN terminal, and the VBUS terminal are coupled to the power rail, where a VCONN switch is coupled between the VCONN terminal and the power rail, and a VBUS regulator is coupled between the VBUS terminal and the power rail. The power rail is coupled to internal circuits of the IC controller and is configured to provide operating power to the internal circuits from any one of the VCONN terminal and the VBUS terminal.

Abstract: Systems, methods, and devices enable coexistence of traffic for collocated transceivers. Methods may include generating, using a processing device, a medium access schedule for at least a first transceiver based on a transmission parameter of a second transceiver, the second transceiver being collocated with the first transceiver and sharing a transmission medium with the first transceiver, and the medium access schedule comprising a QuietIE schedule. Methods may also include identifying a plurality of wireless devices communicatively coupled to the first transceiver. Methods may further include transmitting the QuietIE schedule to the plurality of wireless devices, the QuietIE schedule identifying a plurality of quiet periods and a plurality of available periods to the plurality of wireless devices.

Abstract: Implementations disclosed describe techniques to optimize performance of wireless networks having multi-band connectivity by steering devices connecting to the network to preferred frequency ranges. In an example embodiment, a method may comprise receiving, a first probe request from a client device at a first access point of the wireless network, establishing a first association between the first access point and the client device, the first access point operating at a first frequency range of the wireless network, receiving a second probe request from the client device at a second access point, the second access point operating at a second frequency range of the wireless network, sending a transition request over the first access point to instruct the client device to transition to the second access point, and establishing a second association between the second access point and the client device.

Abstract: A protecting circuit includes a discharge switch, a trigger circuit, and a shunt circuit. The discharge switch is connected between a first terminal and a second terminal. The trigger circuit is connected to the discharge switch and comprises load devices, connected in series between the first terminal and the second terminal, and a first node between a first one and a second one of the load devices. The shunt circuit is connected to the trigger circuit at the first node, where the shunt circuit comprises a shunt switch and a shunt pathway that is connected between the first node and the shunt switch.

Abstract: A system and method are provided for extending range of devices in a legacy wireless network. Generally, the method involves providing in a transmitter of the system a frame having a first field including a number of preamble segments and a second field including a number of data segments. The transmitter in the system is then operated to transmit at least one of the preamble segments with at least a first transmit power, and to transmit the segments of the second field at a second transmit power, wherein the first transmit power is greater than the second transmit power. Other embodiments are also described.

Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a metal-gate logic transistor formed in a first region of a substrate, and a non-volatile memory (NVM) cell including a select gate and a memory gate formed in a first recess in a second region of the same substrate, wherein the recess is recessed relative to a first surface of the substrate. The metal-gate logic transistor includes a planarized surface above and substantially parallel to the first surface, and top surfaces of the select gate and memory gate are approximately at or below an elevation of the planarized surface of the metal-gate. Generally, at least one of the top surfaces of the select gate or the memory gate includes a silicide formed thereon. Other embodiments are also disclosed.

Abstract: A method can include monitoring a transmission medium for packets of a first protocol type with first communication circuits while the medium is controlled by second communication circuits. Requesting access to the medium in response to the first communication circuits detecting a packet of the first protocol type. Upon being granted access to the medium, executing a data transmission operation. Yielding the medium back to the second communication circuits in response the first communication circuits completing the data transmission operation. Related devices and systems are also disclosed.

Abstract: Disclosed herein are systems, methods, and devices for user configurable wear leveling of non-volatile memory devices. Devices include a non-volatile memory including a plurality of physical memory portions, where each of the plurality of physical memory portions is configured to be mapped to a logical memory portion of a plurality of logical memory portions. Devices may also include wear leveling control circuitry configured to receive a plurality of wear leveling parameters, and further configured to determine a plurality of wear leveling characteristics based on the plurality of wear leveling parameters received, where the plurality of wear leveling characteristics identify an amount of wear leveling allowed for each of the plurality of logical memory portions.

Abstract: A power supply architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller comprises a power rail, a VDDD terminal, a VCONN terminal, and a VBUS terminal. The VDDD terminal, the VCONN terminal, and the VBUS terminal are coupled to the power rail, where a VCONN switch is coupled between the VCONN terminal and the power rail, and a VBUS regulator is coupled between the VBUS terminal and the power rail. The power rail is coupled to internal circuits of the IC controller and is configured to provide operating power to the internal circuits from any one of the VCONN terminal and the VBUS terminal.

Abstract: A voltage detector includes a comparison unit which is equipped with a plurality of comparators and which is configured to compare a threshold voltage and determination voltages corresponding to each comparator and output a first result of High or Low for each comparator and configured to compare an input voltage and the determination voltages and output a second result of High or Low for each comparator, and a determination unit configured to determine based on the first result and the second result whether or not the input voltage is less than or equal to the threshold voltage.

Abstract: An example apparatus uses a transceiver to determine a first attribute value of a first RF signal received through a first antenna during a first period. An attribute estimator determines a second attribute value of the first RF signal received through a second antenna during the first period. Responsive to a control signal, the apparatus switches the attribute estimator from being coupled to the second antenna to being coupled to a third antenna. The apparatus then uses the transceiver to determine a first attribute of a second RF signal received through the first antenna during a second period and uses the attribute estimator determine a second attribute of the second RF signal received through the third antenna during the second period. The apparatus then can estimate an angle of arrival associated with the first and second RF signals based on the first and second attributes of the first RF signal and the first and second attributes of the second RF signal.

Abstract: An example embodiment provides a transceiver for communication includes a timing determiner that detects a fall from high level to low level of a bus signal generated by pulse width modulation of a clock signal and input from a communication bus; a transmission data signal delay adjuster that determines a second timing having a predetermined time difference from a first timing, the bus signal rising from the low level to the high level at the first timing; an encoder that extends a low level of the bus signal by changing a data signal to be output to the communication bus from high level to low level; and a timing adjustment circuit that changes the data signal to the low level at the second timing.

Abstract: A circuit, system, and method for converting self capacitance to a digital value may include a pair of charge transfer circuits, each including a switch network, a sensor capacitor or modulation capacitor, and an integration capacitor may be coupled to a comparator to produce a data signal representative of the capacitance of the sensor capacitor of one of the charge transfer circuits. The data signal may be used to indicate a capacitance value of the self capacitance through conversion by a circuit.

Abstract: An example apparatus provides an input signal based on sound waves received by one or more microphones. The input signal includes a voice command component and one or more interference components. The apparatus receives audio data over one or more computer networks and the audio data corresponds to the one or more interference components. The apparatus uses the audio data to remove a portion of the one or more interference components from the input signal to generate an output signal, and provides the output signal, as an estimate of the voice command component, for speech recognition.

Abstract: An example includes accessing multiple configurations stored in a memory, where each configuration is associated with a corresponding circuit function implementable by an electronic device and associated with a corresponding set of resources of the electronic device. The example includes determining that one or more sets of resources of the electronic device are available for use by one or more configurations of the multiple configurations. Based on the determination, an embodiment includes representing a first configuration of the one or more configurations, using a graphical interface, and generating instructions that when executed cause the electronic device to be configured according the first configurations.

Abstract: A method, apparatus, and system measure, at a first channel of a processing device, a first signal indicative of a touch object proximate to an electrode layer. The first signal includes a touch data component and a first noise component generated by a noise source. The method, apparatus, and system measure, at a second channel of the processing device, a second signal including a second noise component generated by the noise source. The second channel is coupled to a shield layer disposed between the noise source and the electrode layer. The method, apparatus, and system generate an estimated noise signal using the second noise component of the second signal that is associated with the second channel. The method, apparatus, and system subtract the estimated noise signal from the measured first signal to obtain the touch data component of the first signal.