Abstract: An active pixel sensor which provides reduced dark current, improved sensitivity, and improved modulation transfer function. An N well, surrounded by a P well is formed in a P type epitaxial substrate. A P+ region is formed extending from within the P well into the substrate leaving a gap between the P+ region and the N well. A gate dielectric is formed covering at least the gap, part of the P+ region, and part of the N well. A gate electrode is formed on the gate dielectric over the gap, part of the P+ region, and part of the N well. The gate electrode is biased so that the region of the substrate under the gate electrode is accumulated with holes and the region of the N well under the gate electrode is depleted of electrons. This will reduce the dark current and improve the sensitivity of the active pixel sensor.

Abstract: A DC-to-DC voltage converter having an active charge/discharge circuit enabling the definition of any output voltage within its operating range has been achieved. A comparator compares the output voltage of a voltage converter with a defined reference voltage. This reference voltage can be easily modified within its operating range. In case the output voltage of the voltage converter is higher than said reference voltage a “reservoir” capacitor at the output of said voltage is discharged via an active charge/discharge circuit until the output voltage equals said reference voltage. Said active charge/discharge circuit is activated via a latch by said comparator. The invention is applicable for any type of DC-to-DC converters, such as e.g. charge pumps, buck converters and boost converters.

Abstract: Circuits and methods to achieve dynamic biasing for the complete loop transfer function of a current mode voltage regulator have been achieved. The circuit comprises a Mirror-Transconductor Amplifier type operational transconductance amplifier (OTA) wherein its transconductance is linearly dependent on its biasing current. This biasing current is a linearly derivative of the OTA's output current. A current amplification circuit couples the regulator output current linearly with said OTA's output current. In this configuration the iterative biasing of the OTA forms a feed-forward loop, which contains a low-pass filter for stability and a negative feedback loop is closed by connecting the regulator voltage output to the OTA input. The invention realizes a purely current mode regulator since all internal currents are generated as a fraction of the output load.

Abstract: A class B amplifier circuit produces a deadband that is independent of semiconductor process variations and creates a positive voltage when a differential input voltage is non-zero. A differential input amplifier couples differential currents representing the differential input voltage to a logarithmic compression circuit, which in turn creates an output voltage that is a function of the differential input voltage and is independent of semiconductor process variations. Transistor devices in the differential amplifier and the logarithmic compression circuit are biased in the non-saturated region of a transistor transfer curve in a weak inversion state. A combination of two comparator circuits compares the output voltage to a reference voltage to create a combined output voltage that is a positive when the input is non-zero.

Abstract: Methods and structures to reduce in semiconductor packages the length of critical electrical connections between bond pads on one or multiple semiconductor chips and wire landing pads on a substrate have been achieved. An electrical connection becomes critical if high current, high speed or radio frequency signals have to be transported. Moving the wire landing pads of critical connections on the substrate closer to the semiconductor chip utilizing unpopulated spaces of an array grid design reduces the length of said wires. This could be a ball grid array (BGA) or any other kind of grid array. Said methods and structures invented are applicable to single-chip modules and to multi-chip modules. The design of the grid array has to be modified to provide free spaces for the wire landing pads of critical electrical connections within the grid array close to the semiconductor chip as required by the design rules. The design change can be done without increasing the number of solder balls or solder pins, etc.

Abstract: This invention provides a method and an apparatus for power reduction for LCD drivers using backplane charge sharing. In addition, this invention relates to the use of switches between adjacent backplane drivers in order to transmit and reuse the discharged charge from one backplane's capacitance in order to charge the capacitance of an adjacent backplane. One embodiment of this invention utilizes N metal oxide semiconductor field effect transistors, NMOS-FETs to implement the switch connection between adjacent backplane drivers.

Abstract: A circuit and a method are given, to realize a very efficient driver device for igniters or squibs as used e.g. in airbag applications. Special attention has been turned to include secure and always reliable operating features into the device and at the same time to reach for a low-cost implementation with modern integrated circuit technologies. Controlled firing operation and sophisticated diagnostic mechanisms are realized. These design features have been acquired by use of current mirror circuit principles for the switching devices where appropriate and with special regard to production cost. Current trimming and limitation to secure values are part of the solution.

Abstract: Circuits and methods to shut down any charge pump having any number of stages have been achieved. The invention is especially relevant to charge pumps, which have a supply that is incapable of sinking significant current, such as a supply derived from an LDO. The shutdown can be done either until all stages have zero voltage or until all stages have the input voltage level. The shutdown is performed in a staged manner, from the output backwards to the input, so there is reduced charge sharing between the capacitors so that no voltage exceeds its normal operating range. An additional advantage of the present invention is that the charge pump can be switched back on, before the shutdown sequence is complete, with all internal and external nodes of the charge pump staying within their normal operating range.

Abstract: A circuit and a method are given, to realize a very efficient driver device for igniters or squibs as used e.g. in airbag applications. Special attention has been turned to include secure and always reliable operating features into the device and at the same time to reach for a low-cost implementation with modern integrated circuit technologies. Controlled firing operation and sophisticated diagnostic mechanisms are realized. These design features have to a great extent been acquired by consequently using current mirror circuit principles. Current trimming and limitation to secure values are part of the solution.

Abstract: Circuits and methods to convert a digital floating-point number into an analog current have been achieved. The conversion is performed directly by using an exponential current digital-to-analog converter (DAC) and a cascaded linear current digital-to-analog converter (DAC). The exponential current DAC is converting exponentially the exponent of the floating-point number, its output current is biasing the linear DAC, which is converting the mantissa of the floating-point number. The output current of the linear current DAC is correlates linearly with the value of the floating-point number. This technique is commutative, this means the sequence of the linear and the exponential converter can be interchanged. In this case the linear converter provides a biasing current to the exponential converter. The sign bit can be considered by converting the direction of the output current of the converter. This floating-point number conversion can handle a very high dynamic range and requires a minimum of chip space.

Abstract: A circuit and a related method to measure efficiently a load current in an integrated circuit using a current mirror configuration has been achieved. The current mirror configuration comprises three branches, a biasing branch, a load branch, and a measurement branch. The biasing branch comprises a current source and two transistors, the load branch comprises a load and two transistors, and the measurement branch comprises a means of measurement and two transistors. The biasing branch is attached to the load branch in a cascode mirror configuration and the measurement branch is also attached to the load branch in a cascode mirror configuration. The current in the measurement branch is linearly correlated to the current in the load branch and provides therefore an efficient way to measure the load current without any distortion of the load current.

Abstract: Circuits and methods to increase the transconductance of a current mirror in case of small input currents of the current mirror without affecting the transconductance of said current mirror in case of large input currents have been achieved. Key of the invention is a “bypass” formed by a transistor in series with a resistor, wherein the bypass is in parallel to the input transistor of the current mirror. This bypass is only relevant for very small input currents wherein the resistor can be neglected compared to the impedance of the bypass-transistor and therefore the total transconductance of the current mirror is increased in case of very small input currents. For large input currents the resistor of the bypass effectively blocks the “bypass” path. The invention solves e.g. a problem of amplifiers having any kind of dynamic biasing namely that the input impedance of current mirrors becomes too large for very small input currents.

Abstract: A system-on-a-chip (SOC) in CMOS technology capable to support high voltage applications has been achieved. The single chip system of the present invention comprises high-voltage circuitry, a complete micro-controller system including all timing control, interrupt logic, flash EEPROM program memory, RAM, flash EEPROM data memory and I/O necessary to implement dedicated control functions, and a core and system peripheral bus. A preferred embodiment of the invention is shown driving a DC-motor in a H-bridge configuration, having an AMR-position detection and control. A pulse width modulation (PWM) is applied to high-voltage (30 to 60 Volts or in lower ranges less than 30 Volts) CMOS buffers for steering CMOS-FETs or relays of the motor H-bridge.

Abstract: A new method and a circuit to improve the low voltage performance of a differential gain stage is achieved. The method comprises a monitoring stage and a differential stage. The monitoring stage comprises a differential transistor pair having first and second differential inputs, an upper current input, and a lower current output. In addition, a current source is connected to the upper current input, and a current load is connected to the lower current output. The differential stage comprises a differential transistor pair having first and second differential inputs, an upper current input, and first and second lower current outputs. In addition, a current source is connected to the upper current input, and first and second current loads are connected to the first and second lower current inputs. A current is forced through the monitoring stage current source. The current through the monitoring stage current source is mirrored in the differential stage current source.

Abstract: The domino asynchronous successive approximation (ASA) analog-to-digital converter (ADC) converts an analog signal to an n-bits digital signal. The domino ASA ADC is made out of n-blocks, corresponding to the number of n-bits of the digital output. Each of these n-blocks generates a conversion bit and calibrates all following blocks, comparable to a domino structure. One key advantage of the domino ASA ADC is its modular structure; each block is independent from all others. The unity capacitors used need to be matched only within their specific blocks. The architecture is very flexible; it is possible to increase the resolution by adding more blocks of the same kind. The ASA ADC is very fast, its speed is only limited the RC constants during the sampling and measurement phase and the speed of the comparators used.

Abstract: An accurate high current mirror circuit produces a mirrored current that matches an input current to produce an accuracy at the output of a subsequent stage of amplification of greater than 0.01%. A plurality of transistor devices are arranged in a symmetrical configuration and divided into two groups. The transistors in each of the two groups are connected in parallel to produce a high mirror current from a high input current. A distribution of a source voltage produces the same source voltage at each of the plurality of transistors. An input current metallization and a mirror current metallization are formed within the symmetrical configuration to have a same value of impedance. A plurality of P-channel transistors within the current mirror circuit control a voltage of a point on the input metallization to be the same as a reference voltage, thus causing the mirror current to be referenced around the reference voltage.

Abstract: A method and a system to reduce the power consumption of a LCD driver have been achieved. In order to save power a logic circuitry is connected to the output of a RAM automatically comparing displayed data on a line by line during the scan and, on detection of no data change, keeping the output pins static. In the case a COMMON row contains zero data only the corresponding common output is not selected and does not switch the display and hence saves the charging current for said row of data. This logic circuit is an extension to standard prior art circuitry controlling a LCD display.

Abstract: A method for measuring and filtering analog signals in a battery protection algorithm is achieved. A clock signal having a fixed period is generated. Analog signals are sampled to create sampled digital signals. The sampling is synchronized with the clock signal. The analog signals are sampled such that no two analog signals are sampled during a single fixed period. The sampled digital signals are filtered such that stored versions of the sampled digital signals are updated whenever the sampled digital signals transition to new states and remain in these new states for a defined number of the samplings. A circuit for measuring and filtering analog signals is in a battery protection circuit is also achieved. Sampling circuits are placed into standby mode when not sampling.

Abstract: A circuit and a method are given, to realize a dynamically adapting response speed behavior of memory sense electronics for Sense Electronics Endowed (SEE) memory devices. Fast memories use sense amplifiers in the read path in order to react fast with the data being delivered from a given address position. In order to achieve short response times, these sense amplifiers are normally responding very fast with accordingly high power consumption. Dynamically reducing the response speed after a certain “on” time of operation will save power for fast memories used in conditions where the utmost speed is not needed. Said circuit and method are designed in order to be implemented with a very economic number of components, capable to be realized with modern integrated circuit technologies.

Abstract: With self oscillating pulse width modulators, using a hysteretic comparator to change the output duty cycle according to the input signal, as often used for example for Class-D amplifiers or switching regulators, the frequency varies with output power and supply voltage. The disclosed invention presents a method to drastically reduce the frequency variation by introducing the combination of an analog and a digital feedback loop to shift the hysteretic threshold, ideally by providing a single absolute value, which is proportional to the pulse frequency and by alternating the polarity of shifting the hysteretic threshold, based on the actual output pulse phase.