Patents Assigned to Dialog Semiconductor GmbH
  • Patent number: 6791809
    Abstract: A charge/discharge protection circuit with n parallel load current switches and a control logic for the latter, which in an over-voltage event disconnects the battery from the charge/discharge terminals through sequentially controlled melting of integrated fusible links, where the control logic in an over-voltage event, simultaneously closes all load current switches, then following sequentially opens a first number of the load current switches, and at the same time closes the switch segments of a short-circuit switch array associated with the respective load current switch, so that the associated fusible links melt sequentially. After the opening of this first number of load current switches the latter closes again and at the same time the remaining number of still closed load current switches opens, as well as continues to sequentially close the remaining switch segments.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: September 14, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventor: Axel Pannwitz
  • Patent number: 6788114
    Abstract: A circuit and method are given, to realize a high voltage comparator, which generates an output signal for follow-up processing in the low-voltage domain. The high-voltage comparison task is essentially replaced by a current comparison, implemented as a combination of a voltage to current transforming stage with a CMOS current comparator circuit, where only very few parts are working in the high voltage domain. Using the intrinsic advantages of that solution the circuit of the invention is manufactured with standard CMOS technology and only four discrete or integrated extended drain MOS components at low cost. This solution reduces the complexity of the circuit and in consequence also power consumption and manufacturing cost.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: September 7, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventors: Rainer Krenzke, Dirk Killat
  • Patent number: 6784757
    Abstract: A highly stable single chip resonator controlled oscillator with automatic amplitude control and biasing is designed for manufacture with monolithic integrated circuit technologies. Analog and digital output buffers with elaborate control for power saving purposes and sophisticated start-up and power-up circuits ensure, that a crystal controlled oscillation is safely induced at start-up and that the amplitude of oscillation is continuously controlled during operation to reach low phase noise and reduce power consumption of the circuit.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: August 31, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventors: Andreas Sibrai, Kurt Fritzwenwallner
  • Patent number: 6784708
    Abstract: A circuit and method are given, to realize a high voltage output driver within a closed regulator loop with slew rate control, insensitive against supply voltage variations. The high-voltage front-end, essentially a slope detector, is implemented as a combination of a voltage-current with a current-voltage transformer circuit, where only very few parts are working in the high voltage domain. Using the intrinsic advantages of that solution the circuit of the invention is manufactured with standard CMOS technology and only two discrete or integrated extended drain MOS components at low cost.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: August 31, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventor: Rainer Krenzke
  • Publication number: 20040165093
    Abstract: A circuit and method for reducing noise in video imagers which takes advantage of the fact that the same image information is present in the drain current in a reset transistor used to reset a photodiode in a pixel as is present in the readout current. The noise is reduced by passing the multiplexed output voltage from the source follower output transistor in an APS imager system through a high pass filter to reduce the low frequency noise from the source follower. The drain current in the reset transistor used to reset the APS is passed through a low pass filter. The low pass filter output and the high pass filter output are then combined. Since the drain current in the reset transistor contains the same image information as the voltage output of the source follower output transistor the image information can be obtained by combining the output of the low pass filter and the output of the high pass filter.
    Type: Application
    Filed: January 8, 2004
    Publication date: August 26, 2004
    Applicant: Dialog Semiconductor Gmbh
    Inventors: Taner Dosluoglu, Peter Alan Levine
  • Patent number: 6781423
    Abstract: A circuit and method are given, to realize a high-voltage control and driver interface as integrated circuit, especially for use in connection with four external components, inductor L and capacitor C as well as low-side and high-side switching transistors as found e.g. in half-bridges. The circuit is essentially self supplied by means of an Intrinsically floating auxiliary supply power generation and regulation scheme. The circuit is apt to supporting high main supply voltages up to 1000V. The circuit of the invention is realized without the need for any internal high-voltage integrated semiconductor devices. Exploiting the advantages of that solution the circuit of the invention is manufactured with standard CMOS technology and only four discrete external components, which is favorably lowering the cost of production.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: August 24, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventor: Horst Knoedgen
  • Publication number: 20040155663
    Abstract: A circuit and a method to measure continuously the resistance of variable resistors in series as e.g. potentiometers within a sensor, used for e.g. a joystick, has been achieved. The voltage across said sensor comprising any number of variable resistors is stabilized. A constant current source is providing a minimum current through said sensor. A variable current source is used to zoom variations of current through the sensor caused by variations of resistance of the sensor. Said variable current is mirrored and by measuring the voltage across a shunt resistor the total resistance of the sensor is identified. Using ports between each of the resistors, voltages can be measured representing the resistance of each of the variable resistors using known equations of voltage dividers. Any number of variable resistors can be used in the circuit invented.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 12, 2004
    Applicant: Dialog Semiconductor GmbH.
    Inventor: Horst Knoedgen
  • Publication number: 20040155970
    Abstract: A method used for the compensation of vignetting in digital cameras has been achieved. The compensation for vignetting is done in two steps. The first step is done during production of the camera unit and involves taking and analyzing an image of a test screen, preferably a gray test screen. This results in a set of e.g. 5×5 coefficients describing a polynomial surface. The second step is done for each image that is taken by the camera and involves calculating and applying a gain-table based on polynomial coefficients to all pixels of the image to compensate vignetting.
    Type: Application
    Filed: March 4, 2003
    Publication date: August 12, 2004
    Applicant: Dialog Semiconductor GmbH
    Inventors: Anders Johannesson, Ingemar Larsson
  • Patent number: 6774644
    Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: August 10, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventor: Matthias Eberlein
  • Patent number: 6771121
    Abstract: A method to linearize the characteristic of a Class-D amplifier is achieved, by compensating for the pulse-area-error, caused by a non-constant power-supply and similar circuit inconsistencies. A Class-D Amplifier typically converts the PDM (Pulse Density Modulated) input signal with a Sigma Delta Modulator and typically uses an H-Bridge as the Class-D power output stage. A fundamental idea is to keep the time-voltage area of every pulse constant. To achieve this, the circuit integrates the power supply voltage, starting with the PDM input pulse and stopping, when the defined time-voltage reference is reached. To compensate not only for power supply variations, but also for e.g. the voltage drop across the output devices, the integrator's input would be more directly reference to the actual voltage across the output load.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: August 3, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventors: Johan Nilsson, Lars Lennartsson, Horst Knoedgen
  • Publication number: 20040140845
    Abstract: A method and a circuit to achieve a low dropout voltage regulator having a constant high performance under all operating conditions, including the dropout region, have been accomplished. A regulated cascade structure is placed at the input of a current mirror and in connection with a voltage regulator output stage. In contrast to other applications the positive input of the error amplifier is not biased with a reference voltage but connected to the regulator output. Therefore the cascade structure regulates the voltage of the entry node of the current mirror to be equal to the output voltage of the regulator under all operating conditions of the regulator. Thus the transistors of the current mirror have always identical drain-source voltages. Therefore the regulator is kept in the optimal, balanced operating point, a constant high regulator loop gain is achieved and PSRR and load regulation performance is no more reduced under dropout operating conditions.
    Type: Application
    Filed: January 21, 2003
    Publication date: July 22, 2004
    Applicant: Dialog Semiconductor GmbH
    Inventor: Matthias Eberlein
  • Publication number: 20040141072
    Abstract: The apparatus and method invented are operating upon a digital image signal obtained from an image sensor. The sensor is covered with different colored filters and is only able to record the color transmitted through each specific filter into the photosite or pixel. This type of sensor is known as a color filter array or CFA sensor. The different colored filters are arranged in a predefined pattern across the sensor. To obtain a full color image the missing color information is estimated by a set of weighed values obtained by an inverted gradient function. The set of weighted values is found from the neighboring pixels in the four compass directions, north, east, west and south or is found horizontally and vertically. The surrounding pixels are corrected by the chrominance channel to better fit the center pixel in the luminance channel, prior to using the gradient functions.
    Type: Application
    Filed: January 21, 2003
    Publication date: July 22, 2004
    Applicant: Dialog Semiconductor GmbH.
    Inventors: Andreas Nilsson, Pierre U.W. Nordblom
  • Patent number: 6759899
    Abstract: A method for compensating for the pulse area error of a Class-D power amplifier is achieved; especially it compensates the variations in the supply voltage and similar dependencies. A Class-D Amplifier typically gets pulse coded digital input (PCM) and may comprise a Sigma Delta Modulator to generate the signals driving the power output stage, typically an H-Bridge. A fundamental idea of this invention is to measure the real area of the output pulses, where the area is defined as the pulse duration multiplied by the pulse voltage amplitude, and to compare it with the ideal nominal pulse area. The pulse area error is calculated and then subtracted from said amplifier's input data. Key element of this invention is the “Pulse Area Compensation Function”, which calculates said real pulse area (voltage amplitude multiplied by time), compares said real pulse area with said ideal pulse area and feeds the difference into the input of said Sigma Delta Modulator.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: July 6, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventors: Lars Lennartson, Johan Nilsson, Horst Knoedgen
  • Publication number: 20040113052
    Abstract: A method and a system for the compensation of Fixed Pattern Noise (FPN) in digital images have been achieved. The FPN compensation is based on processing done during the production of said images. The fixed pattern noise is here defined as the fixed pattern seen in the individual pixel offsets. The fixed pattern noise is uncorrelated noise but it has a statistical distribution that can be scaled to fit all images. The general idea is to measure the distribution for each individual camera, compress it, and save it in the module. For each image that is then taken with the module the noise pattern can be retrieved and rescaled to fit the image. Covered pixels are employed to normalize the FPN data to the current frame. In order to minimize memory requirements a compression scheme has to be used. A method combining a quantization step with a non-lossy compression is used. The black level is corrected for as part of the operation.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 17, 2004
    Applicant: Dialog Semiconductor GmbH.
    Inventors: Anders Johanneson, Ingemar Larsson
  • Publication number: 20040113252
    Abstract: Methods and structures to reduce in semiconductor packages the length of critical electrical connections between bond pads on one or multiple semiconductor chips and wire landing pads on a substrate have been achieved. An electrical connection becomes critical if high current, high speed or radio frequency signals have to be transported. Moving the wire landing pads of critical connections on the substrate closer to the semiconductor chip utilizing unpopulated spaces of an array grid design reduces the length of said wires. This could be a ball grid array (BGA) or any other kind of grid array. Said methods and structures invented are applicable to single-chip modules and to multi-chip modules. The design of the grid array has to be modified to provide free spaces for the wire landing pads of critical electrical connections within the grid array close to the semiconductor chip as required by the design rules. The design change can be done without increasing the number of solder balls or solder pins, etc.
    Type: Application
    Filed: January 6, 2003
    Publication date: June 17, 2004
    Applicant: Dialog Semiconductor GmbH.
    Inventor: Hans Martin Vonstaudt
  • Publication number: 20040113709
    Abstract: A highly stable single chip resonator controlled oscillator with automatic amplitude control and biasing is designed for manufacture with monolithic integrated circuit technologies. Analog and digital output buffers with elaborate control for power saving purposes and sophisticated start-up and power-up circuits ensure, that a crystal controlled oscillation is safely induced at start-up and that the amplitude of oscillation is continuously controlled during operation to reach low phase noise and reduce power consumption of the circuit.
    Type: Application
    Filed: January 6, 2003
    Publication date: June 17, 2004
    Applicant: Dialog Semiconductor GmbH.
    Inventors: Andreas Sibrai, Kurt Fritzwenwallner
  • Publication number: 20040113684
    Abstract: In a Class-D Amplifier with PCM (Pulse Code Modulated) input signal, the output pulse width may be adjusted to provide a constant time-voltage-area or the output pulse width may have one of several discrete values to provide a multi-level output system. A fundamental idea of this disclosure is to assure the center of each output pulse is always positioned at the nominal clock or with a fixed delay relative to the nominal clock. Said Class-D Amplifier typically converts the input signal into PDM (Pulse Density Modulated) pulses with a Sigma Delta Modulator and typically drives the output load with an H-Bridge.
    Type: Application
    Filed: January 24, 2003
    Publication date: June 17, 2004
    Applicant: Dialog Semiconductor GmbH.
    Inventors: Johan Nilsson, Lars Lennartsson, Horst Knoedgen
  • Patent number: 6750705
    Abstract: An energy control circuit for a class D amplifier is achieved. The energy control circuit comprises, first, a means of generating an energy accumulation signal proportional to an output drive signal of the class D amplifier. Last, a means of receiving the energy accumulation signal and of interrupting the output drive signal when the energy accumulation signal exceeds a reference level. Single-ended and H-bridge amplifiers are achieved.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: June 15, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventor: Horst Knoedgen
  • Patent number: 6741137
    Abstract: A highly stable single chip resonator controlled oscillator with automatic gain control designed for manufacture in monolithic integrated circuit technologies. An automatic gain controller monitors the output of a crystal controlled oscillator amplifier and produces a feedback signal to ensure oscillation is induced at startup and that the amplitude of oscillation is continuously controlled during operation to reach low phase noise and reduce power consumption of the circuit.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: May 25, 2004
    Assignee: Dialog Semiconductor GmbH
    Inventors: Andreas Sibrai, Kurt Fritzwenwallner
  • Publication number: 20040095302
    Abstract: A method and a system to reduce the power consumption of a LCD driver have been achieved. In order to save power a logic circuitry is connected to the output of a RAM automatically comparing displayed data on a line by line during the scan and, on detection of no data change, keeping the output pins static. In the case a COMMON row contains zero data only the corresponding common output is not selected and does not switch the display and hence saves the charging current for said row of data. Said logic circuit is an extension to standard prior art circuitry controlling a LCD display.
    Type: Application
    Filed: November 15, 2002
    Publication date: May 20, 2004
    Applicant: Dialog Semiconductor GmbH
    Inventors: Julian Tyrrell, Dave Clewett