Abstract: A method of testing a circuit design is provided which allows for the comparison output of an abstract reference model of the circuit and the circuit itself to the same set of input stimuli. The circuit under test may operate in a manner which produces unpredictable events, results, or data. Due to the nature of the reference model, unpredictable results, data, or events are not allowed to occur. Thus to compare the outputs of the two as a means of verifying the circuit design, the testing method allows for a comparison analysis of the outputs despite the possibility of unpredictable data and events occurring on the circuit and not the model.

Abstract: A system and method for booting a client workstation from a remote data processing system over a network includes initializing the client workstation sufficiently to establish network communications with a remote disk on the remote data processing system, establishing a network communications link between the local and remote systems, issuing a request from the client workstation to the remote data processing system over the network communications link for a task image code module for providing a network interface between the client workstation and the remote disk on the remote data processing system, downloading the task image code module from the remote to the client workstation in response to the request for the task image code module, invoking the task image code module by the client workstation to establish a network interface between the client workstation and the remote disk, copying an image of the remote disk over the network to the client workstation to create a local disk image stored in the client

Abstract: A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an application program written for a non-native instruction set provides an native instruction or a native instruction routine. The run-time system collects profile data in response to execution of the native instructions to determine execution characteristics of the non-native instruction. Thereafter, the non-native instructions and the profile statistics are fed to a binary translator operating in a background mode and which is responsive to the profile data generated by the run-time system to form a translated native image. The run-time system and the binary translator are under the control of a server process.

Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an integrated interleaved-fin connector is provided. A first substrate includes a first side surface and a second side surface. A plurality of heat generating devices are formed in the first side surface. A plurality of first channels are etched in the second side surface to form a plurality of first fins. A second substrate has a plurality of second channels etched therein to form a plurality of second fins and a base. The base is for thermally engaging with a heat sink. The first and second fins providing a thermally conductive path from the heat generating devices to the heat sink when interleaved with each other.

Abstract: In accordance with principles of the invention there is disclosed a new system for accessing a page table structure of a non-current process. The new system modifies a current page table structure such that a process private portion of a current page table structure is replaced with a process private portion of the page table structure of the non-current process. After the necessary accesses have been performed, the present system again modifies the page table structure so that the process private portion of the current page table structure is restored to the process private portion of the page table structure of the current process. The new system does not require a complete context switch, and the target PTEs are advantageously mapped to the virtual memory locations in which they would normally reside if the target process was current.

Abstract: A low profile personal computer includes an enclosure having a bottom wall. A riser card including functional circuitry extends vertically from the bottom wall and partitions the enclosure into first and second regions. A motherboard is positioned within the first region of the enclosure along the bottom wall and adjacent to the riser card for interfacing with the riser card. A series of horizontal option card interfaces are located above each other on the riser card within the first region of the enclosure each for interfacing with a corresponding option card and to position the option cards horizontally over the motherboard. The horizontal option card interfaces are capable of interfacing with a maximum of three option cards at the same time. The functional circuitry on the riser card minimizes the number of option cards which enables the overall height of the enclosure to be minimized.

Abstract: In a computer system, a system video adapter and an add-on video adapter generate video signals according to different dimensional characteristics. The dimensional characteristics of the system adapter are calibrated by a calibration unit so that the video signals can simply be merged. The calibration unit comprises a comparator for detecting pixel signals of calibration lines generated by the system adapter at predetermined horizontal and vertical positions of a display device. The comparator, in response to detecting the pixel signals exceeding a predetermined reference signal, cause a latch to store counts of a counter. The counts represent the horizontal and vertical positions of the detected signals. The counts are presented to the add-on video adapter as calibration parameters. The add-on video adapter can use the calibration parameters to generate video signals which can be directly merged with the video signals of the system video adapter.

Abstract: In a method and system for dynamically improving the performance of a server in a network, a tuning system monitors a workload of the server in real time, monitors a set of internal performance characteristics of the server in real time, and monitors a set of adjustable server parameters of the server in real time. The workload of the server may include the frequency and type of service requests received by the server from clients in the network. The internal server performance characteristics may include, for example, a data cache hit ratio of a data cache in the server. The set of server parameters may include, for example, the overall data cache size or the data cache geometry of the server. The tuning system periodically alters one or more of the set of adjustable server parameters as a function of the workload and internal performance characteristics of the server.

Abstract: A system for managing an assemblage of entities. The entities interface within the assemblage for control of primary information handling functions and further interface with the system to permit the carrying out of management functions. The system includes management modules adapted to carry out management functions by independently interpreting and executing commands, a kernel including a table of dispatch pointers for directing the commands to the respective modules in which they are to be interpreted and executed, and an enroller for enrolling new modules into the system by adding further pointers to the table.

Abstract: A method of transmitting an encoded file from a first computer system to a second computer system. The method utilizes a data dictionary having a number of entries. Each of the data dictionary entries contains an entry character array, an entry compression array, and an entry counter. Data packets are read into the memory and are encoded into the encoded file by using the data dictionary. The encoded file is then transmitted from the first system to the second system. The method also contains a decoding function wherein encoded packets received by the second system are decoded using the data dictionary.

Abstract: A computer implemented method searching an index of a database composed of records storing information. Each record has a unique address in the database. The database is indexed by storing index entries in a memory. Each index entry includes a word entry representing a unique portion of information of the database and one or more location entries pointing to occurrences of the unique portions in the database. The index entries are organized according to a collating order of the words. The location entries of each word are stored in a sequential order. A query is parsed into terms and operators, the operators relate the terms, and each term is associated with one of the index entries. A basic reader object is opened for each term. The basic reader object reads location entries of the index entry. A compound reader object is opened for each operator, the compound reader object reads locations of the index entries corresponding to the terms related by the operator.

Abstract: A video scaling apparatus and technique for compressing and reconstructing video data sent between multimedia workstations during a video teleconference includes a video data scaling device which scale unscaled video data, having V horizontal lines of H pixels each, to reduce the quantity of horizontal lines and the quantity of pixels along each line. A pixel replication device replicate the received scaled pixels to increase the quantity of horizontal lines to V and the quantity of pixels along each of the horizontal lines to H. The scaling device reduces the quantity of horizontal lines to about V/2, and the quantity of pixels along each horizontal line to about H/2. A received pixel is replicated to replace an adjacent pixel along a line to reconstruct the line. The reconstructed line is replicated to replace an adjacent line. The replicated line is shifted by one pixel relative to the adjacent line from which it was replicated to reduce sharp edges and blockiness.

Abstract: Apparatus and method for recognizing the language type of the page description language (PDL) of a print document that is not dependent on the presence of a `dead-ringer`, standard identifying sequence of characters for language type identification.

Abstract: A branch prediction apparatus includes a predicted past history device, and a a branch prediction device. The predicted past history device is operable to receive an indication of a branch instruction and to output a pattern of past predictions of branch directions for the indicated branch instruction. The pattern of past predictions includes at least one prediction of a branch direction for which the correctness of the prediction has not been determined The branch prediction device is operable to receive the pattern of past predictions of branch directions for the indicated branch instruction and to output a predicted branch direction for the indicated branch instruction based on the received pattern of past predictions.

Abstract: An apparatus for allocating data to and retrieving data from a cache includes a memory subsystem coupled between a processor and a memory to provide quick access of memory data to the processor. The memory subsystem includes a cache memory. The address provided to the memory subsystem is divided into a cache index and a tag, and the cache index is hashed to provide a plurality of alternative addresses for accessing the cache. During a cache read, each of the alternative addresses are selected to search for the data responsive to an indicator of the validity of the data at the locations. The selection of the alternative address may be done through a mask having a number of bits corresponding to the number of alternative addresses. Each bit indicates whether the alternative address at that location should be used during the access of the cache in search of the data.

Abstract: A browser for efficiently browsing large directory trees is presented. The browser uses authentication links as the structure through which the browser navigates. By adhering to the rules for a valid authentication chain, the browser increases efficiency by storing the results of preliminary steps to browsing.

Abstract: A data block in a RAID array is reconstructed under the control of metadata recorded on the RAID array. The RAID array has a plurality of members, each member being a data storage device. The metadata includes device metadata for data blocks recorded on each member and RAIDset metadata for RAID protected data blocks recorded across the members of the RAID array. The RAID protected data blocks include user data blocks, RAIDset metadata blocks and parity data blocks. The data blocks are reconstructed by detecting from a device FE bit in the device metadata that a bad data block corresponding to or associated with the device FE bit needs to be reconstructed. The data is read from each data block, other than the bad data block, in the same RAID sliver with bad data block. A RAID sliver of data blocks includes all the data blocks in a RAID protected sliver of data blocks.

Abstract: A method and related apparatus enables one station on a local area network (LAN) 24 to remotely and securely modify sensitive information of another station on the LAN 24. A workstation 12, acting as a remote management console, generates a wake-up packet 32 or 42 intended for a desktop computer 14 on the LAN 24. A network interface 64 receives and processes the wake-up packet, and issues a signal to wake up the desktop computer. In response to the signal, the desktop computer 14 bootstraps. Data indicating that the network interface 64 has issued the signal is stored in register 104. In the course of bootstrapping, the processor 78 examines the register 104 to determine that the network interface 64 has initiated the wake-up of the desktop computer 14. Once this determination is made, the write protection circuitry 76 places the BIOS ROM 74 in an unprotected state wherein the contents BIOS ROM 74 can be modified by the workstation 12.

Abstract: A method and apparatus for performing division in accordance with certain bandwidth requirements particular to an implementation is described. A pseudo pipelined approach for performing division using the SRT non-restoring division algorithm is described which uses a minor clock and a major clock cycle time. The number of stages in the division pipeline is a function of the parameters bandwidth requirements of the system. The pseudo pipeline division technique iterates for several minor cycles rather than having individual hardware associated with each minor cycle in the division pipeline. High division bandwidth requirements are provided while minimizing the amount of hardware and the area occupied by the associated hardware.

Abstract: A multiplier in a floating point processor includes a circuit to determine for each bit of the multiplier operand a 3 times booth recode and a booth recode multiplier array which implements a 3 times booth recode multiplication. The multiplier includes logic to determine a fast sign extend to replace bit positions shifted in the array as well as a rounding adder to provide a rounded result while determining the final result from the booth recode multiplier. The multiplier also includes a circuit to determine a contribution to the final multiplication result from a lower order product with out forming the entire product.