Patents Assigned to Endicott Interconnect Technologies, Inc.
  • Method of providing a printed circuit board with an edge connection portion and/or a plurality of cavities therein
    Patent number: 7596863
    Abstract: A method of making a printed circuit board in which at least three substrates are aligned and bonded together (e.g., using lamination). Two of the substrates have openings formed therein, with each opening including a cover member located therein. During lamination, the cover members for a seal and prevent dielectric material (e.g., resin) liquefied during the lamination from contacting the conductive layers on the opposed surfaces of the inner (first) substrate. A PCB is thus formed with either a projecting edge portion or a plurality of cavities therein such that electrical connection may be made to the PCB using an edge connector or the like.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: October 6, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Robert J. Harendza, Robert M. Japp
  • Method of making a circuitized substrate with enhanced circuitry and electrical assembly utilizing said substrate
    Patent number: 7595454
    Abstract: A method of making a circuitized substrate in which pairs of vertically oriented though holes are formed such that at least one of the through holes is partially embedded within a lower one, thus assuring a sound connection following subsequent lamination or other steps the substrate including such holes is subjected to during manufacture. An electrical assembly including a substrate with such features is also provided.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: September 29, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John S. Kresge, Cheryl L. Palomaki
  • Method of making circuitized substrate with improved impedance control circuitry, electrical assembly and information handling system
    Patent number: 7589283
    Abstract: A method of making a circuitized substrate designed to substantially eliminate impedance disruptions during passage of signals through signal lines of the substrate's circuitry. The produced substrate includes a first conductive layer with a plurality of conductors on which an electrical component may be positioned and electrically coupled. The pads are coupled to signal lines (e.g., using thru-holes) further within the substrate and these signal lines are further coupled to a second plurality of conductive pads located even further within the substrate. The signal lines are positioned so as to lie between the substrate's first conductive layer and a voltage plane within a third conductive layer below the second conductive layer including the signal lines. A second voltage plane may be used adjacent the first voltage plane of the third conductive layer.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: September 15, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Charles E. Danoski, Irving Memis, Steven G. Rosser
  • Method of making circuitized substrates having film resistors as part thereof
    Publication number: 20090178271
    Abstract: A method of making a circuitized substrate which involves forming a plurality of individual film resistors having approximate resistance values as part of at least one circuit of the substrate, measuring the resistance of a representative (sample) resistor to define its resistance, utilizing these measurements to determine the corresponding precise width of other, remaining film resistors located in a defined proximity relative to the representative resistor such that these remaining film resistors will include a defined resistance value, and then selectively isolating defined portions of the resistive material of these remaining film resistors while simultaneously defining the precise width of the resistive material in order that these film resistors will possess the defined resistance.
    Type: Application
    Filed: January 16, 2008
    Publication date: July 16, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Frank D. Egitto, John S. Kresge, John M. Lauffer
  • Method of making circuitized assembly including a plurality of circuitized substrates
    Publication number: 20090178273
    Abstract: A method of forming a circuitized substrate assembly in which at least two adjacent and contiguous circuitized substrates have at least one, and possibly a second, circuitized substrate positioned thereon and bonded thereto to form a combined circuitized substrate assembly. The substrates each include at least one conductive thru-hole therein such that the bonding will cause respective pairs (at least one pair if only three substrates are used) of the thru-holes to align and become electrically coupled, thereby forming at least one and preferably more electrical circuit paths through the combined assembly to electrically couple electrical components positioned on selected ones of the circuitized substrates.
    Type: Application
    Filed: January 15, 2008
    Publication date: July 16, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventor: John M. Lauffer
  • Method and system for tracking goods
    Patent number: 7552091
    Abstract: A method and system for tracking goods, etc., food products, which involves identifying the received goods at a specified location and thereafter assigning an encoded readable code to each of the goods which can be only accessed by authorized personnel responsible for handling the goods on through to and including shipment, e.g., to customers. A host computer includes a database for encoding received identification data and thereafter encoding same to provide the readable codes. The method and system also allows the customer/recipient to access the codes to discern whether he/she has received the correct goods he purchased.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: June 23, 2009
    Assignees: Endicott Interconnect Technologies, Inc., Maines Paper and Food Service, Inc.
    Inventors: Benson Chan, How Lin, William Maines, Voya Markovich
  • Method of making circuitized substrate with solder paste connections
    Patent number: 7547577
    Abstract: A method of making a circuitized substrate assembly in which two or more subassemblies are aligned and bonded together. The bonding, preferably using lamination, results in effective electrical connections being formed between respective pairs of conductors of the subassemblies in such a manner that the metallurgies of the conductors, and those of an interim metallic solder paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies is forced to flow to engage and surround the conductor coupling, without adversely affecting the electrical connection formed.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: June 16, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Norman A. Card, Thomas R. Miller, William J. Rudik
  • Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate
    Patent number: 7541265
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: June 2, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Kostas I. Papathomas, Mark D. Poliks
  • Method of making circuitized substrate with internal optical pathway
    Patent number: 7541058
    Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: June 2, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Method of making a printed circuit board with low cross-talk noise
    Patent number: 7530167
    Abstract: A method of making a printed circuit board in which the board includes a common power plane having dielectric layers on opposing sides thereof and a signal layer on each of said dielectric layers, each signal layer comprising a plurality of substantially parallel signal lines running in substantially similar directions across said signal layers. Predetermined portions of the signal lines in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes in the power plane so as to be isolated therefrom.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: May 12, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr., David L. Thomas
  • Circuitized substrate with internal cooling structure and electrical assembly utilizing same
    Publication number: 20090109624
    Abstract: An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation.
    Type: Application
    Filed: October 25, 2007
    Publication date: April 30, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, Frank D. Egitto, How T. Lin, Roy H. Magnuson, Voya R. Markovich, David L. Thomas
  • Method of making circuitized substrate with internal optical pathway using photolithography
    Publication number: 20090093073
    Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Method of making circuitized substrate with internal optical pathway
    Publication number: 20090092353
    Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Method of making an interposer
    Patent number: 7511518
    Abstract: A method of making an interposer in which at least two dielectric layers are bonded to each other to sandwich a plurality of conductors there-between. The conductors each electrically couple a respective pair of opposed electrical contacts which are formed within and protrude from openings which are also formed within the dielectric layers as part of this method. The resulting interposer is ideally suited for use as part of a test apparatus to interconnect highly dense patterns of solder ball contacts of a semiconductor chip to lesser dense arrays of contacts on the apparatus's printed circuit board.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: March 31, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Frank D. Egitto, How T. Lin
  • Method of making wirebond electronic package with enhanced chip pad design
    Patent number: 7510912
    Abstract: A method of making a wirebond electronic package which includes a semiconductor chip bonded to the upper surface of an organic laminate substrate, including to a thermal material located on the substrate and comprised of a plurality of thermally conductive concentric lines. These lines form paths of heat escape for the chip during operation thereof and may operate in combination with other elements to extend the heat paths. Concentric lines also assure sufficient bonding area on the substrate so as to prevent delamination of the chip from the substrate as may occur during high temperatures associated with subsequent processing such as solder ball re-flow.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: March 31, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: David V. Caletka, Varaprasad V. Calmidi, Sanjeev Sathe
  • Method of inspecting articles using imaging inspection apparatus with directional cooling
    Patent number: 7510324
    Abstract: A method of inspecting articles using an imaging inspection apparatus which utilizes a plurality of individual imaging devices for directing beams onto the articles having objects therein to detect the objects based on established criteria. The method involves the enhanced cooling of the heat-generating imaging devices in which a fan directs cooling fluid onto a plurality of deflectors which in turn direct said fluid onto selected ones of said imaging devices.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: March 31, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Jr., Sanjeev Sathe
  • Information handling system including a circuitized substrate having a dielectric layer without continuous fibers
    Patent number: 7508076
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: March 24, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Interposer and test assembly for testing electronic devices
    Patent number: 7501839
    Abstract: A test apparatus which uses a pair of substrates and housing to interconnect a host substrate (e.g., PCB) to an electronic device (e.g., semiconductor chip) to accomplish testing of the device. The apparatus includes a housing designed for being positioned on the PCB and have one of the substrates oriented therein during device engagement. The engaging contacts of the upper (second) substrate are sculpted to assure effective chip connection.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: March 10, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, Frank D. Egitto, Voya R. Markovich
  • Method of making an imaging inspection apparatus with improved cooling
    Patent number: 7490984
    Abstract: A method of making an imaging inspection apparatus which involves positioning a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The method also involves providing a cooling structure in such a manner that it will direct cooling fluid onto the imaging devices to cool these during apparatus operation.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: February 17, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Jr., Sanjeev Sathe
  • Information handling system utilizing circuitized substrate with split conductive layer
    Patent number: 7491896
    Abstract: An information handling system, e.g., a mainframe computer, which includes as part thereof a housing having therein an electrical assembly including a circuitized substrate which in turn includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within the system. At least one electrical component is positioned on and electrically coupled to the circuitized substrate of the system's electrical assembly.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: February 17, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, James M. Larnerd, Voya R. Markovich