Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.

Abstract: Each of cells disposed on a surface of a semiconductor substrate includes a first transistor and a second transistor. A second current terminal of the first transistor is connected to a gate terminal of the second transistor. A first current terminal of the first transistor is connected to a bit line. A gate terminal of the first transistor is connected to a word line. A first wiring is connected to a point in a circuit connected to the first current terminal of the second transistor. The bit line is set to a first voltage state or a second voltage state with a voltage higher than a voltage of the first voltage state. A voltage higher than the first voltage and lower than the second voltage is applied to the first wiring. A voltage detector circuit detects a voltage appearing on the second wiring.

Abstract: An electronic equipment is provided with a main display section, an auxiliary display section which displays status information of the electronic equipment, a plurality of buttons provided above and/or below the auxiliary display section, and a controller. The controller displays definitions or meanings of the plurality of buttons, within the auxiliary display section at positions corresponding to each of the plurality of buttons, depending on an operation mode of the electronic equipment.

Abstract: A liquid crystal display device comprises: a display circuit including data lines and scanning lines arranged in a two-dimensional matrix, and switching elements connected between the data lines and the scanning lines; a first inspection circuit including an inspection voltage input and/or output terminal for inputting and/or outputting an inspection voltage to/from one end of the data line via a first analog switch; and a second inspection circuit including an inspection voltage input and/or output terminal for inputting and/or outputting an inspection voltage to/from the other end of the data line. The display circuit, the first inspection circuit, and the second inspection circuit are provided on one substrate, and the first inspection circuit is separable from the display circuit.

Abstract: A semiconductor integrated circuit includes pads, a first power supply I/O cell which is connected to an external pin through a corresponding one of the pads, and a second power supply I/O cell which is not connected to an external pin through a corresponding one of the pads, but receives power supply from the first power supply I/O cell.

Abstract: It is an objective of the present invention to integrate the architectures for security of a variety of systems for providing a variety of services or to save a special object for security in an object-oriented system. To achieve this objective, in a system comprising an object network and a common platform, said object network is hierarchically composed of a data model in which the attribute structure is determined as a template, an object model, a role model and a process model in ascending order from the bottom, and comprises a matching constraint check means for ensuring the security of a system by checking matching constraints attached to a template.

Abstract: The magnetoresistance is measured for a magnetoresistive layered-structure, such as a spin valve film, prior to formation of an upper shield layer as well as patterning of a lower shield layer. The magnetic influence of the upper and lower shield layers can completely be eliminated during the measurement of the magnetoresistance. The magnetoresistive layered-structure is allowed to reliably receive the magnetic field over a wider range including a lower magnetic field range. It is accordingly possible to measure the magnetoresistance properly reflecting the magnetic characteristic of the magnetoresistive layered-structure. It is possible to find deficiency of a magnetoresistive read element at an earlier stage of the method.

Abstract: The invention relates to a method for the provision of a device code for an electronic device, which is at least required for the first commissioning of the device code, whereby the device is inoperable without the input of the device code. The method is characterized in that the following procedural steps are carried out: Storage of a device number and an appropriate device code in a database, delivery of the device to a further processing site and readout of the device code stored in the database in conjunction with the device number, whereby the previous or simultaneous storage of a selected code number in the database in conjunction with the device number is required for readout.

Abstract: A high electron mobility transistor using a Group III-V compound semiconductor comprises an undoped second channel layer laminated on an InP substrate via a buffer layer, an undoped first channel layer laminated on the second channel layer, and a doped electron-supplying layer laminated on the first channel layer. The first channel layer is composed of In1−xGaxAs and has an energy level of conduction band lower than that of the electron-supplying layer at the interface. The second channel layer is composed of a Group III-V compound semiconductor using a Group V element other than P, has an energy level of conduction band higher than that of the first channel layer, and has a band gap wider than that of the first channel layer.

Abstract: An edge of a passivation film is positioned inside an edge of an overhanging emitter structure by a distance L so that a base electrode layer is formed at an interval not to overlap the edge of the passivation film even when the base electrode layer is formed by etching with the emitter structure as a mask.

Abstract: A method for altering a circuit pattern of a printed-circuit board includes the steps of removing a portion of the printed-circuit board so that the circuit pattern inside the printed-circuit board is exposed, and connecting an exposed portion of the circuit pattern to another portion of the printed-circuit board by a conductive body so that a circuit path is formed between the exposed portion of the circuit pattern and the other portion of the printed-circuit board.

Abstract: In a delay circuit, a semiconductor integrated circuit device containing the delay circuit, and a delay method that are excellent for adding delay times onto input signals appropriately and accurately generating delay pulses and delay signals having predetermined delay times without requiring waveform modification or delay based on parasitic elements or the like, in the buffer section of a selecting switch section, a PMOS transistor and an NMOS transistor are connected to form an output terminal. The gates are connected to an individual delayed output terminal of a delay section. The PMOS transistor is connected in series to a PMOS transistor and to a power supply voltage. In the same way, the NMOS transistor is connected in series to an NMOS transistor and to a ground potential. A control signal is input to the gate of the PMOS transistor, while an inverted signal of the control signal is input to the gate of the NMOS transistor. A selecting section is formed by the transistors.

Abstract: A high frequency semiconductor device includes semiconductor elements provided on a semiconductor substrate, a surface insulating layer for covering the semiconductor elements, at least one wiring layer which is provided above the surface insulating layer, with at least one insulating interlayer provided therebetween, and which combines with the ground potential to form transmission line, and at least one heat-radiating stud which is provided in at least one throughhole so as to penetrate said insulating interlayers and so as not to penetrate said surface insulating layer.

Abstract: A high frequency semiconductor device includes wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a potential fixed at the ground potential, at least one crossing portion in which the wiring layers mutually cross, with insulating interlayers provided therebetween, and at least one separation electrode being selectively provided on one of the insulating interlayers, the at least one separation electrode having a potential fixed at the ground potential. Accordingly, in the high frequency semiconductor device, the electrical interference between two crossing wiring layers is prevented and transmission loss is suppressed.

Abstract: A structure for preveting MMICs (Monolithic Microwave Integrated Circuits) from the deterioration in the high-frequency transmission characteristics thereof, which is resulted from mechanical pressure applied to the pads during the wire-bonding thereto for external connection. The structure includes a groove provided in the surface of the interlayer insulation film around each of the pads. The line conductor for transmitting high-frequency signals is free from the peeling off or bending thereof, which is caused by the deformation in the interlayer insulation films during when the mechanical pressure applied to the pads, and thus, the change in the transmission characteristics of the line conductor can be minimized, and the reliability of MMICs can be improved.

Abstract: There are provided a first gate electrode of a first MOS transistor formed on a semiconductor layer via a gate insulating film, a second gate electrode of a second MOS transistor formed on the semiconductor layer via the gate insulating film at a distance from the first gate electrode, first and second one conductivity type impurity introduced regions formed in the semiconductor layer on both sides of the first gate electrode to serve as source/drain of the first MOS transistor, and first and second opposite conductivity type impurity introduced regions formed in the semiconductor layer on both sides of the second gate electrode to serve as source/drain of the second MOS transistor, whereby one of the first and second opposite conductivity type impurity introduced regions is formed to contact mutually to the second one conductivity type impurity introduced region.

Abstract: A signal reproducing method reproduces servo information recorded on a recording medium by use of a head. A current calculation related to a current and an observer calculation related to a position and a velocity of the head are made based on reproduced servo information, and a current value for driving the head is calculated based on the above calculation result. Only computations which require a demodulation result of a present sample are made during a first time after demodulation of the position of the head to a time when the current value is output, and computations which require a demodulation result of a past sample are made during a second time other than the first time.

Abstract: Disclosed is a surface acoustic wave device comprising a piezoelectric substrate; an electrode unit formed on the piezoelectric substrate, the electrode unit including a drive electrode unit for generating surface acoustic waves and an external connection electrode unit; an electrically conductive electrode protecting unit for covering the drive electrode unit with a hollow therebetween, the electrode covering unit being formed on the piezoelectric substrate by use of a film forming technique; an electroconductive column formed on the external connection electrode unit; and an external connection terminal formed at the extremity of the electroconductive column, wherein the piezoelectric substrate is sealed by a resin with the exception of the external connection terminal and the electrode protecting unit.

Abstract: A signal light passes through an isolator, and is coupled by a coupler with a pump light from a pump light source. Then, the signal light passes through an ASE reflection filter, is amplified by an EDF, and is transmitted from an isolator. At this time, an ASE light having a predetermined wavelength among ASE lights that occur within the EDF and proceed to the ASE reflection filter is reflected and again input to the EDF. By setting the predetermined wavelength to a wavelength on the short wavelength side of an amplification band of the EDF, gain deviation occurring on the long wavelength side of the amplification band can be cancelled.

Abstract: A method of molding resin on a thin-film resin substrate having a first surface provided with an electronic circuit and a second unleveled surface opposite the first surface is disclosed. The method includes the steps of: a) providing deformation restricting means for the substrate; and b) molding the resin on the first surface.