Abstract: Information read from a disk device includes synchronization bytes to enable a controller to get into byte synchronization with a stream of bits received from the disk. The stream of bits passes through a shift register. Firmware conditions a multiplexer which receives the parallel output of the serial register to select the high order binary ONE bit thereby enabling the controller to get into byte synchronization with the stream of bits.

Abstract: A connector for providing electrical connections for a coax cable harness, the coax cable harness including a plurality of coax cables, each coax cable having a wire encased in a dielectric and having a drain wire. The connector comprises an insulation displacement connector having a plurality of insulation displacement contacts set in a top surface of the insulation displacement connector. Each insulation displacement contact engages a corresponding wire encased in the dielectric, the insulation displacement contact piercing the dielectric thereby providing the electrical connection for the wire of the coax cable. An orientation bar positions the coax cables to be in line with the corresponding insulation displacement contact, the coax cables resting on a top surface of the orientation bar. The orientation bar is positioned next to the insulation displacement connector such that a side surface of the insulation displacement connector is in contact or nearly in contact with the orientation bar.

Abstract: A needle end ruby of a needle printing head where the printing needle writing ends are arranged along one or more parallel columns is comprised of two or more plates juxtaposed on one or more planes. Each plate is rigidly fixed to the contiguous plate or plates. The ruby guiding openings for one column of the needle writing ends are obtained by shaping and grinding the sides along which two plates are juxtaposed and fixed.At least one of the plates comprising the ruby has a different height in relation to the remaining juxtaposed plate(s). Thus the ruby presents two ground surfaces used for accurately positioning the ruby into a housing in the nose end of a guiding needle head.Alternately the guiding ruby, though comprised of plates of equal height, can still present two reference ground surfaces by juxtaposing and fixing at least two of the plates in a staggered manner so as to expose precisely ground surfaces utilized to accurately position the ruby into its housing.

Abstract: Computer control memory apparatus is disclosed wherein the microinstructions may selectively have a variable bit length. A main control memory stores microinstructions having a basic length and they are read out and stored in a microinstruction register. Microinstruction prefixes are obtained from more than one source and are selectively added to the basic length microinstruction in the microinstruction register to create longer microinstructions, as needed, for controlling the operation of the computer. The microinstruction prefixes may be obtained from a secondary control memory that is addressed at the same time as the main control memory, or may be obtained from a field of N bits which is a part of a previous microinstruction read out of the main control memory and saved in an expansion register, or may be all zeroes when it is not desired to expand a microinstruction of basic length read out of the main control memory.

Abstract: A chip implemented in newer technology is designed to include new functionality. The chip includes compatibility circuits which connect to a pin which is unused in the chip it replaces in an existing computer system. The compatibility circuits connect to those internal parts of the new chip that contain the newly added or altered functionality. The new chip is installed in the existing computer system just as the prior chip. When so installed, the compatibility circuits enable the new chip to operate in the same manner as the replaced chip but at higher speed and with improved performance. When the new chip is installed in the system for which it was designed, the compatibility circuits enable the chip to operate with the new functionality at the same higher speed and improved performance as compared to the replaced chip.

Abstract: A data processing system includes an asynchronous parallel multiport volatile main memory system accessible directly by any one of M number of central processing units or by I/O controllers connected in common to any one of N number of system buses. Priority resolver circuits award access to main memory on a predetermined priority basis. Each port includes address, data in, data out, timing and control circuits which operatively couple to the priority resolver circuits. The circuits of each port and the central processing unit or system bus I/O controllers associated therewith operate independently of each other in an asynchronous manner to access and store data and to report errors.

Abstract: A method and apparatus for skew compensation in an optical reader is described. The method provides for calculating the amount of skew between the read scan line used to read the data and the recording path line used when the data was written on the recording media. By determining the position of each end of the scan line by counting delimiter marks along the two edges of the data being read, the skew can be calculated by determining the difference in delimiter counts. The data is divided into bands along the direction of scan within which the skew will not cause trouble misreadings at the extreme bits of the scan line within a band. The data is scanned multiple times during the transition of the data strip so that at least one good read of each data band in the data strip will occur.

Abstract: A multicolor inked ribbon cartridge for an impact serial printer comprising a ribbon housing body and two arms protruding from such body to allow the interposition of a ribbon portion between a printing head and a printing support for the whole length of the platen when the cartridge is rotatably attached to the frame of an impact serial printer by means of two lateral cylindrically-shaped projections provided on the body of a cartridge thus permitting rotation of the body around a common axis of said cylindrical projections, parallel to the platen. The cartridge rotation around such axis and therefore the positioning of a suitable multicolor band between the printing head and printing support is assured by a cam actuated by a motor and interacting with the body of such cartridge. The cartridge is further provided with a string made tight between the ends of its arms upon the multicolor ribbon portion which is interposed between the head and printing support.

Abstract: An apparatus for decoding data wherein only binary ZEROs are received as electronic pulses, each pulse alternating in opposite directions and wherein binary ONEs require no pulse.The apparatus includes logic for receiving the negative and positive binary ZERO pulses, retiming the pulses and generating a positive pulse for each binary ZERO pulse. The positive pulse is retimed to a pair of complementary pulses and applied to a receiving device, typically a universal synchronous/asynchronous receiver transmitter (USART).

Abstract: An apparatus for storing information contained in a selected digital data signal comprises a selector. A first input terminal receives an operational digital data signal when the apparatus is operating in a normal mode, a second input terminal receives a shifted test data signal when the apparatus is operating in a maintenance mode, and a third input terminal is operatively connected to a signal having a constant reset state. The selector operatively connects one of the first, second, and third input terminals to the output terminal of the selector in response to a first and second control signal. A storage element, having a clock input terminal adapted to receive a clock signal and having a reset terminal adapted to receive a reset signal, stores the state present at the selected input terminal of the selector coincident with the clock signal.

Abstract: An armature group for mosaic printing head has a plurality of armatures wherein each armature which is part of an actuation electromagnet associated with one of a plurality of printing needles, is fixed to an elastic arm of a spring steel spider having as many arms as there are armatures. The spider, besides performing an armature positioning function allows the armature group to be handled as a unitary element which is easy to assemble. The thrust arm of each armature further has a double bend so that the plane between such arm and the corresponding needle head is perpendicular to the axis of the needle and passes through the fulcrum of the armature. This minimizes the buckling force which the needle has to undergo during the actuation phase. The construction of the armature group can be accomplished by a completely automated manufacturing process.

Abstract: An improved single error correction circuit for a system memory storing in each of its addressable locations a data word and a corresponding error correcting code, which when read out from memory are fed to a syndrome generator which generates in output an error syndrome indication, comprising a set of registers arranged in banks, a first register in each bank for storing a prefixed portion of the data word read out from memory, the other registers in each bank for storing all the possible data configuration obtained from the prefixed portion of the data word stored in the first register of the same bank by inverting one data bit, so that a corrected read out data word is available in such registers in advance of syndrome indication which decoded, provides selection signal enabling one selected register per each bank to output, with minimum delay the latched portion of the data word.

Abstract: A data collection terminal includes a microprocessor, a memory and a number of devices coupled to a system bus. Included among the devices is a communication controller. An interrupt controller processes the device interrupt requests by sending out a vector address to the microprocessor. This enables the microprocessor to branch to a subroutine to process the interrupt. Apparatus is provided to enable the communication controller to generate vector addresses when it sends an interrupt request to the interrupt controller.

Abstract: A multiple output switching power supply wherein the voltage at a main output which couples to a main secondary winding of a transformer is regulated by pulse width modulation of the current flowing in the primary winding of the transformer and wherein the voltage at an auxiliary output which couples to an auxiliary secondary winding of the transformer is regulated by pulse width modulation of the current flowing in the auxiliary winding. The pulse width modulation is performed in synchronism with a preestablished turn-on delay of the control switches which control current pulses in the primary winding as to the turn-on of the switches which control current pulses in the auxiliary winding. Besides avoiding the need for a filter between the auxiliary winding and the related control switch, this form of synchronization reduces switching power losses, current spikes and induced radio frequency emission.

Abstract: The invention pertains to a computer display system for displaying text and graphics on a scan line basis wherein a scan line windowing apparatus for selectively blanking the graphics display is provided.A bit map memory, in addition to storing information to be displayed on a CRT, further stores a bit for each scan line which is utilized to control the enabling or disabling of a portion of the information in the bit map memory which is to be displayed on the CRT.

Abstract: A method and apparatus for a microinstruction controlled unit to recover from a read error in reading microinstructions from a control store. The method provides for the overlapping of the execution of a current microinstruction while the next microinstruction is being addressed and read from the control store. Execution of the current microinstruction is begun before it is known whether or not it was read without error. The apparatus provides for aborting the execution of the current microinstruction with the read error and the next microinstruction. During the aborted execution of the next microinstruction, the current microinstruction is reread from the control store and then executed while the next microinstruction is being reread. The execution of microinstructions is aborted in a manner that does not alter the state of the microinstruction controlled unit beyond the point that would inhibit the re-execution of the aborted microinstructions.

Abstract: The refresh logic of a dynamic MOS memory subsystem of a data processing system is tested by providing apparatus for counting refresh cycles and generating a counter output signal in a first state after a predetermined number of refresh cycles. A microprocessor periodically tests the state of the counter output signal and keeps a count of the number of times the counter output signal was tested and found to be in a second state. When the microprocessor tests and finds the counter output signal in a first state, the microprocessor compares the number of times it tested and found the counter output signal in a second state and determines if that count is within a predetermined range for correct operation.

Abstract: A minicomputer system is disclosed having a bus with a plurality of processors and/or subprocessors, input/output (I/O) units and including logic for enabling an alternate route for issuing instructions from one processor to another. The logic detects information that is not to be transferred to the I/O devices and accordingly reroutes it back to the central processor and/or subprocessors.

Abstract: A data processing system having a central processing unit (CPU) capable of performing binary and decimal arithmetic software instructions is disclosed. The CPU includes a microprocessor which executes the binary arithmetic software instructions under firmware control. Also disclosed is apparatus utilizing a programmable memory and logic circuits that are used to subtract two operands and to generate and temporarily store a digit equal nine indication when the result of subtracting the two operands has a value of nine.

Abstract: Computer modular housing with retractable stabilizers comprised of bearing feet shiftable relative to each other in a parallel direction, each of said bearing feet is independently movable laterally relative to the others so as to increase the frame bearing area and therefore increases the frame stability. They may also be retracted to a position which permits the assembly of modules against walls or other frames in order to form systems of juxtaposed modular units.