Patents Assigned to Hynix Semiconductor
  • Semiconductor device employing nitride floating capacitor (NFC)
    Patent number: 8648440
    Abstract: A semiconductor device includes: a substrate configured to include cell regions and a peripheral region around the cell regions; storage nodes arranged in each of the cell regions; a first support pattern configured in each cell region to support the storage nodes; and a second support pattern configured in the peripheral region to couple first support patterns to each other.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: February 11, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seok-Ho Jie
  • Method for fabricating semiconductor device having expanded critical dimension by performining surface treatment
    Patent number: 8647958
    Abstract: A method for fabricating a semiconductor device includes forming an isolation layer over a substrate, forming a plurality of open regions exposing the substrate by selectively etching the isolation layer, performing a surface treatment over the isolation layer, expanding the open regions by removing the surface-treated portion of the isolation layer, and forming a conductive layer in the expanded open regions.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: February 11, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang-Oh Lee
  • Non-volatile memory device and method for fabricating the same
    Patent number: 8648409
    Abstract: A method for fabricating a non-volatile memory device includes forming a channel link layer and an isolation layer surrounding the channel link layer over a substrate, forming a stack structure having interlayer dielectric layers that are alternately stacked with gate electrode layers over the channel link layer and the isolation layer, and forming a pair of channels connected to the channel link layer through the stack structure, and a memory layer interposed between the channel and the stack structure.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: February 11, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Han-Soo Joo, Dong-Kee Lee, Sang-Hyun Oh
  • Semiconductor memory device and operating method thereof
    Patent number: 8649235
    Abstract: A semiconductor memory device includes an enable fuse unit configured to generate a repair enable signal corresponding to a cutting state of an enable fuse after a power-up operation starts, and an address fuse unit enabled in response to the repair enable signal, and configured to generate an output signal in response to an external address and whether or not an address fuse is programmed.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: February 11, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Gyung-Tae Kim
  • Voltage down converter
    Patent number: 8648649
    Abstract: A voltage down converter includes a first driver having a first input terminal configured to generate a first voltage by using an external voltage in response to a first driving signal being inputted to the first input terminal, a control circuit configured to output the first driving signal to the first input terminal in response to a level of the first voltage, a second driver having a second input terminal configured to generate a second voltage by using the external voltage in response to the first driving signal or a second driving signal being inputted to the second input terminal, wherein the first driving signal is transferred from the first input terminal to the second input terminal through a conductive line, and a driving control circuit configured to generate the second driving signal and transferred to the second input terminal in response to a level of the second voltage.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: February 11, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Chae Kyu Jang
  • Fuse of semiconductor device and method of forming the same
    Patent number: 8642399
    Abstract: A fuse of a semiconductor device includes first fuse metals formed over an underlying structure and a second fuse metal formed between the first fuse metals. Accordingly, upon blowing, the fuse metals are not migrated under conditions, such as specific temperature and specific humidity. Thus, reliability of a semiconductor device can be improved.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hyung Kyu Kim
  • Semiconductor device including line-type active region and method for manufacturing the same
    Patent number: 8642428
    Abstract: A semiconductor device having a line-type active region and a method for manufacturing the same are disclosed. The semiconductor device includes an active region configured in a successive line type, at least one active gate having a first width and crossing the active region, and an isolation gate having a second width different from the first width and being formed between the active gates. The isolation gate's width and the active gate's width are different from each other to guarantee a large storage node contact region, resulting in increased device operation characteristics (write characteristics).
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kyung Do Kim
  • Shift circuit of a semiconductor device
    Patent number: 8644106
    Abstract: A shift circuit of a semiconductor device reduces the power consumption of the semiconductor device. The shift circuit comprises a plurality of shifters and a plurality of clock controllers. The plurality of shifters shifts an input signal in sequence in response to a clock. The plurality of clock each supply the clock to a corresponding shifter before an input of the corresponding shifter is activated and stop the supply of the clock to the corresponding shifter when an output of the corresponding shifter is activated.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jeong-Tae Hwang
  • Internal voltage generator
    Patent number: 8643357
    Abstract: A internal voltage generator includes a plurality of voltage level detection units, each configured to detect a voltage level of a corresponding internal voltage terminal, based on a predetermined target voltage level assigned to the corresponding internal voltage terminal, and generate a detection signal, a common internal voltage generation unit configured to generate an internal voltage through a pumping operation in response to the detection signal outputted from the voltage level detection units, and a path multiplexing unit configured to selectively output the internal voltage to one of the internal voltage terminals.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jong-Ho Son, Saeng-Hwan Kim
  • Method for fabricating magnetic tunnel junction device
    Patent number: 8642358
    Abstract: A method for fabricating a semiconductor device includes forming a plurality of layers which are stacked as a bottom layer, an MTJ layer, and a top layer, patterning the top layer and the MTJ layer using an etch mask pattern to form a top layer pattern and an MTJ pattern, forming a carbon spacer on the sidewalls of the MTJ pattern and the top layer pattern to protect the MTJ pattern and the top layer pattern, and patterning the bottom layer using the carbon spacer and the etch mask pattern as an etch mask to form a bottom layer pattern.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: February 4, 2014
    Assignees: Hynix Semiconductor Inc., Grandis, Inc.
    Inventor: Min Suk Lee
  • Semiconductor memory device and semiconductor system including the same
    Patent number: 8644088
    Abstract: A semiconductor memory device includes a memory block configured to store a data inputted/outputted through a data transfer line, a data output block configured to output the data loaded on the data transfer line in response to a source clock, wherein the data output block is controlled to be coupled with the data transfer line in response to a write operation signal, a write operation signal generation block configured to generate the write operation signal in response to an operation selection signal and a reference clock lagging behind the source clock by a set time, and a data input block configured to load the data on the data transfer line in response to the write operation signal.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung-Mook Kim
  • Method for fabricating semiconductor device with side contact
    Patent number: 8643098
    Abstract: A semiconductor device includes an active region having a side contact region in a sidewall thereof, wherein the side contact has a bulb shape, an ohmic contact region formed over a surface of the side contact region, and a bitline connected to the active region through the ohmic contact.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung-Hyun Shim
  • Non-volatile memory device and method for fabricating the same
    Patent number: 8643076
    Abstract: A non-volatile memory device includes a substrate including a cell region and a peripheral circuit region, a first insulation layer formed over the substrate to cover the peripheral circuit region thereof, and interlayer dielectric patterns and first conductive patterns alternately formed over the substrate of the cell region. Each of the interlayer dielectric patterns and the first conductive patterns includes a horizontal part extending along a surface of the substrate and a vertical part extending along a sidewall of the first insulation layer.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dae-Young Seo, Jong-Won Jang
  • Semiconductor device and method for forming the same
    Patent number: 8643088
    Abstract: The present invention relates to a semiconductor device and a method of manufacture thereof, particularly, to a semiconductor device including a vertical type gate and a method of forming the same. According to the present invention, a semiconductor device includes a vertical pillar which is protruded from a semiconductor substrate, has a vertical channel, and has a first width; an insulating layer which has a second width smaller than the first width, provided in both sides of the vertical pillar which is adjacent in a first direction; and a nitride film provided in a side wall of the insulating layer.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jin Won Park
  • Oscillator
    Patent number: 8643358
    Abstract: An oscillator includes a reference voltage generator configured to generate a reference voltage varying according a change in temperature and an external voltage, a first comparison voltage generator configured to output a first comparison voltage to a first node in response to the reference voltage, a second comparison voltage generator configured to output a second comparison voltage to a second node in response to the reference voltage, a first comparison circuit configured to compare the reference voltage and the first comparison voltage and to generate a first input voltage as a result of the comparison, a second comparison circuit configured to compare the reference voltage and the second comparison voltage and to generate a second input voltage as a result of the comparison, and a clock generator configured to output a clock signal that oscillates in response to the first and second input voltages.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jang Hwan Yoon
  • Multi-chip package and method of operating the same
    Patent number: 8644092
    Abstract: A semiconductor memory device includes a memory cell array including first memory cells for storing data and second memory cells for storing chip identification (ID) information, a data comparison circuit configured to compare input data and the stored data of the first memory cells and to output comparison data, and output circuits configured to output the comparison data received in parallel from the data comparison circuit. The comparison data is outputted through a selected one of the output circuits according to an enable signal generated based on the chip ID information.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 4, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kyoung Nam Kim, Beom Ju Shin
  • Semiconductor memory device for minimizing mismatch of sense amplifier
    Patent number: 8638627
    Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a cross-coupled latch type sense amplifier and a buffer that prevents mismatch. The buffer is formed between PMOS transistors and NMOS transistors of the sense amplifier so that mismatch for transistors operating in pair can be minimized.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: January 28, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dong Chul Koo
  • Nonvolatile memory device
    Patent number: 8637919
    Abstract: A nonvolatile memory device includes a channel protruding in a vertical direction from a substrate, a plurality of interlayer dielectric layers and gate electrode layers which are alternately stacked over the substrate along the channel, and a memory layer formed between the channel and a stacked structure of the interlayer dielectric layers and gate electrode layers. Two or more gate electrode layers of the plurality of gate electrode layers are coupled to an interconnection line to form a selection transistor.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: January 28, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki-Hong Lee, Kwon Hong, Beom-yong Kim
  • Delay locked loop
    Patent number: 8638137
    Abstract: A semiconductor device includes a delay unit configured to delay an inputted clock to generate a delay clock, a selection unit configured to select and output one of the inputted clock and the delay clock, a delay locked loop configured to perform a delay locking operation using a signal delivered from the selection unit, and a selection control unit configured to control the selection unit in response to a comparison of one period of the inputted clock and a maximum delay value of the delay locked loop.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: January 28, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jin Il Chung
  • Semiconductor device and method for fabricating the same
    Patent number: 8637990
    Abstract: A semiconductor device includes a word line, a bit line crossing the word line, an active region arranged in an oblique direction at the word line and the bit line, and a contact pad contacting the active region, where the contact pad extends in the oblique direction.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: January 28, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Doo-Kang Kim, Dae-Young Seo