Patents Assigned to Hynix Semiconductor
  • Semiconductor device and method for fabricating the same
    Patent number: 8637939
    Abstract: A semiconductor device includes a channel layer formed over a substrate, a gate formed over the channel layer, junction regions formed on both sides of the channel layer to protrude from the substrate, and a buried barrier layer formed between the channel layer and the junction regions.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: January 28, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kyung-Doo Kang
  • Nonvolatile memory device and method for fabricating the same
    Patent number: 8637913
    Abstract: A nonvolatile memory device includes a channel vertically extending from a substrate and comprising a first region that is doped with first impurities and a second region that is disposed under the first region, a plurality of memory cells and a selection transistor stacked over the substrate along the channel, and a diffusion barrier interposed between the first region and the second region, wherein a density of the first impurities is higher than a density of impurities of the second region.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: January 28, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hyun-Seung Yoo, Eun-Seok Choi
  • Integrated circuit chip and transmitting /receiving system including the same
    Patent number: 8633762
    Abstract: A system for transmitting data includes a plurality of data lines configured to transmit the data and a transmitting chip configured to output the data to the data lines and perform a crosstalk prevention operation in response to a data pattern of the data to be transmitted through the data lines and array information of the data lines to prevent crosstalk from occurring in the data lines.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: January 21, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yong-Ju Kim, Dae-Han Kwon, Hae-Rang Choi, Jae-Min Jang
  • Program method of semiconductor memory device
    Patent number: 8634251
    Abstract: A program method of a semiconductor memory device may include precharging first bit lines, coupled to first strings, to increase a potential level of the first strings to a first potential level; programming memory cells of a selected word line, wherein the memory cells are coupled to second bit lines; pre-discharging the first bit lines to decrease a potential level of the word lines to a second potential level, wherein the second potential level is lower than the first potential level; and discharging the first bit lines and the word lines to a ground voltage after the pre-discharging.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: January 21, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Jae Chung
  • Control circuit of read operation for semiconductor memory apparatus
    Patent number: 8634245
    Abstract: A control circuit for a read operation of a SERDES (SERializer and DESeriallizer) type semiconductor memory apparatus is disclosed that includes a first line driver configured to output a portion of a output signals from sense amplifier according to a first delay signal; a second line driver configured to output a rest of the output signals from the sense amplifier according to a second delay signal; and a first delay unit configured to output a second delay signal synchronized with a clock to the second line driver.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: January 21, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kwi Dong Kim
  • Filtering circuit and semiconductor integrated circuit having the same
    Patent number: 8633748
    Abstract: A filtering circuit includes jitter determination reference control unit configured to determine a jitter determination reference in correspondence to an operation mode and output a control signal in response to the jitter determination reference, and a filtering unit configured to set the jitter determination reference in response to the control signal and determine whether an input signal is maintained during a sample period in response to the set jitter determination reference.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: January 21, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hye-Young Lee, Yong-Mi Kim
  • Semiconductor memory device and method for operating the same
    Patent number: 8634265
    Abstract: A semiconductor memory device including an information storage unit comprising a fuse configured to store information, a control unit configured to control a node of a blown fuse to become a floating state in response to a control pulse signal, and an output unit configured to output the information.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: January 21, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwi-Dong Kim, Ki-Chang Kwean
  • Circuit and method for generating power-up signal
    Patent number: 8633742
    Abstract: A power-up signal generation circuit includes a power-up signal generator configured to enable a power-up signal when a level of an external power voltage is higher than a target level, and a target level controller configured to change the target level in response to a current consumption signal indicating a current consumption of a system including the power-up signal generation circuit.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: January 21, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang-Mook Oh, Jae-Hyuk Im
  • Method for operating non-volatile memory device
    Patent number: 8630119
    Abstract: A method for operating a non-volatile memory device which includes a plurality of memory cells serially coupled between a source selection transistor and a drain selection transistor, a first dummy memory cell coupled between the source selection transistor and the memory cells, and a second dummy memory cell coupled between the drain selection transistor and the memory cells includes applying a verification voltage to a gate of a selected memory cell, applying a first voltage to gates of unselected memory cells, and applying a second voltage that is lower than the first voltage to a gate of at least one of the first dummy memory cell and the second dummy memory cell, during a program verification operation.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: January 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee-Youl Lee
  • Semiconductor device and level shifting circuit for the same
    Patent number: 8629696
    Abstract: A level shifting circuit includes an inverter inverting an input voltage of an input node and driving a first voltage of a first node, a first output driving unit driving an output voltage of an output node to a first level in response to the first voltage of the first node, a first connection unit electrically coupling the first node to a second node or electrically isolating the first node from the second node in response to the first voltage of the first node, an internal driving unit driving a second voltage of the second node to a second level in response to the input voltage of the input node and the output voltage of the output node, and a second output driving unit driving the output voltage of the output node to the second level in response to the second voltage of the second node.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: January 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung-Ho Kim
  • Semiconductor device and test method with boundary scan
    Patent number: 8631291
    Abstract: A semiconductor device includes a clock control unit configured to receive an external test clock signal in a boundary scan test mode and generate a boundary test clock signal in synchronization with an entry time point of the boundary scan test mode, and a plurality of latches configured to receive and store a plurality of data in parallel in a boundary capture test mode and form a boundary scan path to sequentially output the plurality of stored data in the boundary scan test mode in response to the boundary test clock signal.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: January 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ki-Tae Kim
  • Method for forming tungsten film having low resistivity and good surface roughness and method for forming wiring of semiconductor device using the same
    Patent number: 8629062
    Abstract: A method for forming a tungsten film includes forming a tungsten nucleation layer having an amorphous-phase or a ?-phase over a semiconductor substrate. A first tungsten layer having a crystalline ?-phase is then formed over the tungsten nucleation layer to form a low resistivity tungsten film. A second tungsten layer is formed over the first tungsten layer by a physical vapor deposition process, and the second tungsten layer has a large grain size similar to that of the low resistivity tungsten film. The tungsten film has both good surface roughness and low resistivity, thus enhancing the production yield and reliability of a semiconductor device.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: January 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ga Young Ha, Jun Ki Kim
  • Slave device, system including master device and slave device, method for operating the same, and chip package
    Patent number: 8631268
    Abstract: A slave device communicating with a master device includes a transmission unit configured to transmit a signal to the master device through a communication channel, a calibration unit configured to measure a flight time of a calibration signal which is transmitted to the master device and fed back through a calibration channel coupled to the master device, and a transmission delay unit configured to delay the signal transmitted from an internal circuit of the slave device to the transmission unit by a delay value determined according to the measurement result of the calibration unit.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: January 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Nak-Kyu Park
  • Method for manufacturing semiconductor device
    Patent number: 8629033
    Abstract: A method for manufacturing a semiconductor device prevents a lower electrode from leaning, in a dip-out process of an interlayer insulation film forming a lower electrode. A conductive material of a lower electrode is used as a support layer instead of a conventional nitride film support layer. This prevents a crack from being generated in a nitride film support layer. A method for manufacturing the semiconductor device is also disclosed.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: January 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Byung Wook Bae
  • Semiconductor device including driving circuit
    Patent number: 8624638
    Abstract: A semiconductor device includes an information generation circuit configured to generate first information, an information multiplexing circuit configured to multiplex the first information and second information, and an information driving circuit configured to drive an output pad in response to an output signal of the information multiplexing circuit.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: January 7, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yong-Mi Kim
  • Semiconductor memory device
    Patent number: 8625363
    Abstract: A semiconductor memory device includes a read circuit configured to sequentially output a plurality of compressed data corresponding to all banks which are to be tested in response to a plurality of bank addresses and a read enable signal during a test mode and a pad configured to transfer the compressed data which are sequentially outputted from the read circuit to an outside of the semiconductor memory device.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: January 7, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young-Jun Ku, Ki-Ho Kim
  • Counting circuit of semiconductor device and duty correction circuit of semiconductor device using the same
    Patent number: 8625734
    Abstract: A counting circuit of a semiconductor device includes a plurality of counting units configured to count respective bits of counting codes in response to a plurality of counting clocks, respectively, and to control in a counting direction in response to a counting control signal; a clock toggling control unit configured to control the number of counting clocks that toggle among the plurality of counting clocks in response to clock control signals; and a counting operation control unit configured to compare a value of target codes and a value of the counting codes, and to determine a value of the counting control signal according to a comparison result.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: January 7, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hae-Rang Choi, Yong-Ju Kim
  • Semiconductor device and method of fabricating the same
    Patent number: 8624350
    Abstract: The invention relates to a semiconductor device, wherein a storage node contact hole is made large to solve any problem caused during etching a storage node contact hole with a small CD, a landing plug is formed to lower plug resistance. A semiconductor device according to the invention comprises: first and second active regions formed in a substrate, the first and second active being adjacent to each other, each of the first and second active regions including a bit-line contact region and a storage node contact region and a device isolation structure; a word line provided within a trench formed in the substrate; first and second storage node contact plugs assigned to the first and second active regions, respectively, the first and second storage node contact plugs being separated from each other by a bit line groove; and a bit line formed within the bit-line groove.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 7, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Do Hyung Kim, Young Man Cho
  • Nonvolatile memory apparatus and write control method thereof
    Patent number: 8625330
    Abstract: A nonvolatile memory apparatus includes a memory cell array, and a write operation controller configured to verify a write operation by comparing input data of the write operation controller to cell data written into the memory cell array, measure a resistance value after a first time is elapsed, and determine whether or not to re-perform the write operation according to the measured resistance value.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: January 7, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kyu Sung Kim
  • Integrated circuit
    Patent number: 8624672
    Abstract: An integrated circuit includes an input unit and a voltage level detecting unit. The input unit is configured to output differential amplification signals corresponding to differential input signals in response to a voltage level detection signal. The voltage level detecting unit is configured to detect a voltage level of the differential amplification signals and output the voltage level detection signal.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: January 7, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kwan-Dong Kim