Patents Assigned to Imagination Technologies
  • Patent number: 10885427
    Abstract: Methods for determining a fixed point format for one or more layers of a DNN based on the portion of the output error of the DNN attributed to the fixed point formats of the different layers. Specifically, in the methods described herein the output error of a DNN attributable to the quantisation of the weights or input data values of each layer is determined using a Taylor approximation and the fixed point number format of one or more layers is adjusted based on the attribution. For example, where the fixed point number formats used by a DNN comprises an exponent and a mantissa bit length, the mantissa bit length of the layer allocated the lowest portion of the output error may be reduced, or the mantissa bit length of the layer allocated the highest portion of the output error may be increased. Such a method may be iteratively repeated to determine an optimum set of fixed point number formats for the layers of a DNN.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: January 5, 2021
    Assignee: Imagination Technologies Limited
    Inventor: James Imber
  • Patent number: 10884136
    Abstract: A ranging code correlation function detection system for use in a global navigation satellite system (GNSS) receiver includes a correlation block to correlate a digitized GNSS signal (e.g. at or above a critical sampling rate) with a corresponding ranging code at each of a plurality of different offsets from a current estimate of a code delay to generate a plurality of correlation data points; an interpolation filter configured to generate at least one estimated correlation data point that lies between two of the correlation data points based on the current estimate of the code delay. In some cases the ranging code correlation function detection system may also include a discriminator block configured to generate an updated estimate of the code delay based on the at least one estimated correlation data point.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: January 5, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Adrian John Anderson, Peter Bagnall
  • Patent number: 10885699
    Abstract: Systems can identify visible surfaces for pixels in an image (portion) to be rendered. A sampling pattern of ray directions is applied to the pixels, so that the sampling pattern of ray directions repeats, and with respect to any pixel, the same ray direction can be found in the same relative position, with respect to that pixel, as for other pixels. Rays are emitted from visible surfaces in the respective ray direction supplied from the sampling pattern. Ray intersections can cause shaders to execute and contribute results to a sample buffer. With respect to shading of a given pixel, ray results from a selected subset of the pixels are used; the subset is selected by identifying a set of pixels, collectively from which rays were traced for the ray directions in the pattern, and requiring that surfaces from which rays were traced for those pixels satisfy a similarity criteria.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: January 5, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Gareth Morgan, Luke T. Peterson
  • Patent number: 10885376
    Abstract: A method of feature matching in images captured from camera viewpoints uses the epipolar geometry of the viewpoints to define a geometrically-constrained region in a second image corresponding to a first feature in a first image; comparing the local descriptor of the first feature with local descriptors of features in the second image to determine respective measures of similarity; identifying, from the features located in the geometrically-constrained region, (i) a geometric best match and (ii) a geometric next-best match to the first feature; identifying a global best match to the first feature; performing a first comparison of the measures of similarity for the geometric best match and the global best match; performing a second comparison of the measures of similarity for the geometric best match and the geometric next-best match; and, if thresholds are met, selecting the geometric best match feature in the second image.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: January 5, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Ruan Lakemond, Timothy Smith
  • Patent number: 10877732
    Abstract: A binary logic circuit for determining y=x mod(2m?1), where x is an n-bit integer, y is an m-bit integer, and n>m, includes reduction logic configured to reduce x to a sum of a first m-bit integer ? and a second m-bit integer ?; and addition logic configured to calculate an addition output represented by the m least significant bits of the following sum right-shifted by m: a first binary value of length 2m, the m most significant bits and the m least significant bits each being the string of bit values represented by ?; a second binary value of length 2m, the m most significant bits and the m least significant bits each being the string of bit values represented by ?; and the binary value 1.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: December 29, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Thomas Rose
  • Patent number: 10878626
    Abstract: A graphics processing system comprising: a tiling unit configured to tile a first view of a scene into a plurality of tiles; a processing unit configured to identify a first subset of the tiles that are associated with regions of the scene that are viewable in a second view; and a rendering unit configured to render to a render target each of the identified tiles.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: December 29, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Simon Fenney, Michael Worcester, Stuart Smith
  • Patent number: 10877923
    Abstract: An integrated circuit includes a memory configured to store a plurality of functions; a mapping interface configured to perform a mapping from a received first signal to a first function of the plurality of functions; and a state machine configured to, in response to said mapping, execute the first function; wherein the integrated circuit is arranged to, in dependence on the execution of the first function at the state machine, modify said mapping between the first signal and the first function so as to re-map the first signal to a second function of the plurality of functions such that, on receiving a subsequent first signal, the state machine is configured to execute the second function.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: December 29, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Bert Hindle, Ben Fletcher
  • Patent number: 10877760
    Abstract: A method for a plurality of pipelines, each having a processing element having first and second inputs and first and second lines, wherein at least one of the pipelines includes first and second logic operable to select a respective line so that data is received at the first and second inputs respectively. A first mode is selected and for the at least one pipeline, the first and second lines of that pipeline are selected such that the processing element of that pipeline receives data via the first and second lines of that pipeline, the first line being capable of supplying data that is different to the second line. A second mode is selected and for the at least one pipeline a line of another pipeline is selected, the second line of the at least one pipeline is selected and the same data at the second line is supplied as the first line.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: December 29, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Simon Nield, Thomas Rose
  • Patent number: 10867433
    Abstract: A graphics processing system has a rendering space which is divided into tiles. Primitives within the tiles are processed to perform hidden surface removal and to apply texturing to the primitives. The graphics processing system includes a plurality of depth buffers, thereby allowing a processing module to process primitives of one tile by accessing one of the depth buffers while primitive identifiers of another, partially processed tile are stored in another one of the depth buffers. This allows the graphics processing system to have “multiple tiles in flight”, which can increase the efficiency of the graphics processing system.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: December 15, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Jonathan Redshaw
  • Patent number: 10869210
    Abstract: A combination of signal parameters of a received OFDM signal are determined by determining, for each of a plurality of lags, a plurality of correlation peaks for the OFDM signal, wherein the correlation peaks form a plurality of sets of peaks, wherein each set of peaks is associated with a combination of signal parameters of the OFDM signal; performing a validation procedure to validate one or more peaks based on at least one correlation peak value; and determining a combination of signal parameters of the OFDM signal based on the validated peaks in the sets of peaks.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: December 15, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Filipe Wiener Carvalho
  • Patent number: 10868565
    Abstract: A method of compressing data is described in which the compressed data is generated by either or both of a primary compression unit or a reserve compression unit in order that a target compression threshold is satisfied. If a compressed data block generated by the primary compression unit satisfies the compression threshold, that block is output. However, if the compressed data block generated by the primary compression unit is too large, such that the compression threshold is not satisfied, a compressed data block generated by the reserve compression unit using a lossy compression technique, is output.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: December 15, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Simon Fenney
  • Patent number: 10861231
    Abstract: A graphics system has a rendering space divided into a plurality of rectangular areas, each being sub-divided into a plurality of smaller rectangular areas of a plurality of pixels. Data is received representing a tiled set of polygons to be rendered in a selected one of the rectangular areas. For each polygon, a determination is made whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area. If so, which pixels of the plurality of pixels in the selected smaller rectangular area are inside the polygon are identified. Or, if that polygon is not located at least partially inside the selected smaller rectangular area, no further processing of the polygon is performed at one or more of the plurality of pixels in the smaller rectangular area.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Piers Barber, Simon Fenney
  • Patent number: 10861205
    Abstract: Conservative rasterization hardware comprises hardware logic arranged to perform an edge test calculation for each edge of a primitive and for two corners of each pixel in a microtile. The two corners that are used are selected based on the gradient of the edge and the edge test result for one corner is the inner coverage result and the edge test result for the other corner is the outer coverage result for the pixel. An overall outer coverage result for the pixel and the primitive is calculated by combining the outer coverage results for the pixel and each of the edges of the primitive in an AND gate. The overall inner coverage result for the pixel is calculated in a similar manner.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Casper Van Benthem
  • Patent number: 10861204
    Abstract: Conservative rasterization hardware comprises hardware logic arranged to perform an edge test calculation for each edge of a primitive and for each corner of each pixel in a microtile. Outer coverage results are determined, for a particular pixel and edge, by combining the edge test results for the four corners of the pixel and the particular edge in an OR gate. Inner coverage results are determined, for a particular pixel and edge, by combining the edge test results for the four corners of the pixel and the particular edge in an AND gate. An overall outer coverage result for the pixel and the primitive is calculated by combining the outer coverage results for the pixel and each of the edges of the primitive in an AND gate. The overall inner coverage result for the pixel is calculated in a similar manner.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Casper Van Benthem
  • Patent number: 10861229
    Abstract: Methods and apparatus for generating a data structure for storing primitive data for a number of primitives and vertex data for a plurality of vertices, wherein each primitive is defined with reference to one or more of the plurality of vertices. The vertex data comprises data for more than one view, such as a left view and a right view, with vertex parameter values for a first group of vertex parameters being stored separately for each view and vertex parameter values for a second, non-overlapping group of vertex parameters being stored only once and used when rendering either or both views.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventor: John W. Howson
  • Patent number: 10862624
    Abstract: Channel state information (CSI) scaling modules for use in a demodulator configured to demodulate a signal received over a transmission channel, the demodulator comprising a soft decision error corrector (e.g. LDPC decoder) configured to decode data carried on data symbols of the received signal based on CSI values. The CSI scaling module is configured to monitor the performance of the soft decision error corrector and in response to determining the performance of the soft decision error corrector is below a predetermined level, dynamically select a new CSI scaling factor based on the performance of the soft decision error corrector.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Filipe Carvalho, Paul Murrin
  • Patent number: 10860370
    Abstract: A method of synchronizing a group of scheduled tasks within a parallel processing unit into a known state is described. The method uses a synchronization instruction in a scheduled task which triggers, in response to decoding of the instruction, an instruction decoder to place the scheduled task into a non-active state and forward the decoded synchronization instruction to an atomic ALU for execution. When the atomic ALU executes the decoded synchronization instruction, the atomic ALU performs an operation and check on data assigned to the group ID of the scheduled task and if the check is passed, all scheduled tasks having the particular group ID are removed from the non-active state.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Ollie Mower, Yoong-Chert Foo
  • Patent number: 10861214
    Abstract: In some aspects, systems and methods provide for forming groupings of a plurality of independently-specified computation workloads, such as graphics processing workloads, and in a specific example, ray tracing workloads. The workloads include a scheduling key, which is one basis on which the groupings can be formed. Workloads grouped together can all execute from the same source of instructions, on one or more different private data elements. Such workloads can recursively instantiate other workloads that reference the same private data elements. In some examples, the scheduling key can be used to identify a data element to be used by all the workloads of a grouping. Memory conflicts to private data elements are handled through scheduling of non-conflicted workloads or specific instructions and/or deferring conflicted workloads instead of locking memory locations.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: December 8, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Luke T. Peterson, James A. McCombe, Steven J. Clohset, Jason R. Redgrave
  • Patent number: 10855907
    Abstract: Apparatus for controlling the focus of a camera arranged to capture a sequence of frames, includes an image processor configured to: form an image characteristic for a plurality of blocks of a first frame, each block comprising one or more pixels of the first frame; and calculate an image parameter for each block by combining the image characteristics of blocks lying within a predefined zone relative to that block; and a focus controller configured to derive a measure of focus for a selected frame area of the first frame by identifying a set of blocks whose respective predefined zones, when combined, substantially represent the selected frame area, and forming a measure of focus for the selected frame area by so combining the image parameters of the set of blocks; wherein the focus controller is configured to generate a signal for controlling camera focus in dependence on the measure of focus formed for the selected frame area of the first frame.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: December 1, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Paul Buxton
  • Patent number: 10853988
    Abstract: A method of rendering geometry of a 3D scene for display on a non-standard projection display projects geometry of the 3D scene into a 2D projection plane, wherein image regions are defined in the projection plane, maps the geometry from the projection plane into an image space using transformations, wherein a respective transformation is defined for each image region, and renders the geometry in the image space to determine image values of an image to be displayed on the non-standard projection display. The transformations are configured for mapping the geometry into the image space so as to counteract distortion introduced by an optical arrangement of the non-standard projection display.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: December 1, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Simon Fenney