Patents Assigned to IMEC vzw
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Patent number: 11511275Abstract: A method for detecting, sorting, purifying and characterizing objects of interest in a liquid sample. The method comprises preparing, in a preparation module ON) of a microfluidic router system, the liquid sample for processing. Preparing comprises transporting the sample through a microfluidic channel, and forwarding the prepared sample from an outlet of the preparation module into an inlet of a routing module. Forwarding comprises coupling a microfluidic flow between the outlet and the inlet to passively buffer against or actively compensate for variations in a flow rate of the prepared sample at the outlet, and diverting the objects of interest from the microfluidic flow. Forwarding the sample comprises sensing a flow characteristic of the sample in preparation, routing module, or in flow connection, and controlling a flow control element taking the sensed characteristic into account to compensate for a variation in the flow rate by a closed-loop flow control.Type: GrantFiled: December 20, 2018Date of Patent: November 29, 2022Assignee: IMEC VZWInventor: Chengxun Liu
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Patent number: 11515399Abstract: In one aspect, a method of forming a semiconductor device can comprise forming a first transistor structure and a second transistor structure separated by a first trench which comprises a first dielectric wall protruding above a top surface of the transistor structures. The first and the second transistor structures each can comprise a plurality of stacked nanosheets forming a channel structure, and a source portion and a drain portion horizontally separated by the channel structure. The method further can comprise depositing a contact material over the transistor structures and the first dielectric wall, thereby filling the first trench and contacting a first source/drain portion of the first transistor structure and a first source/drain portion of the second transistor structure.Type: GrantFiled: December 4, 2020Date of Patent: November 29, 2022Assignee: IMEC vzwInventors: Eugenio Dentoni Litta, Juergen Boemmels, Julien Ryckaert, Naoto Horiguchi, Pieter Weckx
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Patent number: 11506917Abstract: An optical device for forming a distribution of a three-dimensional light field comprises: an array of individually addressable unit cells; each unit cell in the array of unit cells comprising a stack including: at least one electrode; and a resonance defining layer, comprising at least a phase change material, PCM, layer, wherein the resonance defining layer is patterned to define a geometric structure dimensioned for defining a wavelength-dependent in-plane resonance of an electromagnetic wave; wherein the at least one electrode causes a phase change of the phase change material based on receiving a control signal to alter a wavelength-dependency of resonance in the resonance defining layer for controlling the optical property of the unit cell; wherein unit cells in the array of unit cells are separated such that the PCM layer of a unit cell is separated from the PCM layer in an adjacent unit cell.Type: GrantFiled: January 30, 2019Date of Patent: November 22, 2022Assignee: IMEC VZWInventors: Xavier Rottenberg, Kristof Lodewijks
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Patent number: 11487243Abstract: A holographic imaging device is disclosed. In one aspect, the holographic imaging device comprises an imaging unit comprising at least two light sources, wherein the imaging unit is configured to illuminate an object by emitting at least two light beams with the at least two light sources. A first and second light beams have different wave-vectors and wavelengths. The holographic imaging device further comprises a processing unit configured to obtain at least two holograms of the object by controlling the imaging unit to sequentially illuminate the object with respectively the first light beam and the second light beam, construct at least two 2D image slices based on the at least two holograms, wherein each 2D image slice is constructed at a determined depth within the object volume, and generate a three-dimensional image of the object based on a combination of the 2D image slices.Type: GrantFiled: September 25, 2020Date of Patent: November 1, 2022Assignee: IMEC vzwInventors: Richard Stahl, Abdulkadir Yurt
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Patent number: 11488826Abstract: In one aspect, a method can include forming, by self-aligned multiple patterning, a first pattern of regularly spaced mandrels on a layer to be patterned; forming hard mask spacers on sidewalls of the mandrels, thereby forming a second pattern formed of assemblies comprising a mandrel and hard mask spacers on sidewalls thereof; and etching the second pattern in the layer to be patterned.Type: GrantFiled: July 16, 2020Date of Patent: November 1, 2022Assignee: IMEC vzwInventors: Boon Teik Chan, Yong Kong Siew, Juergen Boemmels
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Patent number: 11488954Abstract: The disclosed technology relates generally to semiconductor devices and manufacturing methods thereof, and more particularly to field-effect transistors operating at different voltages and methods for integrating the same.Type: GrantFiled: December 18, 2020Date of Patent: November 1, 2022Assignee: IMEC vzwInventors: Eugenio Dentoni Litta, Alessio Spessot
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Patent number: 11480655Abstract: Example embodiments relate to transmitter-receiver leakage suppression in integrated radar systems. One embodiment includes a front-end for a radar system. The front-end includes a transmit path that includes a power amplifier and a transmit antenna. The transmit path is configured to transmit a transmit signal. The front-end also includes a receive path that includes a receive antenna and a low-noise amplifier. The receive path is configured to receive at least a leakage from the transmit path. The receive path is configured to generate an amplified signal of the leakage. Further, the front-end also includes a reference path. In addition, the front-end includes a compensation unit in the reference path. The compensation unit is configured to generate compensation for a leakage path between the transmit path and the receive path. The compensation unit is configured to apply the generated compensation to the reference signal to generate a compensated reference signal.Type: GrantFiled: February 13, 2020Date of Patent: October 25, 2022Assignee: IMEC VZWInventors: Akshay Visweswaran, Kristof Vaesen
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Patent number: 11476858Abstract: An successive approximation register analog-to-digital converter is provided. The successive approximation register analog-to-digital converter includes a digital-to-analog converter, a successive approximation register, a comparator, and a threshold voltage determining unit. In this context, the threshold voltage determining unit is configured to dynamically determine the threshold voltage of the comparator on the basis of the input signal of the digital-to-analog converter or the output signal of the comparator.Type: GrantFiled: April 2, 2021Date of Patent: October 18, 2022Assignee: Imec vzwInventors: Ewout Martens, Davide Dermit, Jan Craninckx
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Patent number: 11476162Abstract: A method is provided for dicing a semiconductor substrate into a plurality of dies, the semiconductor substrate having a front side including a plurality of device areas, a back side, and a plurality of through substrate vias. The method includes defining, from the front side, at least one trench to be formed between adjacent device areas, forming the at least one trench, from the front side of the semiconductor substrate, arranging a protective layer on the front side of the semiconductor substrate, thinning the semiconductor substrate from the back side to reduce the thickness of the semiconductor substrate, processing the back side of the semiconductor substrate to form at least one contact, the contact contacting at least one through substrate via, etching through the minor portion of the thickness of the semiconductor substrate underneath the at least one trench, and dicing the semiconductor substrate into the plurality of dies.Type: GrantFiled: September 30, 2020Date of Patent: October 18, 2022Assignee: Imec VZWInventors: Frank Holsteyns, Eric Beyne, Christophe Lorant, Simon Braun
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Patent number: 11476119Abstract: A method for manufacturing a semiconductor structure that comprises providing a monocrystalline silicon base layer comprising a first region for manufacturing the III-N semiconductor device and a second region for manufacturing the silicon semiconductor device; providing on the monocrystalline silicon base layer a mask layer, the mask layer being interrupted, in the first region, by a recess in the monocrystalline silicon base layer, wherein the mask layer comprises a 2D material; forming, selectively, a layer of gamma-Al2O3 at the bottom of the recess by a first growth process; forming, selectively on the layer of gamma-Al2O3, a III-N semiconductor device stack by a second growth process, and thereafter; manufacturing, in the second region, at least partially a silicon semiconductor device.Type: GrantFiled: July 14, 2021Date of Patent: October 18, 2022Assignee: IMEC VZWInventors: Ming Zhao, Annelies Delabie
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Patent number: 11475101Abstract: A method and hardware system for mapping an input map of a convolutional neural network layer to an output map are disclosed. An array of processing elements are interconnected to support unidirectional dataflows through the array along at least three different spatial directions. Each processing element is adapted to combine values of dataflows along different spatial directions into a new value for at least one of the supported dataflows. For each data entry in the output map, a plurality of products from pairs of weights of a selected convolution kernel and selected data entries in the input map is provided and arranged into a plurality of associated partial sums. Products associated with a same partial sum are accumulated on the array and accumulated on the array into at least one data entry in the output map.Type: GrantFiled: November 15, 2019Date of Patent: October 18, 2022Assignee: Imec VZWInventors: Francky Catthoor, Praveen Raghavan, Dimitrios Rodopoulos, Mohit Dandekar
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Patent number: 11471887Abstract: A microfluidic device comprising a plurality of microreactors is provided. Each microreactor includes at least a first inlet and a second inlet for supplying a first fluid and a second fluid, respectively, to said microreactor and at least one waste channel for draining fluid from said microreactor. The device further comprises a shared first microfluidic supply system for supplying a first fluid to the first inlets of the plurality of microreactors, a shared second microfluidic supply system for supplying a second fluid to the second inlets of the plurality of microreactors. At least one of said inlets to each microreactor comprises at least one valve-less fluidic resistance element having a fluidic resistance that is substantially larger than the fluidic resistance of the corresponding shared microfluidic supply system. A chemical reaction sequencer apparatus including the microfluidic device and a method for supplying reagents to a plurality of microreactors are also provided.Type: GrantFiled: November 25, 2019Date of Patent: October 18, 2022Assignee: IMEC VZWInventors: Peter Peumans, Benjamin Jones, Nicolas Vergauwe
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Patent number: 11477262Abstract: A method for requesting a plurality of chunks by a streaming client on the basis of a single request message is described, wherein said chunks are defined on the basis of a manifest file comprising chunk identifiers for determining at least one delivery node for delivering chunks defined by said chunk identifiers to said client, wherein said method comprises: determining on the basis of said manifest file a first request message for requesting a first plurality of chunks, said first request message comprising one or more first chunk template parameters and a first chunk template, preferably an URL chunk template, comprising one or more chunk template parameters fields; sending said first request message to a first network node, wherein said first network node is configured for determining a first plurality of chunk identifiers, preferably a first plurality of URLs, associated with said first plurality of chunks on the basis of said first chunk template and said one or more first chunk template parameters; andType: GrantFiled: February 12, 2015Date of Patent: October 18, 2022Assignees: KONINKLIJKE KPN N.V., Universiteit Gent, IMEC VZWInventor: Jeroen Famaey
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Patent number: 11475683Abstract: An object classification system for classifying objects is described. The system comprises an imaging region adapted for irradiating an object of interest, an arrayed detector, and a mixing unit configured for mixing the irradiation stemming from the object of interest by reflecting or scattering on average at least three times the irradiation after its interaction with the object of interest and prior to said detection.Type: GrantFiled: May 26, 2018Date of Patent: October 18, 2022Assignees: UNIVERSITEIT GENT, IMEC VZWInventors: Peter Bienstman, Alessio Lugnan, Floris Laporte
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Patent number: 11476155Abstract: A method that provides patterning of an underlying layer to form a first set of trenches and a second set of trenches in the underlying layer is based on a combination of two litho-etch (LE) patterning processes supplemented with a spacer-assisted (SA) technique. The method uses one or more first upper blocks formed by a tone-inversion approach, an upper memorization layer allowing first memorizing upper trenches, and then second upper blocks, and a lower memorization layer allowing first memorizing first lower trenches and one or more first lower blocks, and then second lower trenches and one or more second lower blocks.Type: GrantFiled: April 22, 2021Date of Patent: October 18, 2022Assignee: IMEC VZWInventors: Victor M. Blanco, Frederic Lazzarino
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Patent number: 11470189Abstract: A method is disclosed for providing network access by a network stack in a communication device comprising a plurality of physical communication interfaces, each comprising a data link layer for the exchange of data frames with remote communication devices and a data link layer interface for exchanging data of data frames between the data link layer and higher layers in the network stack; and wherein the method comprises i) providing an abstraction data link layer comprising a single abstracted data link layer interface such that the plurality of physical communication interfaces appear as a single data link layer interface to the higher layers; and ii) obtaining network packets from the higher layers and distributing the network packets over the plurality of physical communication interfaces according to a neutral packet distribution scheme.Type: GrantFiled: May 14, 2018Date of Patent: October 11, 2022Assignees: IMEC VZW, UNIVERSITEIT ANTWERPENInventors: Patrick Daniel Bosch, Tom Johan R De Schepper, Ensar Zeljkovic, Jeroen Maurice M Famaey, Steven Bert Latre
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Patent number: 11462420Abstract: A method for packaging semiconductor dies by overmolding is disclosed. The dies are embedded in a substrate of a mold material, and cavities are produced in the mold substrate by producing 3D structures of a sacrificial material prior to the overmolding step. Afterwards, the sacrificial material is removed to thereby create cavities in the mold substrate. A conformal layer is produced on the 3D structures prior to overmolding, and the mold substrate is thinned to expose an upper surface of the 3D structures. The conformal layer is not removed when the sacrificial structures are removed. In this way, the conformal layer remains on the surfaces of the mold substrate inside the cavity. In one aspect, the conformal layer may have a protective function, useful in the production of packages including dies which come into contact with fluid substances.Type: GrantFiled: October 14, 2019Date of Patent: October 4, 2022Assignee: IMEC vzwInventor: Eric Beyne
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Patent number: 11462443Abstract: In one aspect, a method of forming a semiconductor device, can comprise forming a first transistor structure and a second transistor structure separated by a trench. The first and the second transistor structures can comprise a plurality of stacked nanosheets forming a channel structure, and a source portion and a drain portion horizontally separated by the channel structure. A first and a second spacer can beformed in the trench at sidewalls of the transistor structures, both protruding above a top surface of the transistor structures. The method can comprise applying a first mask layer including an opening exposing the first spacer at a first source/drain portion of the first transistor structure and covering the second spacer, partially etching the exposed first spacer through the opening, exposing at least parts of a sidewall of the first source/drain portion of the first transistor structure, and removing the mask layer.Type: GrantFiled: December 3, 2020Date of Patent: October 4, 2022Assignee: IMEC vzwInventors: Eugenio Dentoni Litta, Juergen Boemmels, Julien Ryckaert, Naoto Horiguchi, Pieter Weckx
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Patent number: 11462244Abstract: A storage device configured to store data on a tape is provided. In one aspect, the storage device includes the tape, which is configured to store data, and a data head, which is configured to read and/or write data from and/or to the tape. The storage device further includes an actuator configured to move the tape in a length direction in a step-wise manner. The actuator can include a plurality of pulling electrodes, wherein each pulling electrode can be activated to exert a pulling force on the tape, and a plurality of clamping electrodes, wherein each clamping electrode can be activated to clamp the tape.Type: GrantFiled: December 20, 2021Date of Patent: October 4, 2022Assignee: IMEC vzwInventors: Grim Keulemans, Veronique Rochus, Maarten Rosmeulen, Xavier Rottenberg
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Patent number: 11454583Abstract: An example includes a field-flow fractionation device for the continuous separation of sample components including a channel comprising a sample inlet and a plurality of sample outlets, the channel being for coupling to a flow generator for translocating the sample components along the channel in a first direction from the sample inlet to the plurality of sample outlets, an actuator, which is not the flow generator, coupled to the channel, for translocating the sample components in a second direction, at a first angle with the first direction, an array of electrodes for connection to an AC power source, being in a path taken by the sample components in the channel, arranged in a plurality of rows, and in such a way that adjacent rows can be set at different potentials and every other row can be set at the same potential.Type: GrantFiled: December 24, 2020Date of Patent: September 27, 2022Assignees: IMEC VZW, Katholieke Universiteit, KU Leuven R&DInventors: Chengxun Liu, Andim Stassen, Ying Ting Set