Abstract: A method of determining the behavior of an electronic system comprising electronic components under variability is disclosed. In one aspect, the method comprises for at least one parameter of at least one of the electronic components, showing variability defining a range and a population of possible values within the range, each possible value having a probability of occurrence, thereby defining an input domain. The method further comprises selecting inputs randomly from the input domain, wherein the probability to sample (PTS) is obtained from the probability of occurrence (PTOIR). The method further comprises performing simulation to obtain the performance parameters of the electronic system, thereby defining an output domain sample.

Abstract: One inventive aspect relates to a method of determining an estimate of system-level yield loss for an electronic system comprising individual components subject to manufacturing process variability leading to manufacturing defects. The method comprises obtaining a description of the composition of the electronic system in terms of which individual components are used. The method further comprises obtaining statistical properties of the performance of individual components of the electronic system with respect to first and second performance variables, e.g. energy consumption and delay, the statistical properties including correlation information of the first and second performance variables. The method further comprises obtaining information about execution of an application on the system, e.g. a number of accesses of a component by an application.

Abstract: The present disclosure is related to a method for determining time to failure characteristics of a microelectronics device. A test structure, being a parallel connection of a plurality of such on-chip interconnects, is provided. Measurements are performed on the test structure under test conditions for current density and temperature. The test structure is arranged such that failure of one of the on-chip interconnects within the parallel connection changes the test conditions for at least one of the other individual on-chip interconnects of the parallel connection. From these measurements, time to failure characteristics are determined, whereby the change in the test conditions is compensated for.

Abstract: A device and a method for realizing reliable electrical contacts at low temperature and low pressure between conducting materials on, for example, different substrates are disclosed. In one aspect, a rough and brittle intermetallic layer is formed on a conducting material on a first substrate. A soft solder material layer on the other substrate is used for contacting the brittle and rough intermetallic layer that will break. As the solder material is relatively soft, contact between the broken intermetallic layer and the solder material can be realized over a large portion of the surface area. At that stage, a second intermetallic layer is formed between the solder material and the first intermetallic layer realizing electrical contact.

Abstract: The present invention relates in a first aspect to methods for producing a nanofibres-containing layer for use as an active layer in an organic electronic device. The method comprising the steps of: a) first heating up a nanofibre-forming polymer in a solvent at a temperature T1, then b) cooling said solution down to a temperature T2 at a rate less than 40° C./h thereby forming a dispersion comprising crystalline nanofibres of said nanofibre-forming polymer, then c) raising the temperature of said dispersion to a temperature T3 higher than T2, but lower than said temperature T1, and then d) coating said dispersion on a substrate at said temperature T3 thereby forming a layer for use as an element of said organic electronic device, wherein before step (d), a step of adding an electron acceptor to the solution or dispersion is performed.

Abstract: A method of positioning at least 2 chips simultaneously on a substrate by parallel stochastic assembly in a first liquid is disclosed. In one aspect, the chips are directed to target sites on the substrate within the first liquid. The target sites are covered with a second liquid. The second liquid and the first liquid are immiscible. The chips are attracting the first liquid. A predetermined surface is chosen or treated on each chip such that it is selectively attracted by the second liquid and attracting the first liquid.

Abstract: In one aspect of the invention, a method or apparatus is described for determining concentration(s) of one or more analytes in a sample using plasmonic excitations. In another aspect, a method relates to designing systems for such concentration determination, wherein metallic nanostructures are used in combination with local electrical detection of such plasmon resonances via a semiconducting photodetector. In certain aspects, the method exploits the coupling of said metallic nanostructure(s) to a semiconducting photodetector, said detector being placed in the “metallic structure's” near field. Surface plasmon excitation can be transduced efficiently into an electrical signal through absorption of light that is evanescently coupled or scattered in a semiconductor volume. This local detection technique allows the construction of sensitive nanoscale bioprobes and arrays thereof.

Abstract: Presented is a method of managing the operation of a system including a processing subsystem configured to run a multimedia application and a telecommunication subsystem. The method includes determining telecom environment conditions, and selecting a working point from a plurality of predetermined working points. The selecting is based at least in part on the determined environmental conditions. The method also includes setting control parameters in the multimedia application and/or the telecommunication subsystem to configure the system to operate at the selected working point, and operating the system at the selected working point.

Abstract: A device and method for selecting a frequency channel of given bandwidth in a cognitive radio application is disclosed. In one aspect, the method includes evaluating, at one of a plurality of frequency bins, a function indicative of the frequency occupancy. If the evaluation result indicates free spectrum at the considered frequency bin, the previous step is repeated for a frequency bin adjacent to the considered frequency bin until the free frequency bins constitute a frequency channel of the given bandwidth. Otherwise, the method moves to select a next frequency bin to be considered. It is selected by calculating a measure of the left and right derivative of the function at the considered frequency bin, taking the measure of the left or right derivative as gradient approximation, and determining the next frequency bin by shifting the considered frequency bin over a frequency shift inversely proportional to the gradient approximation.

Abstract: A method for manufacturing a non-volatile memory device is described. The method comprises growing a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored. A non-volatile memory device is also described. In the non-volatile memory device, the interpoly/blocking dielectric comprises a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored, the siliconoxide consuming material having consumed at least part of the upper layer.

Abstract: One aspect of the invention includes a method of address expression optimization of source-level code. The source-level code describes the functionality of an application to be executed on a digital device. The method comprises first inputting first source-level code that describes the functionality of the application into optimization system. The optimization system then transforms the first source-level into a second source level that has fewer nonlinear operations than the first source-level code.

Abstract: One inventive aspect is related to a method for isolating structures of a semiconductor material, comprising providing a pattern of the semiconductor material comprising at least one elevated line, defining device regions in the pattern, the device regions each comprising at least said at least one elevated line, and modifying the conductive properties of the semiconductor material outside said device regions, such that the device regions are electrically isolated.

Abstract: A method is provided for all-optical regeneration of intensity modulated optical signals. A DFB laser diode is selected such that it has a gain bandwidth comprising the signal wavelength, the signal wavelength being outside the stopband of the DFB laser diode. Furthermore, the DFB laser diode is selected such that it can have a bistable amplification characteristic for the signal wavelength showing a hysteresis with an ascending branch and a descending branch, the ascending branch located at a higher input power level than the descending branch. The DFB laser diode is driven such that it operates in the bistable amplification regime, the descending branch of the hysteresis curve located at an input power level above the lower power level of the optical signal pulses and the ascending branch of the hysteresis curve located at an input power level below the upper power level of the optical signal pulses.

Abstract: The invention relates to an assembly for detecting the presence of a target based on a detection of a resonance associated to surface polaritons, such as long-range surface exciton polaritons (LRSEP). The invention relates to an assembly to be used in connection with a bio-sensor. The assembly comprising a carrier substrate (1) and a sensor layer (2) positioned on the carrier substrate. The sensor layer is of a material having a complex permittivity with an imaginary part being greater than or similar to the real part.

Abstract: The present invention relates a method for forming a monocrystalline GeN layer (4) on a substrate (1) comprising at least a Ge surface (3). The method comprises, while heating the substrate (1) to a temperature between 550° C. and 940° C., exposing the substrate (1) to a nitrogen gas flow. The present invention furthermore provides a structure comprising a monocrystalline GeN layer (4) on a substrate (1). The monocrystalline GeN formed by the method according to embodiments of the invention allows passivation of surface states present at the Ge surface (3).

Abstract: Network on Chip (NoC) Devices, especially Heterogeneous Multiprocessor Network on Chip Devices are described, that optionally contain Reconfigurable Hardware Tiles, as well as Methods and Operating Systems (OS) for Control thereof. In accordance with an aspect of the present invention the Operating Systems handle either (a) run-time traffic management methods or (b) task migration methods, or a combination of these methods. The Operating Systems may be partly distributed but with a centralized master. The traffic management methods and apparatus of the invention use a statistical QoS approach. A system is described having an at least dual Network on Chip as well as methods of operating the same. The system has at least an on-chip communications network, comprising a first on-chip data traffic network (data NoC) and a second on-chip control traffic network (control NoC), having a control network interface component (control NIC) and a data network interface component (data NIC).

Abstract: A method for manufacturing a dual workfunction semiconductor device and the device made thereof are disclosed. In one aspect, the method includes manufacturing a first transistor in a first region and a second transistor in a second region of a substrate, the first transistor including a first gate stack, the first gate stack having a first gate dielectric capping layer and a first metal gate electrode layer. The second gate stack is similar to the first gate stack. The method includes applying a first thermal budget to the first gate dielectric capping layer and a second thermal budget to the second gate dielectric capping material to tune the workfunction of the first and second gate stack, the first thermal budget being smaller than the second thermal budget such that after the thermal treatment the first and the second gate stack have different work functions.

Abstract: A micromechanical resonator device and a method for measuring a temperature are disclosed. In one aspect, the device has a resonator body, an excitation module, a control module, and a frequency detection module. The resonator body is adapted to resonate separately in at least a first and a second predetermined resonance state, selected by applying a different bias, the states being of the same eigenmode but having a different resonance frequency, each resonance frequency having a different temperature dependence. The micromechanical resonator device may have a passive temperature compensated resonance frequency.

Abstract: One inventive aspect is related to an atomic layer deposition (ALD) method comprising: a) providing a semiconductor substrate in a reactor, b) providing a pulse of a first precursor gas into the reactor at a first temperature, c) providing a first pulse of a second precursor gas into the reactor at a second temperature, and d) providing a second pulse of the second precursor gas at a third temperature lower than the second temperature. Another inventive aspect relates to a reactor suitable to apply the method.

Abstract: The present disclosure relates to a gas sensor including a first layer and a second layer superimposed on each other along an interface between the two layers. The first layer includes an array of nanoparticles along the interface, the nanoparticles provided so as to allow, upon illumination with electromagnetic radiation, long range diffractive coupling of surface plasmon resonances resulting in a surface lattice resonance condition. The second layer includes a material that, when exposed to at least one predetermined gas, detectably affects the surface lattice resonance condition. The material of the second layer preferably has a porosity of at least 10%.