Abstract: The present invention is related to an analog to digital converter circuit. The circuit comprises at least one input node for applying an analog input voltage signal (Vin), means for sampling said analog input voltage signal, a first array of capacitors arranged for receiving the sampled analog input voltage signal, a digital delay line connected to the first array of capacitors and arranged for being enabled by a clock generator and for generating a staircase or slope function by means of the first capacitor array, taking into account the sampled analog input voltage signal, a comparator arranged for comparing a converted signal with a reference voltage (Vref), said converted signal being a version of said sampled analog input voltage converted according to said staircase or slope function, and for generating a stop signal based on the comparison result thereby latching the digital delay line and thereby acquiring the digital code.

Abstract: One inventive aspect relates to a method for forming hermetically sealed cavities, e.g. semiconductor cavities comprising fragile devices, MEMS or NEMS devices. The method allows forming hermetically sealed cavities at a controlled atmosphere and pressure and at low temperatures, for example, at temperatures not exceeding about 200° C. The method further allows forming sealed cavities with short release times, for example, release times of about a few minutes to 30 minutes. The method may, for example, be used for zero level packaging of MEMS or NEMS devices.

Abstract: A method for forming a semiconductor device is disclosed. The device includes a control electrode on a semiconductor P-channel layer having at least a gate dielectric layer. The gate dielectric layer has an exponentially decreasing density of defect levels Et in as function of energy from the band edges of the adjacent layer (the semiconductor P-channel layer or optionally the capping layer) toward the center of the bandgap of this layer. The method includes selecting at least one parameter of the P-channel semiconductor device such that the inversion carrier injection into the distribution of defect levels deviates from the energy level at the center of the bandgap of a layer adjacent the gate dielectric layer at the same side of the gate dielectric layer as the P-channel layer, with a value not more than about 49%, such as not more than about 40%, for example not more than about 20%, not more than about 10%, even not more than about 5% of that bandgap in eV. In one aspect, this allows reducing NBTI.

Abstract: In the preferred embodiments, a method to reduce gate leakage and dispersion of group III-nitride field effect devices covered with a thin in-situ SiN layer is provided. This can be obtained by introducing a second passivation layer on top of the in-situ SiN-layer, in combination with cleaning of the in-situ SiN before gate deposition and before deposition of the second passivation layer.

Abstract: A time interval measuring system is disclosed. In one embodiment, the time interval measuring system includes a plurality of time interval analyzers, each having a resolution that differs from a resolution of at least one other time interval analyzer in the plurality of time interval analyzers. The plurality of time interval analyzers are configured to receive a first event signal representing a first event, receive a second event signal representing a second event, and generate digital first estimates representing a time difference between the first event and the second event. The time interval measuring system further includes a post-processing unit configured to receive the digital first estimates and combine the digital first estimates according to at least one algorithm to generate a digital second estimate representing the time difference between the first event and the second event having higher precision than each of the digital first estimates.

Abstract: An adaptive front-end architecture for a receiver is disclosed. In one embodiment, the adaptive front-end architecture includes an input configured to receive an input signal and a linear low-noise amplifier connected to the input and configured to amplify the input signal to produce an amplified input signal. The adaptive front-end architecture further includes a first passive mixer arrangement configured to generate first a local oscillator signal and mix the first local oscillator signal with the amplified input signal to produce a first baseband output signal. The adaptive front-end architecture further includes a second passive mixer arrangement configured to generate a second local oscillator signal and mix the second local oscillator signal with the input signal to produce a second baseband output signal. The adaptive front-end architecture further includes a baseband impedance component configured to filter the first baseband signal and/or the second baseband signal using impedance translation.

Abstract: Photonic structures and methods of operating the photonic structures are disclosed. In one embodiment, the photonic structure includes a detector configured to detect radiation of a first wavelength range. The radiation of the first wavelength range is received from an external radiation guide, and the detector is substantially transparent to radiation of a second wavelength range that differs from the first wavelength range. The photonic structure further includes a coupling structure configured to free space couple out of the photonic structure radiation of the second wavelength range. The photonic structure further includes a guiding structure configured to optically guide the radiation of the second wavelength range through the detector.

Abstract: The present disclosure relates to a device comprising a mono-crystalline substrate, the mono-crystalline substrate having at least one recessed region which exposes predetermined crystallographic planes of the mono-crystalline substrate, the at least one recessed region further having a recess width and comprising a filling material and an embedded nanochannel, wherein the width, the shape, and the depth of the embedded nanochannel is determined by the recess width of the at least one recessed region and by the growth rate of the growth front of the filling material in a direction perpendicular to the exposed predetermined crystallographic planes. The present disclosure is also related to a method for manufacturing a nanochannel device.

Abstract: One aspect of the invention relates to a symmetrical transformer with a stacked coil structure comprising two coils each having at least two turns. The coils are located in two conductive planes. The structure includes four identical basic elements, each basic element providing a conductive path for part of the coils. The terminals of the transformer are located at opposite sites of the structure so that the structure can be easily connected in a chain. The invention also relates to a semiconductor device comprising such a structure.

Abstract: In order to design on-chip interconnect structures in a flexible way, a CAD approach is advocated in three dimensions, describing high frequency effects such as current redistribution due to the skin-effect or eddy currents and the occurrence of slow-wave modes. The electromagnetic environment is described by a scalar electric potential and a magnetic vector potential. These potentials are not uniquely defined, and in order to obtain a consistent discretization scheme, a gauge-transformation field is introduced. The displacement current is taken into account to describe current redistribution and a small-signal analysis solution scheme is proposed based upon existing techniques for static fields in semiconductors. In addition methods and apparatus for refining the mesh used for numerical analysis is described.

Abstract: A mixed micro-fluidic multi-electrode grid array (MEGA) device (10) suitable for holding a tissue slice (6) and for recording and/or stimulating neuron cells from said tissue slice (6), the MEGA device (10) comprising at least a top substrate in the form of a grid (4) comprising at least an electrical and/or optical multi-electrode array and a bottom substrate in the form of a stack made of a grid (1) comprising an electrical and/or optical multi-electrode array and a backbone (2) underneath said grid (1) comprising a micro-fluidic perfusion system. Furthermore said MEGA device (10) comprises means (5) for pressing and positioning said first and second substrate together and adhering a tissue slice in between said two substrates.

Abstract: An apparatus and method for low-power sensing, for example, sensing of chemical or biochemical analytes in a gas or liquid phase are disclosed. One aspect relates to the use of a thin continuous film without grain boundaries as a sensing layer in devices for sensing a predetermined analyte and to low power devices having such sensing layer. The sensing layer has a surface exposed to the analyte. The electrical impedance of the sensing layer changes upon adsorption of the predetermined analyte on the exposed surface of the sensing layer. The sensing layer may have a thickness in the range between about 1 nm and 100 nm, such as between about 1 nm and 30 nm. The sensing layer may be an amorphous layer.

Abstract: A method of manufacturing a light emitting diode is disclosed. In one aspect, the light emitting diode has a carrier, an active layer structure of III-nitride type materials, and a photonic crystal structure of III-nitride type materials. The active layer structure includes a first active layer with an n-type doped layer and a p-type doped layer and suitably a quantum well structure. The photonic crystal structure includes periodically distributed trenches or periodically distributed pillars spaced by one or more trenches. The photonic crystal structure includes an overgrowth layer within which a diameter of a trench gradually increases, and a directional photonic crystal layer in which the diameter of a trench is substantially constant. The diode may be formed in a method wherein the directional photonic crystal layer is provided on a three-dimensional pattern that exposes selected areas of the first surface of the substrate.

Abstract: A method for determining a concentration of an analyte is provided.

Abstract: A bio-hybrid implant suitable for recording and/or stimulating cells, the implant comprising (a) at least one closed insulated chamber (1) containing a substrate (502) with a neural interface (13) for connecting neurons to an electronic circuit, (b) at least one flexible guiding channel (10) having a first interface (11) to connect to at least one of the closed insulated chambers (1) and a second interface (9) to connect to a hosts' nerve system (7) or to another insulated chamber.

Abstract: A method for determining the topography of a static surface (305) of an object (301) comprises the steps of: (a) selecting a region (301a) on the static surface (305) of the object (301); (b) directing an incident monochromatic electromagnetic wave (302) onto the region (301a) while the surface (305) and the incident monochromatic electromagnetic wave (302) are moved relative to one another, the incident monochromatic electromagnetic wave (302) being characterised by a frequency f0, an amplitude A0 and a propagation direction, the direction of movement (304) being substantially not parallel to the propagation direction of the incident monochromatic electromagnetic wave (302), wherein the surface (305) reflects the incident monochromatic electromagnetic wave (302) thus generating a reflected monochromatic electromagnetic wave (303), the movement (304) being characterized by a movement frequency (F) and a movement amplitude (A); (c) determining properties of the monochromatic electromagnetic wave (303) reflecte

Abstract: The present disclosure provides a method for manufacturing at least one nanowire Tunnel Field Effect Transistor (TFET) semiconductor device. The method comprises providing a stack comprising a layer of channel material with on top thereof a layer of sacrificial material, removing material from the stack so as to form at least one nanowire from the layer of channel material and the layer of sacrificial material, and replacing the sacrificial material in the at least one nanowire by heterojunction material. A method according to embodiments of the present disclosure is advantageous as it enables easy manufacturing of complementary TFETs.

Abstract: Methods and apparatus in the field of single molecule sensing are described, e.g. for molecular analysis of analytes such as molecular analytes, e.g. nucleic acids, proteins, polypeptides, peptides, lipids and polysaccharides. Molecular spectroscopy on a molecule translocating through a solid-state nanopore is described. Optical spectroscopic signals are enhanced by plasmonic field-confinement and antenna effects and probed in transmission by plasmon-enabled transmission of light through an optical channel that overlaps with the physical channel.

Abstract: A circuit and method for providing a digital output indicative of the time at which an event occurred is disclosed. In one aspect, the circuit includes a fine timing circuit configured to determine in which sub-interval of a clock period the event occurred, and a correction circuit configured to correct an erroneous offset between a first and second clock signals in the fine timing circuit. The correction circuit includes a synch circuit configured to determine in which half of the clock period the event occurred so as to correct for erroneous offset in the fine timing circuit.

Abstract: A method for fabricating a semiconductor device and the device made thereof are disclosed. In one aspect, the method includes providing a substrate comprising a semiconductor material. The method further includes patterning at least one fin in the substrate, the fin comprising a top surface, at least one sidewall surface, and at least one corner. A supersaturation of point defects is created in the at least one fin. The at least one fin is annealed and then cooled down such that semiconductor atoms of the semiconductor material migrate via the point defects.