Patents Assigned to Infineon Technologies AG
  • Patent number: 11885903
    Abstract: A method for a radar device is described below. According to an example implementation, the method comprises transmitting an RF transmission signal that comprises a plurality of frequency-modulated chirps, and receiving an RF radar signal and generating a dataset containing in each case a particular number of digital values based on the received RF radar signal. A dataset may in this case be associated with a chirp or a sequence of successive chirps. The method furthermore comprises filtering the dataset by way of a neural network to which the dataset is fed in order to reduce an interfering signal contained therein. A convolutional neural network is used as the neural network.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Paul Meissner, Elmar Messner, Franz Pernkopf, Johanna Rock, Mate Andras Toth
  • Patent number: 11885648
    Abstract: A method for determining a rotation angle of a magnet includes measuring a 3D magnetic field vector of a magnetic field generated by the magnet, wherein the 3D magnetic field vector describes at least a part of an ellipse in 3D space during a rotational movement of the magnet. The method further includes mapping the measured 3D magnetic field vector to a 2D vector based on a compensation mapping, wherein the compensation mapping is configured to map the ellipse in 3D space to a circle in 2D space. The method further includes determining the rotation angle of the magnet based on the 2D vector.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Joo II Park, Richard Heinz, Hyun Jeong Kim, Stephan Leisenheimer, Severin Neuner
  • Patent number: 11886668
    Abstract: A touch sensor includes: a transmitter configured to transmit an ultrasonic transmit wave towards a touch structure; a receiver configured to receive an ultrasonic reflected wave produced from the ultrasonic transmit signal being at least partially reflecting by the touch structure; a receiver circuit configured to convert the ultrasonic reflected wave into a measurement signal; the receiver circuit configured to generate an error value representative of a difference between a measured value of the measurement signal and a reference value; a programmable voltage source configured to provide a bias voltage to the transmitter or to the receiver; a controller configured to adjust the bias voltage based on the error value; a measurement circuit configured to measure the DC bias voltage and determine whether a no-touch event or a touch event has occurred at the touch structure based on at least one measurement of the bias voltage.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Matthias Eberl, Fabian Merbeler, Emanuel Stoicescu
  • Patent number: 11888383
    Abstract: A method for controlling an electric load is described herein. In accordance with one embodiment the method includes collecting ambient energy using an energy harvesting circuit and using the collected ambient energy to charge a buffer capacitor. The method further includes alternatingly connecting and disconnecting an electrical load and the buffer capacitor, wherein a capacitor voltage provided by the buffer capacitor is applied to the electrical load in a discharging phase, in which the electrical load is connected to the buffer capacitor and the capacitor voltage decreases, and wherein the buffer capacitor is recharged in a charging phase, in which the electrical load is disconnected from the buffer capacitor in a charging phase in which the capacitor voltage again increases. The durations of the charging phase and the discharging phase are designed such that the capacitor voltage stays above a minimum supply voltage of the electrical load.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Qi Zhu, Doris Keitel-Schulz, Natasha Novik, Helmut Sochor
  • Patent number: 11889283
    Abstract: A system includes a first membrane, a second membrane and a third membrane spaced apart from one another, wherein the second membrane is between the first membrane and the third membrane, and the second membrane comprises a plurality of openings, a sealed low pressure chamber between the first membrane and the third membrane, and a plurality of electrodes in the sealed low pressure chamber.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Marc Fueldner, Andreas Wiesbauer, Athanasios Kollias
  • Patent number: 11885705
    Abstract: Pressure sensors include stacking of sensor capacitors on top of reference capacitors. A pressure cavity may be extended below a bottom electrode. The pressure sensors may include a mechanical link of a top membrane with the bottom electrode in order to form a dual membrane, or a mechanical link of the top membrane, the bottom electrode and an intermediate electrode within a cavity. A pressure sensor includes a first and second pressure sensing portions, each including a first and second rigid electrodes, and a deflectable membrane structure. The second rigid electrode is between the first rigid electrode and the deflectable membrane structure arranged in a vertical configuration. The first and second rigid electrodes of the first and second pressure sensing portions form respective reference capacitors, and the second rigid electrodes and the deflectable membrane structures form respective sensing capacitors.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Athanasios Kollias, Bernhard Winkler
  • Patent number: 11885736
    Abstract: A method is disclosed. In one example, the method includes bonding a first panel of a first material to a base panel in a first gas atmosphere, wherein multiple hermetically sealed first cavities encapsulating gas of the first gas atmosphere are formed between the first panel and the base panel. The method further includes bonding a second panel of a second material to at least one of the base panel and the first panel, wherein multiple second cavities are formed between the second panel and the at least one of the base panel and the first panel.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventor: Horst Theuss
  • Patent number: 11888024
    Abstract: A method of forming a semiconductor device includes forming a trench in a semiconductor body; at least partially filling the trench with a filling material; introducing dopants into a portion of the filling material; and applying a first thermal processing to the semiconductor body to spread the dopants in the filling material along a vertical direction of the filling material by a diffusion process. The vertical doping profile of the dopants within the doped filling material is shaped during the first thermal processing. Additionally, the dopants are substantially confined to within the trench and substantially do not diffuse from the doped filling material into the semiconductor body during the first thermal processing. A second thermal processing is applied to the semiconductor body after the first thermal processing to cause diffusion of the dopants from the doped filling material into the semiconductor body adjoining the trench.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Reinhard Ploss, Hans-Joachim Schulze
  • Patent number: 11887894
    Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Günter Denifl, Tobias Hoechbauer, Martin Huber, Wolfgang Lehnert, Roland Rupp, Hans-Joachim Schulze
  • Patent number: 11888423
    Abstract: A circuit for controlling a motor that includes control circuitry configured to generate, for a phase of the motor, a switching signal indicating to couple the phase to a first terminal of a supply for an entire portion of each switching cycle of a first plurality of switching cycles corresponding to a first range of electrical angles for the rotor and to couple the phase to a second terminal of the supply for a portion of each switching cycle of a second plurality of switching cycles corresponding to a second range of electrical angles for the rotor. The control circuitry is further configured to control the motor based on the switching signal.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Benjamin Jahn, Stanislav Gerber, Bastian Schindler, Michael Brückner
  • Patent number: 11888618
    Abstract: A master is provided which is connected to at least one slave via an interface, wherein the at least one master is designed, in a transmission mode to transfer a valid combination of output data and associated error detection data via the interface, and wherein the at least one master is furthermore designed, in a non-transmission mode, to output an invalid combination of output data and associated error detection data in case of an erroneous output request.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventor: Frank Hellwig
  • Patent number: 11886737
    Abstract: A memory device can include a plurality of memory cells for storing data, a memory interface configured to store and retrieve data at the plurality of memory cells, a logic unit comprising digital circuitry configured to perform mathematic and logic operations, and a control circuitry configured to control operation of the memory device.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventor: Prakash Balasubramanian
  • Patent number: 11889246
    Abstract: An electronic device includes: an interface configured to receive telemetry information for one or more power semiconductor devices; and a data acquisition and processing unit. The data acquisition and processing unit may be configured to periodically update an estimate of a remaining lifetime of the one or more power semiconductor devices, based on the telemetry information collected during use of the one or more power semiconductor devices and received at the interface. The data acquisition and processing unit may be configured to adjust one or more operating parameters for each of the one or more power semiconductor devices that has reached a predetermined level of degradation as determined by the telemetry information. An electronic system that includes the electronic device is also described.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Budde, Jens de Bock, Daniel Domes, Andreas Lenniger, Bjoern Rentemeister, Stefan Hubert Schmies, Andreas Vetter
  • Publication number: 20240030148
    Abstract: A semiconductor device and method is disclosed. In one example, the semiconductor device includes a single first row of leads and a first chip carrier comprising a first electrically insulating layer arranged on the single first row of leads. At least one first semiconductor chip is mounted on the first electrically insulating layer, wherein the at least one first semiconductor chip is arranged over only the single first row of leads.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 25, 2024
    Applicant: Infineon Technologies AG
    Inventors: Kok Kiat KOO, So Seetharam GOBALAKRISNAN, Jürgen SCHREDL, Julian TREU, Dexter Inciong REYNOSO
  • Patent number: 11881861
    Abstract: Some examples relate to a system including a pulse modulation (PM) circuit having a PM input and a PM output. The system also includes a load circuit having a load circuit input, and an I/O pad coupling the PM output to the load circuit input. An asymmetry detection circuit has a first asymmetry detection (AD) input coupled to the PM output via a first feedback path, a second AD input coupled to an output node of the I/O pad via a second feedback path, and an AD output coupled to the PM input of the pulse modulation circuit via a control path.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: January 23, 2024
    Assignee: Infineon Technologies AG
    Inventors: Sunanda Manjunath, Ketan Dewan, Juergen Schaefer
  • Patent number: 11881397
    Abstract: A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer. At least a portion of the auxiliary layer and at least a portion of the surface layer are converted into a porous structure. Subsequently, an epitaxial layer is formed on the first main surface.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: January 23, 2024
    Assignee: Infineon Technologies AG
    Inventors: Iris Moder, Bernhard Goller, Tobias Franz Wolfgang Hoechbauer, Roland Rupp, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • Patent number: 11879966
    Abstract: A semiconductor package having an antenna; and a semiconductor die which is coupled to the antenna and comprises a transmitter configured to transmit wirelessly via the antenna a wireless signal having information on a local oscillator signal to a further semiconductor package comprising a further semiconductor die.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: January 23, 2024
    Assignee: Infineon Technologies AG
    Inventors: Josef Boeck, Rudolf Lachner, Maciej Wojnowski, Walter Hartner
  • Patent number: 11881512
    Abstract: A method includes providing a silicon carbide substrate, wherein a gate trench extends from a main surface of the silicon carbide substrate into the silicon carbide substrate and wherein a gate dielectric is formed on at least one sidewall of the gate trench, and forming a gate electrode in the gate trench, the gate electrode including a metal structure and a semiconductor layer between the metal structure and the gate dielectric.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 23, 2024
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Thomas Aichinger, Romain Esteve, Ravi Keshav Joshi, Shiqin Niu
  • Patent number: 11879996
    Abstract: A light detection and ranging (LIDAR) sensor includes a first reflective surface configured to oscillate about a first rotation axis to deflect a light beam into an environment; and a second reflective surface configured to oscillate about a second rotation axis to guide light received from the environment onto a photodetector of the LIDAR sensor. The first rotation axis and the second rotation axis extend parallel to one another. The LIDAR sensor also includes a control circuit configured to drive the first reflective surface to oscillate with a first maximum deflection angle about the first rotation axis, and to drive the second reflective surface to oscillate with a second maximum deflection angle about the second rotation axis, the first maximum deflection angle being greater than the second maximum deflection angle, and an area of the first reflective surface is less than an area of the second reflective surface.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: January 23, 2024
    Assignee: Infineon Technologies AG
    Inventors: Thomas Thurner, David Brunner, Marcus Edward Hennecke, Georg Schitter, Han Woong Yoo
  • Patent number: 11879729
    Abstract: A measurement arrangement includes a first soft magnetic element, a second soft magnetic element, a magnetic element which is mechanically coupled to the first soft magnetic element and is configured to produce a magnetic field, and a sensor arrangement for capturing the magnetic field, which sensor arrangement is arranged in such a manner that a relative movement between the first soft magnetic element and the sensor arrangement results in a change in the magnetic field at the location of the sensor arrangement. The sensor arrangement is configured to determine the change. The sensor arrangement and the magnetic element are arranged between the first soft magnetic element and the second soft magnetic element.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: January 23, 2024
    Assignee: Infineon Technologies AG
    Inventor: Udo Ausserlechner