Patents Assigned to INFINEON
  • Patent number: 12366615
    Abstract: A current sensor includes a current rail and a magnetic field sensor. The magnetic field sensor is configured to measure a magnetic field induced by a current flowing through the current rail. A first insulation layer and a second insulation layer are arranged between the current rail and the magnetic field sensor. An interface between the first insulation layer and the second insulation layer is free of a contact with the current rail and/or is free of a contact with the magnetic field sensor. A portion of the current rail extends into the second insulation layer and the portion of the current rail is encapsulated by the second insulation layer.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: July 22, 2025
    Assignee: Infineon Technologies AG
    Inventors: Rainer Markus Schaller, Volker Strutz, Jochen Dangelmaier
  • Patent number: 12368383
    Abstract: An isolated DC/DC converter includes: a transformer having a primary side and a secondary side; an inverter configured to change a DC input voltage (Vin) to an AC current for energizing the primary side of the transformer; a capacitor in series with the primary side of the transformer; and a controller configured to operate the inverter in a first mode such that the capacitor pre-charges to |Vin| before the controller receives a turn ON command, the capacitor charges to X*|Vin| during a first part of a first switching cycle after the controller receives the turn ON command where X>1, and the capacitor voltage resonates with a magnetizing inductance of the primary side of the transformer during a second part of the first switching cycle. A power electronics device that includes the isolated DC/DC converter is also described.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: July 22, 2025
    Assignee: Infineon Technologies Austria AG
    Inventor: Derek Bernardon
  • Patent number: 12368421
    Abstract: A logarithmic amplifier includes programmable gain amplifiers each having a different gain, wherein an input of each of the programmable gain amplifiers is coupled to an input of the logarithmic amplifier; and a summing circuit having inputs coupled to a corresponding output of each of the programmable gain amplifiers and an output coupled to an output of the logarithmic amplifier, wherein the summing circuit generates a logarithmic transfer function having piecewise linear segments.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: July 22, 2025
    Assignee: Infineon Technologies AG
    Inventors: Jose Luis Ceballos, Fulvio CiCiotti, Dietmar Straeussnigg, Andreas Wiesbauer
  • Patent number: 12368413
    Abstract: A circuit for biasing a transistor is provided. The circuit includes an output terminal configured to be coupled to a gate terminal of the transistor and circuitry. In a first state, the circuitry is configured to output a control signal at a first voltage level for setting the transistor to a first transistor state. In a second state, the circuitry is configured to first output the control signal at a second voltage level different from the first voltage level following by changing the control signal from the second voltage level towards a third voltage level different from the first and second voltage level over time.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: July 22, 2025
    Assignee: Infineon Technologies AG
    Inventors: Herwig Wappis, Peter Singerl, Martin Mataln, Gerhard Maderbacher
  • Patent number: 12366616
    Abstract: The present disclosure relates to a magnetic field sensor, in particular an angle sensor, including a magnetoresistive sensor component and a spin-orbit torque, SOT, sensor component.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: July 22, 2025
    Assignee: Infineon Technologies AG
    Inventors: Milan Agrawal, Juergen Zimmer
  • Patent number: 12362648
    Abstract: An apparatus such as a power converter includes a first flying capacitor operative to store a first flying capacitor voltage; a second flying capacitor operative to store a second flying capacitor voltage; an inductor providing coupling between the first flying capacitor and the second flying capacitor; and a network of switches operative to, in accordance with control signals, produce an output voltage via the first flying capacitor voltage and the second flying capacitor voltage.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies Austria AG
    Inventors: Roberto Rizzolatti, Cheng-Wei Chen, Christian Rainer, Mario Ursino
  • Patent number: 12360205
    Abstract: A method includes generating a first radar signal in a transmission channel of a first radar chip based on an oscillator signal and emitting the first radar signal via a first antenna, wherein the first radar signal is modulated based on a synchronization signal used in the first radar chip, generating a second radar signal in a transmission channel of a second radar chip based on the oscillator signal and emitting the second radar signal via a second antenna, wherein the second radar signal is modulated based on a synchronization signal used in the second radar chip, receiving an RF sensor signal by means of a sensor circuit, wherein the RF sensor signal has a superposition of a portion of the power of the first radar signal and a portion of the power of the second radar signal, and determining a measurement signal that depends on the RF sensor signal.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies AG
    Inventors: Jonas Eric Sebastian Fritzin, Martin Dechant
  • Patent number: 12359994
    Abstract: In some implementations a semiconductor die comprises a semiconductor chip. The semiconductor chip comprises a piezoresistive pressure sensor element and at least one capacitive acceleration sensor element. The piezoresistive pressure sensor element is arranged to the side of the capacitive acceleration sensor element. In some implementations, a method for producing a semiconductor die includes applying an insulation layer to the semiconductor wafer. A section of the monocrystalline cover layer may be exposed by structuring the insulation layer. A semiconductor layer having a monocrystalline section and a polycrystalline section may be generated by deposition of a semiconductor material.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Steffen Bieselt, Dirk Meinhold
  • Patent number: 12363961
    Abstract: A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: July 15, 2025
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Carsten Schaeffer, Patrick Hanekamp, Oliver Humbel, Angelika Koprowski, Wolfgang Lehnert, Francisco Javier Santos Rodriguez
  • Patent number: 12360936
    Abstract: An interconnect connects a first device running a first application and with a first interface and a second device running a second application and with a second interface. The first device has a safety guard which may be used in an operations mode to send safety relevant data from the first application to the second application. Safety information is added to the safety relevant data to create safety marked data. The safety marked data is transmitted to the second application. The safety marked data is also looped back through interconnect to the safety guard which checks the loop back data using the safety information in the loop back data, and when the checking indicates an error, transmits an error notification signal to the first application and/or the second application.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies AG
    Inventor: Lin Li
  • Patent number: 12360232
    Abstract: An earphone device includes a housing comprising a top region and a bottom region, an acoustic transducer disposed in the bottom region of the housing, and a radar system disposed in the top region of the housing. The radar system includes a first side and an opposite second side. The radar system is configured to detect a first object located on the first side of the radar system, and detect biometric data from a second object located on the second side of the radar system.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies AG
    Inventors: Ashutosh Baheti, Reinhard-Wolfgang Jungmaier, Saverio Trotta, Avik Santra
  • Patent number: 12360363
    Abstract: A method of synchronizing a first oscillation about a first axis with a second oscillation about a second axis includes: generating a first position signal that indicates a position of the first oscillation about the first axis; generating a second position signal that indicates a position of the second oscillation about the first axis; determining a phase difference between the first and the second position signals; comparing the phase difference to a threshold value to generate a comparison result; generating a reference signal having a first frequency; synchronizing the first oscillation to the first frequency; and triggering a start of the reference signal responsive to the comparison result indicating that the phase difference is less than the threshold value.
    Type: Grant
    Filed: March 7, 2024
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies AG
    Inventors: Norbert Druml, Alberto Garcia Izquierdo
  • Publication number: 20250226297
    Abstract: A package and method is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, and an encapsulant at least partially encapsulating the electronic component and partially encapsulating the carrier. At least a portion of a bottom surface and at least a portion of a sidewall of the carrier are exposed beyond the encapsulant. Said at least portion of the bottom surface and said at least portion of the sidewall are covered at least partially by a plating structure.
    Type: Application
    Filed: December 26, 2024
    Publication date: July 10, 2025
    Applicant: Infineon Technologies AG
    Inventors: Kok Yau CHUA, Soon Lock GOH, Chee Hong LEE, Swee Kah LEE, Luay Kuan ONG, Norbert PIELMEIER
  • Patent number: 12356730
    Abstract: A semiconductor device includes a semiconductor body having an active region and a substrate region that is disposed beneath the active region, and a bidirectional switch formed in the semiconductor body. The bidirectional switch includes first and second gate structures that are each configured to control a conductive state of an electrically conductive channel that is disposed in the active region, and first and second input-output terminals that are each in ohmic contact with the electrically conductive channel. A passive substrate voltage discharge circuit in parallel with the bidirectional switch is configured to discharge a voltage of the substrate region in both directions of the bidirectional switch. The passive substrate voltage discharge circuit includes first and second normally-on switches connected in anti-series between the first and second input-output terminals in a common source configuration with the substrate region as a midpoint.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies Austria AG
    Inventor: Kennith Kin Leong
  • Patent number: 12352777
    Abstract: A control circuit for a wheel speed sensor is provide. The control circuit includes an input interface configured to receive high-resolution wheel speed data and low-resolution wheel speed data; and circuitry configured to determine information on a functional state of the wheel speed sensor using the high-resolution data and the low-resolution data. The circuitry is configured to detect a failure state of the wheel speed sensor if a number of signal events which are signaled by the high-resolution wheel speed data between a first signal event and a second signal event deviates from an expected number. The first signal event and the second signal event are signaled by the low-resolution wheel speed data.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies AG
    Inventors: Simone Fontanesi, Filippo Grillotti, Alessandro Petri, Massimiliano Zilli
  • Patent number: 12352801
    Abstract: Wafer testing of a power transistor for a current property of the power transistor. Wafer testing of a power transistor is performed by using a sense transistor constructed using the same epitaxial stack as was used to construct the power transistor. The current property of the sense transistor is then measured, and the current property of the power transistor can be determined from that measurement. Furthermore, the sense transistor is pre-conditioned prior to the measurement by alternately turning on and off the sense transistor multiple cycles while allowing a source terminal of the power transistor to float. This simulates operating conditions of the power transistor, thereby allowing for measurement of the current property of the power transistor as it would likely be in operation.
    Type: Grant
    Filed: July 10, 2023
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies Canada Inc.
    Inventors: Iman Abdali Mashhadi, Thomas William MacElwee, Mohammad Bozorgi, Ting-Hsiang Hsu, Meng-ta You, Regina Inyangat Akudo, Yueh Lin Chiang
  • Patent number: 12352831
    Abstract: A current sensor arrangement includes a first conductor structure extending in a first direction and configured to carry a first current along the first direction; a second conductor structure extending in a second direction perpendicular to the first direction and configured to carry a second current along the second direction; and a magnetic field sensor arranged between the first conductor structure and the second conductor structure and configured to receive a first magnetic field produced by the first current and a second magnetic field produced by the second current. The first conductor structure and the second conductor structure overlap with the magnetic field sensor in a third direction that is perpendicular to the first and second directions. The magnetic field sensor includes a first sensor element sensitive to the first magnetic field and a second sensor element sensitive to the second magnetic field.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies AG
    Inventors: Stephan Leisenheimer, Richard Heinz
  • Patent number: 12356653
    Abstract: A method includes providing a semiconductor body including a plurality of two-dimensional charge carrier gas channels, forming a gate fin by forming a pair of gate trenches in an upper surface of the semiconductor body, the pair of gate trenches exposing each one of two-dimensional charge carrier gas channels, providing source and drain contacts that are electrically connected to each one of the plurality of two-dimensional charge carrier gas channels, providing a gate structure that is configured to control a conductive connection between the source and drain contacts, wherein providing the gate structure includes forming a layer of doped type III-nitride semiconductor material that covers the gate fin and extends into the gate trenches, and forming a conductive gate electrode on top of the layer of doped type III-nitride semiconductor material.
    Type: Grant
    Filed: February 16, 2024
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Detzel, Gerhard Prechtl, Oliver Haeberlen
  • Patent number: 12355274
    Abstract: A device includes a first electronic component and a case, wherein the case includes a first charging compartment configured to accommodate and charge the first electronic component. The device further includes a first magnet included in the first electronic component and a 3D magnetic field sensor included in the case. The device further includes a detection unit configured to detect a position of the first electronic component relative to the first charging compartment based on a magnetic field sensed by the 3D magnetic field sensor.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies AG
    Inventors: Lifeng Guan, Wai Keung Frankie Chan
  • Patent number: RE50485
    Abstract: A semiconductor module includes a semiconductor die, a mold compound encasing the semiconductor die, a plurality of terminals electrically connected to the semiconductor die and protruding out of the mold compound, wherein a first one of the terminals has a constricted region covered by the mold compound, wherein the mold compound has a recess or an opening near the constricted region of the first terminal, and a coreless magnetic field sensor disposed in the recess or the opening of the mold compound and isolated from the first terminal by the mold compound. The coreless magnetic sensor is configured to generate a signal in response to a magnetic field produced by current flowing in the constricted region of the first terminal. The magnitude of the signal is proportional to the amount of current flowing in the constricted region of the first terminal. A method of manufacturing the module also is described.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: July 8, 2025
    Assignee: Infineon Technologies AG
    Inventors: Juergen Hoegerl, Leo Aichriedler, Christian Schweikert, Gerald Wriessnegger