Patents Assigned to INSTITUTE
  • Patent number: 9601566
    Abstract: A method for manufacturing a fin structure. The method includes: forming a first semiconductor layer and a second semiconductor layer sequentially on a substrate; patterning the second and first semiconductor layers to form an initial fin; selectively etching the first semiconductor layer of the initial fin so that the first semiconductor layer has a lateral recess; forming an isolation layer having a portion that fills the lateral recess, wherein the isolation layer, except the portion that fills the lateral recess, has a top surface lower than a top surface of the first semiconductor layer but higher than a bottom surface of the first semiconductor layer, and thus defines a fin above the isolation layer; and forming a gate stack intersecting the fin on the isolation layer.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: March 21, 2017
    Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventor: Huilong Zhu
  • Patent number: 9598670
    Abstract: We used ACCUTASE®, a commercially available cell detachment solution, for single cell propagation of pluripotent hESCs. Unlike trypsin dissociation, ACCUTASE® treatment does not significantly affect the plating efficiency of hESC dissociation into single cells. Cultures dissociated with ACCUTASE® to single cells at each passage maintain a higher proportion of pluripotent cells as compared to collagenase-passaged hESCs. ACCUTASE®-treated hESCs can be grown to a high density as monolayers, and yet retain their pluripotency.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: March 21, 2017
    Assignee: BURNHAM INSTITUTE FOR MEDICAL RESEARCH
    Inventors: Alexey Terskikh, Ruchi Bajpai
  • Patent number: 9602131
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 9601340
    Abstract: Provided are electronic devices having quantum dots and methods of manufacturing the same. An electronic device includes a first nanorod, a quantum dot disposed on an upper surface of the first nanorod, and a second nanorod that covers a lateral surface of the first nanorod and the quantum dot. The first nanorod and the second nanorod are of opposite types.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 21, 2017
    Assignees: SAMSUNG ELECTRONICS CO., LTD., KOREA PHOTONICS TECHNOLOGY INSTITUTE
    Inventors: Jaesoong Lee, Hyoin Kim
  • Patent number: 9597370
    Abstract: The present disclosure relates to a method of applying a pharmaceutical composition for promoting hair growth. The pharmaceutical composition includes a hair growth peptide (HGP) which includes all or part of the amino acid sequence SEQ ID No: 1. The method includes administering a hair growth peptide (HGP) which includes all or part of the amino acid sequence SEQ ID No: 1 to a party of interest.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: March 21, 2017
    Assignees: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Shan Chang Chueh, Ching Huai Ko, Nien Tzu Chou, Cheng Ming Chuong, Chih Chiang Chen
  • Patent number: 9602135
    Abstract: A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 9597020
    Abstract: The inventive concept relates to a measuring device. The measuring device irradiates a first beam including a polarization component and a second beam which is a wavelength swept laser having a coherence length previously set and can measure a glucose concentration of an aqueous humor by measuring an optical path length and the rotation amount of a polarization plane respectively from a first output beam and a second output beam being output from an eye.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Hyun Woo Song
  • Patent number: 9603287
    Abstract: An integrated power module is provided, which may include a gate driver circuit, a plurality of first metal plates, a plurality of chips, a plurality of second metal plates, and an annular frame. The first metal plates may be parallel to each other/one another, and electrically coupled to the gate driver circuit; at least one of the first metal plates may include a plurality of chip slots. The chips may be disposed at the chip slots; each of the chips may be electrically coupled to one of the adjacent first metal plates. The second metal plates may be parallel to each other/one another, and electrically coupled to the gate driver circuit; each of the second metal plates may be disposed between any two adjacent first metal plates. The first metal plates, the second metal plates, the gate driver circuit, and the chips may be disposed inside the annular frame.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: March 21, 2017
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shih-Hsiang Chien, Chin-Hone Lin, Ching-Jin Tyan, Bo-Tseng Sung
  • Patent number: 9597415
    Abstract: Provided herein are methods for expressing a polynucleotide of interest in the retina of a subject. In particular, a method for expressing a polynucleotide of interest in the retina of a subject comprising the step consisting of injecting into the vitreous an amount of a vector containing the polynucleotide of interest in combination with an amount of an inhibitor of Dp71 expression is provided.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: March 21, 2017
    Assignees: INSERM (INSTITUTE NATIONAL DE LA SANTE ET DE LA RECHERCHE MEDICALE), UNIVERSITE PIERRE ET MARIE CURIE (PARIS 6), CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)
    Inventors: Deniz Dalkara, Alvaro Rendon Fuentes, Jose Alain Sahel, Ophelie Vacca
  • Patent number: 9599584
    Abstract: Provided are methods, systems and devices for thermodynamically evaluating electrochemical systems and components thereof, including electrochemical cells such as batteries. The present systems and methods are capable of monitoring selected electrochemical cell conditions, such as temperature, open circuit voltage and/or composition, and carrying out measurements of a number of cell parameters, including open circuit voltage, time and temperature, with accuracies large enough to allow for precise determination of thermodynamic state functions and materials properties relating to the composition, phase, states of charge, health and safety and electrochemical properties of electrodes and electrolytes in an electrochemical cell. Thermodynamic measurement systems of the present invention are highly versatile and provide information for predicting a wide range of performance attributes for virtually any electrochemical system having an electrode pair.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: March 21, 2017
    Assignees: CALIFORNIA INSTITUTE OF TECHNOLOGY, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S.), NANYANG TECHNOLOGICAL UNIVERSITY
    Inventors: Rachid Yazami, Cher Ming Tan
  • Patent number: 9601337
    Abstract: A manufacturing method of a graphene modulated high-k oxide and metal gate Ge-based MOS device, which comprises the following steps: 1) introducing a graphene thin film on a Ge-based substrate; 2) conducting fluorination treatment to the graphene thin film to form fluorinated graphene; 3) activating the surface of the fluorinated graphene by adopting ozone plasmas, and then forming a high-k gate dielectric on the surface of the fluorinated graphene through an atomic layer deposition technology; and 4) forming a metal electrode on the surface of the high-k gate dielectric. Since the present invention utilizes the graphene as a passivation layer to inhibit the formation of unstable oxide GeOx on the surface of the Ge-based substrate and to stop mutual diffusion between the gate dielectric and the Ge-based substrate, the interface property between Ge and the high-k gate dielectric layer is improved.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: March 21, 2017
    Assignee: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCES
    Inventors: Zengfeng Di, Xiaohu Zheng, Gang Wang, Miao Zhang, Xi Wang
  • Patent number: 9602572
    Abstract: A method of implementing calls includes identifying a call scheduled for a time in the future from an electronic calendar associated with a user and prior to the call, ordering a plurality of codecs used by an Internet Protocol (IP) phone of the user for the scheduled call. The method further includes, during the call and using a processor, calculating a mean opinion score for the call and storing the mean opinion score as part of call data for the call within a data storage device comprising historical call data.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: March 21, 2017
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, WATERFORD INSTITUTE OF TECHNOLOGY
    Inventors: Jonathan Dunne, Paul B. French, James P. Galvin, Jr., Mohamed Adel Mahmoud, Patrick J. O'Sullivan
  • Patent number: 9602136
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 9598705
    Abstract: The present invention provides Thermococcus onnurineus MC02 strain (accession no. KCTC12511BP) having increased hydrogen production ability, wherein the expression of rchA gene of the strain increases. Also, the present invention provides a method for producing the strain belonged to the genus Thermococcus having increased hydrogen production ability comprising, increasing the expression of rchA gene of the strain, and hydrogen production method using the strain.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: March 21, 2017
    Assignee: KOREA INSTITUTE OF OCEAN SCIENCE & TECHNOLOGY
    Inventors: Sung Gyun Kang, Jung Hyun Lee, Hyun Sook Lee, Kae Kyoung Kwon, Tae Wan Kim, Yun Jae Kim, Min Sik Kim, Seong Hyuk Lee, Seung Seob Bae, Ae Ran Choi
  • Patent number: 9602139
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Bo-Mi Lim, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 9602243
    Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Heung-Mook Kim, Sun-Hyoung Kwon, Nam-Ho Hur
  • Patent number: 9603254
    Abstract: A wafer via solder filling device includes a solder bath comprising an accommodation space for accommodating a molten solder, with an open top, and an air outlet for exhausting air from the accommodation space; a fixing unit for fixing the wafer having a via formed in one surface in the accommodation space to seal the accommodation space airtight; and a pressing unit for pressing a bottom of the molten solder arranged in the solder bath and moving the molten solder upward, to fill the molten solder in the via.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: March 21, 2017
    Assignee: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY
    Inventors: Sehoon Yoo, Chang Woo Lee, Jun Ki Kim, Jeong Han Kim, Young Ki Ko
  • Patent number: 9602138
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 9599699
    Abstract: An RSSI positioning method based on frequency-hopping spread spectrum technology, comprising: calibration stage: measuring the RSSI values of a plurality of channels at fixed points, and recording and calculating the ranging parameters in an RSSI ranging model; system preparation: deploying a positioning anchor node, and realizing synchronization between a target node and the anchor node; conducting communication on the target node by respectively utilizing a plurality of channels to obtain the RSSI values; signal processing stage: processing the RSSI into signal strength amplitude and performing optimization; and positioning stage: calculating a distance and the target node position on a positioning server according to each of the signal strength.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 21, 2017
    Assignee: SHENYANG INSTITUTE OF AUTOMATION OF THE CHINESE ACADEMY OF SCIENCES
    Inventors: Peng Zeng, Jinchao Xiao, Jie He, Haibin Yu
  • Patent number: 9601112
    Abstract: An embodiment of the present invention relates to a speech recognition system and method using incremental device-based acoustic model adaptation. The speech recognition system comprises a model selection module selecting an acoustic model of multi-model tree by verifying and categorizing a device key transmitted from a user device; a model management module generating and incrementally adapting multi-model tree by categorizing voice data based on a user device; and a speech recognition module performing speech recognition by receiving the acoustic model selected from the model selection module and transmitting data of which reliability exceeds a predetermined threshold value to the model management module.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: March 21, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Dong-Hyun Kim