Patents Assigned to Intel Corporation
  • Data stored or free space based FIFO buffer
    Patent number: 12271319
    Abstract: Systems, methods, and computer-readable media are provided for variable precision first in, first out (FIFO) buffers (VPFB) that dynamically changes the amount of data to be stored in the VPFB based on a current amount of data stored in the VPFB and/or based on a current amount of available memory space of the VPFB. The currently unavailable memory space (or the current available memory space) is used to select the size of a next data block to be stored in the VPFB. Other embodiments are disclosed and/or claimed.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Yanjie Pan, Yong Jiang, Yuanyuan Li, Yong Zhang
  • Apparatus and method for protecting probe card and probes using thermal heat sensor trace
    Patent number: 12270831
    Abstract: An apparatus includes a thermal heat sensor trace including conductive metal and disposed in a space transformer, the thermal heat sensor trace being configured to form a resistance, and a controller configured to sense a voltage across the resistance formed by the thermal heat sensor trace, the voltage positively correlating to a temperature of the space transformer. The controller is further configured to determine whether the sensed voltage is greater than or equal to a predetermined threshold voltage, and based on the sensed voltage being determined to be greater than or equal to the predetermined threshold voltage, output an alert signal for reducing and/or warning of the temperature of the space transformer.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventor: Arthur Isakharov
  • Coreless electronic substrates having embedded inductors
    Patent number: 12272484
    Abstract: An inductor can be formed in a coreless electronic substrate from magnetic materials and/or fabrication processes that do not result in the magnetic materials leaching into plating and/or etching solutions/chemistries, and results in a unique inductor structure. This may be achieved by forming the inductors from magnetic ferrites. The formation of the electronic substrates may also include process sequences that prevent exposure of the magnetic ferrites to the plating and/or etching solutions/chemistries.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Srinivas Pietambaram, Pooya Tadayon, Kristof Darmawikarta, Tarek Ibrahim, Prithwish Chatterjee
  • Restricted area autonomous vehicle control techniques
    Patent number: 12271198
    Abstract: Various systems and methods for providing autonomous driving within a restricted area are discussed. In an examples, an autonomous vehicle control system can include an interface for receiving data from multiple sensors for detecting an environment about the vehicle, a security processor coupled to the configured to receive sensor information from the sensor interface, and autonomous driving system including one or more virtual machines configured to selectively receive information from the security processor based on a security request from infrastructure of the restricted area.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Ralf Graefe, Michael Paulitsch
  • Advanced link power management for displayport
    Patent number: 12271249
    Abstract: An apparatus comprising circuitry to buffer video data; and a DisplayPort Transmitter to communicate the video data to a DisplayPort Receiver via a virtual channel through at least one intermediate device between the DisplayPort Transmitter and the DisplayPort Receiver, wherein the virtual channel comprises a unidirectional Main-Link and a bidirectional auxiliary channel (AUX_CH); and communicate a power down signal over the Main-Link to the at least one intermediate device and the DisplayPort Receiver in conjunction with turning off the Main-Link to place the at least one intermediate device and the DisplayPort Receiver in respective low power states.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Nausheen Ansari, Ziv Kabiry, Gal Yedidia
  • Light detection and ranging systems and optical system
    Patent number: 12270941
    Abstract: A light detection and ranging system is provided using a first electromagnetic radiation of a first emitting structure as local oscillator signal for a second electromagnetic radiation received from the outside of the light detection and ranging system, wherein the first and second electromagnetic radiations are coherent and the resulting signal is detected by a detecting structure. The resulting signal corresponds to an information of a target at the outside of the light detection and ranging system.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventor: George Rakuljic
  • Multi-link operation for a single radio multi-link device
    Patent number: 12273964
    Abstract: This disclosure describes systems, methods, and devices related to multi-link operation. A device may configure a single N×N transmit (TX)/receive (RX) radio to a plurality of 1×1 TX/RX radios, where N is a positive integer. The device may monitor a first channel of a plurality of channels to determine its availability. The device may monitor a second channel of the plurality of channels to determine its availability. The device may identify a first control frame received from an access point (AP) multi-link device (MLD) on the second channel. The device may cause to send a second control frame to the AP MLD on the second channel. The device may configure back to a single N×N TX/RX radio to receive a data frame.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Minyoung Park, Po-Kai Huang, Thomas J. Kenney, Daniel Bravo, Ehud Reshef, Laurent Cariou, Dibakar Das, Dmitry Akhmetov
  • Duty cycle adjuster optimization training algorithm to minimize the jitter associated with DDR5 DRAM transmitter
    Patent number: 12272426
    Abstract: Methods and apparatus for duty cycle adjuster optimization training algorithms to minimize jitter associated with DDR5 DRAM transmitters. Basic and Advanced Duty Cycle Adjuster (DCA) training algorithms are implemented to reduce duty cycle error and hence reduce phase mismatch translated jitter in the transmitter DQS signals. In accordance with aspects of the Basic DCA training algorithm, duty cycles for QCLK, IBQCLK, and QBCLK are adjusted by a memory controller that utilizes a DCA function implemented on a memory module (e.g., DDR5 SDRAM DIMM) to obtain a first set of optimized DCA code settings. The first set of optimized DCA code settings are then used as initial settings for the Advance DCA training algorithm to further optimize the DCA code settings for QCLK, IBQCLK, and QBCLK. A similar technical may be employed to reduce duty cycle error and jitter for DQ signals.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Arvind Kumar, Dean-Dexter R. Eugenio, Santhosh Muskula
  • Controller for locking of selected cache regions
    Patent number: 12271308
    Abstract: Examples provide an application program interface or manner of negotiating locking or pinning or unlocking or unpinning of a cache region by which an application, software, or hardware. A cache region can be part of a level-1, level-2, lower or last level cache (LLC), or translation lookaside buffer (TLB) are locked (e.g., pinned) or unlocked (e.g., unpinned). A cache lock controller can respond to a request to lock or unlock a region of cache or TLB by indicating that the request is successful or not successful. If a request is not successful, the controller can provide feedback indicating one or more aspects of the request that are not permitted. The application, software, or hardware can submit another request, a modified request, based on the feedback to attempt to lock a portion of the cache or TLB.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Andrew J. Herdrich, Priya Autee, Abhishek Khade, Patrick Lu, Edwin Verplanke, Vivekananthan Sanjeepan
  • Independently controlled DMA and CPU access to a shared memory region
    Patent number: 12271616
    Abstract: An embodiment of an integrated circuit comprises circuitry to share page tables associated with a page between a processor memory management unit (MMU) and an input/output memory management unit (IOMMU), store a page table entry in the memory associated with the page, and separately control access to the page from a processor and from a direct memory access (DMA) request based on one or more fields of the stored page table entry. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Utkarsh Y. Kakaiya, David Koufaty, Rajesh Sankaran, Vedvyas Shanbhogue
  • Network flow-based hardware allocation
    Patent number: 12273274
    Abstract: System and techniques for network flow-based hardware allocation are described herein. A workload for is obtained for execution. Here, the workload includes a flow that has a processing component and a network component. Then, during execution of the workload, the flow is repeatedly profiled and assigned a network service and a processing service during a next execution based on a network metric and a processing metric obtained from the profiling.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Akhilesh Thyagaturu, Hassnaa Moustafa, Lavanya Gubbala
  • Cluster identifier remapping for asymmetric topologies
    Patent number: 12271760
    Abstract: A first plurality of integrated circuit blocks of a first chip are connected to a second plurality of integrated circuit blocks of a second chip. A cluster remapping table is provided on the second chip and is to be programmed to identify a desired asymmetric topology of the connections between the first plurality of integrated circuit blocks and the second plurality of integrated circuit blocks. Logic is to discover the actual topology of the connections between the first plurality of integrated circuit blocks and the second plurality of integrated circuit blocks and determine whether the actual topology matches the desired topology as described in the cluster remapping table.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Vinit Mathew Abraham, Anand K. Enamandram, Eswaramoorthi Nallusamy
  • Privacy-preserving augmented and virtual reality using homomorphic encryption
    Patent number: 12273327
    Abstract: An improved AR/VR operation includes receiving, by a server computing device, encrypted AR/VR user data and cleartext metadata associated with the encrypted AR/VR user data from a client computing device; getting server data based at least in part on cleartext metadata; encoding the server data; performing an AR/VR process on the encrypted AR/VR user data and the encoded server data to generate encrypted AR/VR results; and sending the encrypted AR/VR results to the client computing device.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Kylan Race, Ernesto Zamora Ramos, Jeremy Bottleson, Bradley Smith
  • System management mode runtime resiliency manager
    Patent number: 12271325
    Abstract: A system management mode (SMM) runtime resiliency manager (SRM) augments computing resource protection policies provided by an SMM policy shim. The SMM shim protects system resources by deprivileging system management interrupt (SMI) handlers to a lower level of privilege (e.g., ring 3 privilege) and by configuring page tables and register bitmaps (e.g., I/O, MSR, and Save State register bitmaps). SRM capabilities include protecting the SMM shim, updating the SMM shim, protecting a computing system during SMM shim update, detecting SMM attacks, and recovering attacked or faulty SMM components.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Jiewen Yao, Vincent Zimmer
  • Processing circuitry, processing means, methods and computer programs for beamforming management mode selection based on path loss
    Patent number: 12273740
    Abstract: Examples relate to processing circuitry, processing means, methods and computer programs for a base station and a user equipment. The processing circuitry for the base station is configured to select one of a first uplink beamforming management mode and a second uplink beamforming mode for a beamformed uplink communication between a user equipment and the base station. The selection is based on a path loss on a first wireless channel between the base station and the user equipment and based on a path loss on a second wireless channel between the user equipment and the base station. The processing circuitry is configured to provide an instruction related to the selection of the first or second uplink beamforming management mode to the user equipment.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventor: Zhibin Yu
  • Multi-port memory link expander to share data among hosts
    Patent number: 12271329
    Abstract: Systems, apparatuses and methods may provide for technology that collects, by a BIOS (basic input output system), memory information from a first host path to a coherent device memory on a memory expander, wherein the memory expander includes a plurality of host paths, transfers the memory information from the BIOS to an OS (operating system) via one or more OS interface tables, and initializes, by the OS, the memory expander based on the memory information, wherein the memory information includes memory capabilities and configuration settings associated with the memory expander.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Zhuangzhi Li, Jie Bai, Di Zhang, Changcheng Liu, Zhonghua Sun
  • Musim UE connection release, paging restriction and rejection
    Patent number: 12273856
    Abstract: An apparatus and system for a multiple universal subscriber identity module (MUSIM) user equipment (UE) are described. Due to activity on another USIM, the MUSIM UE transmits a service request message to release an N1 non-access stratum (NAS) signaling connection or reject a paging request received from the network, dependent on whether the MUSIM UE is in a 5th generation (5G) Mobility Management (5GMM)-CONNECTED mode or a 5GMM-IDLE mode. The service request message may contain a paging restriction that restrict paging to: all paging, all paging except for paging for voice service, all paging except for packet data unit (PDU) session(s), and all paging except for voice service and PDU session(s).
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventor: Thomas Luetzenkirchen
  • Methods and apparatus to calibrate and/or validate stereoscopic depth sensing systems
    Patent number: 12273500
    Abstract: Methods and apparatus to calibrate and/or validate stereoscopic depth sensing systems are disclosed. An example apparatus includes an image generator to generate a first image for a first image sensor; and generate a second image for a second image sensor. First content in the first image is to be shifted relative to corresponding second content in the second image by a shift amount. The shift amount based on a target depth to be tested. The example apparatus further includes a calibration controller to cause the first and second images to be presented on the display screen; and calibrate the first and second image sensors based on a difference between the target depth and a measured depth. The measured depth based on an analysis of the first and second images as captured by the first and second image sensors when the first and second images are presented on the display screen.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Yuval P. Shapira, Shir Paluch-Siegler
  • Apparatus and method for coexistence between Wi-Fi communication and Bluetooth communication
    Patent number: 12273732
    Abstract: Provided herein are apparatus and methods for coexistence between Wi-Fi communication and Bluetooth communication. An apparatus for a UE includes: a Wi-Fi module to perform Wi-Fi communication; a Bluetooth module to perform Bluetooth communication; and interface circuitry coupled with both of the Wi-Fi module and the Bluetooth module; wherein the Wi-Fi module is to: obtain event schedule information from the Bluetooth module via the interface circuitry, wherein the event schedule information is to indicate information about a schedule of the Bluetooth communication; and puncture, based on the event schedule information, a secondary channel for the Wi-Fi communication to reserve a sub-channel for the Bluetooth communication. Other embodiments may also be disclosed and claimed.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: April 8, 2025
    Assignee: INTEL CORPORATION
    Inventors: Chittabrata Ghosh, Harish Balasubramaniam, Carlos Cordeiro
  • Topology shader technology
    Patent number: 12271991
    Abstract: Systems, apparatuses and methods may provide for technology that receives, at a topology shader in a graphics pipeline, an object description and generates, at the topology shader, a set of polygons based on the object description. Additionally, the set of polygons may be sent to a vertex shader.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: April 8, 2025
    Assignee: Intel Corporation
    Inventors: Hugues Labbe, Tomer Bar-On, Gabor Liktor, Andrew T. Lauritzen, John G. Gierach