Patents Assigned to Intersil
-
Publication number: 20070273348Abstract: A voltage regulator which includes a network for improved compensation for reference voltage changes includes an IC including an error amplifier and a pulse width modulator (PWM), wherein an input of the PWM is coupled to an output of the error amplifier. A low pass filter comprising an inductor is in series with a grounded capacitor coupled to an output of the PWM, wherein an output of the regulator (Vout) is at a node between the inductor and the capacitor. A first feedback network is disposed between Vout and an inverting input of the error amplifier and a second feedback network is disposed between an output of the error amplifier and the inverting input of the error amplifier. A current cancellation network is coupled to the inverting input of the error amplifier.Type: ApplicationFiled: September 27, 2006Publication date: November 29, 2007Applicant: INTERSIL AMERICAS INC.Inventor: Robert H. Isham
-
Publication number: 20070274015Abstract: A DC-DC converter includes a chip including an error amplifier and a pulse width modulator (PWM) having an input connected to an output of the error amplifier, and an inductor driven by said PWM in series with an output node (VOUT) of the converter, wherein a load current flows through the inductor. VOUT is fed back through a network including a feedback resistor (RFB) to an inverting input of the error amplifier. A circuit for sensing the load current includes a first operational amplifier, a sense resistor on the chip having resistance RSENSE coupled to an inverting input of the first amplifier; wherein a sense current related to the load current flows through the sense resistor, a dependent current source provides an output current to supply the sense current. A reference resistor is disposed on the chip having a resistance RREFERENCE which is a fixed multiple of RSENSE. A set resistor is provided having a resistance RSET.Type: ApplicationFiled: September 27, 2006Publication date: November 29, 2007Applicant: INTERSIL AMERICAS INC.Inventor: Robert H. Isham
-
Patent number: 7301317Abstract: A regulator with output current sharing including an output node and multiple converters. Each converter includes a PWM controller and switch circuit, an inductor, and an RC circuit. Each PWM controller and switch circuit receives a corresponding rail voltage and has a phase node and a regulation feedback input. Each inductor has a first end coupled to the output node and a second end coupled to a corresponding phase node. The RC circuit is coupled across the inductor and has an intermediate phase sense node coupled to a corresponding regulation feedback input. Each RC circuit may include an RC filter coupled across an inductor with an intermediate node and a feedback circuit coupled between the intermediate node and a regulation feedback input. The RC circuits may be configured to program a relative power distribution between the rail voltages to the shared output.Type: GrantFiled: December 18, 2003Date of Patent: November 27, 2007Assignee: Intersil Americas Inc.Inventor: Douglas M. Mattingly
-
Publication number: 20070247915Abstract: A multiple time programmable (MTP) memory cell, in accordance with an embodiment, includes a floating gate PMOS transistor, a high voltage NMOS transistor, and an n-well capacitor. The floating gate PMOS transistor includes a source that forms a first terminal of the memory cell, a drain and a gate. The high voltage NMOS transistor includes a source connected to ground, an extended drain connected to the drain of the PMOS transistor, and a gate forming a second terminal of the memory cell. The n-well capacitor includes a first terminal connected to the gate of the PMOS transistor, and a second terminal forming a third terminal of the memory cell. The floating gate PMOS transistor can store a logic state. Combinations of voltages can be applied to the first, second and third terminals of the memory cell to program, inhibit program, read and erase the logic state.Type: ApplicationFiled: August 2, 2006Publication date: October 25, 2007Applicant: Intersil Americas Inc.Inventors: Alexander Kalnitsky, Michael Church
-
Patent number: 7285469Abstract: In accordance with the invention, there are various methods of making an integrated circuit comprising a bipolar transistor. According to an embodiment of the invention, the bipolar transistor can comprise a substrate, a collector comprising a plurality of alternating doped regions, wherein the plurality of alternating doped regions alternate in a lateral direction from a net first conductivity to a net second conductivity, and a collector contact in electrical contact with the collector. The bipolar transistor can also comprise a heavily doped buried layer below the collector, a base in electrical contact with a base contact, wherein the base is doped to a net second conductivity type and wherein the base spans a portion of the plurality of alternating doped regions, and an emitter disposed within the base, the emitter doped to a net first conductivity, wherein a portion of the alternating doped region under the emitter is doped to a concentration of less than about 3×1012 cm?2.Type: GrantFiled: September 2, 2005Date of Patent: October 23, 2007Assignee: Intersil AmericasInventor: James Douglas Beasom
-
Patent number: 7285475Abstract: Integrated circuits, semiconductor devices and methods for making the same are described. Each embodiment shows a diffused, doped backside layer in a device wafer that is oxide bonded to a handle wafer. The diffused layer may originate in the device handle, in the handle wafer, in the bond oxide or in an additional semiconductor layer of polysilicon or epitaxial silicon. The methods use a thermal bond oxide or a combination of a thermal and deposited oxide.Type: GrantFiled: September 15, 2005Date of Patent: October 23, 2007Assignee: Intersil Americas Inc.Inventors: Joseph A. Czagas, Dustin A. Woodbury, James D. Beasom
-
Publication number: 20070241793Abstract: Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures and the claims.Type: ApplicationFiled: June 20, 2007Publication date: October 18, 2007Applicant: INTERSIL AMERICAS INC.Inventor: Jeffrey Lehto
-
Patent number: 7282897Abstract: A multiphase sliding-mode switching power supply (24) and a method of operating the power supply (24) are provided. A switch (30) for each phase (28) is coupled to a bipolar power source (22), with each switch (30) effecting one phase (28). An inductance (32) is coupled to each switch (30), and a capacitance (36) is coupled to the inductances (32). A load (26) is coupled across the capacitance (36). A sliding-surface generator (78) is coupled to the monitor circuit (38) and generates a single sliding surface (?) for all phases (28). A translation circuit (102) is coupled to the sliding-surface generator (78) and configured to translate the sliding surface (?) into a stream of switching pulses (86). A transient control (52) is coupled to the translation circuit (102) and configured to adjust said stream of switching pulses upon detection of an out-of-range transient.Type: GrantFiled: October 7, 2004Date of Patent: October 16, 2007Assignee: Intersil Americas, Inc.Inventors: Zaki Moussaoui, Thomas Victorin
-
Patent number: 7282896Abstract: A current-sharing multiphase sliding-mode switching power supply (24) and method of operation are presented. A bipolar power source (22) is coupled to a switch (30) for each phase (28), each switch (30) is in turn coupled to an inductance (32), and a capacitance (36) is coupled to the inductances (32) and across a load (26). A sliding-surface generator (78) generates a sliding surface (?). A current-balance control (80) computes a reference current as a summary statistic (IX) of inductive currents (IL) through the inductances (32), calculates an error current (IE) for each phase (28) as a difference between the summary statistic (IX) and the inductive current (IL), and adjusts the sliding surface (?) for each phase (28) so that all inductive currents (IL) are substantially equal to the summary statistic (IX). A switching circuit (138) switches the switches (30) in response to the sliding surface (?).Type: GrantFiled: October 7, 2004Date of Patent: October 16, 2007Assignee: Intersil Americas, Inc.Inventors: Zaki Moussaoui, Brian L. Allen, Larry G. Pearce
-
Patent number: 7269217Abstract: A pulse-width modulation (PWM) controller to supply power to electronic components using a phase lock loop (PLL) is presented. A PWM controller comprises an input node operable to receive a reference signal and a phase-locked loop (PLL). The PLL comprises an oscillator operable to receive an error-correction signal and to generate an oscillator signal having a frequency that is related to the error-correction signal, a phase-frequency detector (PFD) coupled to the oscillator and operable to receive the reference signal and to generate the error-correction signal based upon a phase difference between the reference signal and a feedback signal, and a suppression circuit coupled to the PFD and operable to periodically enable the PFD to generate the error-correction signal.Type: GrantFiled: October 4, 2002Date of Patent: September 11, 2007Assignee: Intersil Americas Inc.Inventors: James William Leith, Mark Dickmann
-
Publication number: 20070205810Abstract: Embodiments of the present invention are directed to current driver circuits and methods for driving a load. The current driver circuit includes a first transistor (Q1) and a second transistor (Q2) each having a gate, a drain and a source. The drain of the second transistor (Q2) forms the output of the current driver circuit. The first and second transistors (Q1) and (Q2) function as a current mirror when the gates of the first and second transistors (Q1) and (Q2) are selectively connected together. The current driver circuit also includes a current source, a load mimic circuit, and a control loop (e.g., including an op-amp), which are configured to cause the voltage at the drain of the first transistor (Q1) to substantially equal the voltage at the output of the current driver circuit.Type: ApplicationFiled: January 31, 2007Publication date: September 6, 2007Applicant: INTERSIL AMERICAS INC.Inventors: Theodore D. Rees, Anatoly Aranovsky
-
Patent number: 7259473Abstract: A DC-DC converter has a plurality of diverse type DC-DC converter channels whose outputs are combined to provide a composite DC power output to a load. One of the channels is a high efficiency power path that supplies the average current demand of the load. A second channel comprises a fast transient response power path which handles transient response demands.Type: GrantFiled: April 26, 2004Date of Patent: August 21, 2007Assignee: Intersil Americas Inc.Inventor: Shea Lynn Petricek
-
Patent number: 7259627Abstract: A differential amplifier circuit which amplifies a signal developed by a signal generating device when coupled between first and second input nodes and provides an amplified differential signal at first and second output nodes. First and second current sources source first and second current levels to the first input node and the first output node, respectively. First and second current sinks sink the first and second current levels from the second input node and the second output node, respectively. A first current amplifier controls current between the first output node and the second input node to maintain the second input node at a first bias voltage level. A second current amplifier controls current between the first input node and the second output node to maintain the first input node at a second bias voltage level. An optional feedback circuit senses a DC offset and adjusts current to compensate.Type: GrantFiled: September 20, 2005Date of Patent: August 21, 2007Assignee: Intersil Americas, Inc.Inventors: Vijayakumar Dhanasekaran, Douglas L. Youngblood
-
Patent number: 7260103Abstract: A mode-dependent, battery-coupling switch for a subscriber line interface circuit (SLIC) selectively adjusts its current requirements to provide optimal current handling capability irrespective of the mode of operation of the SLIC. Where current demands of the SLIC are relatively minimal (e.g., on-hook idle mode), the bias is set at a relatively small, default value. During high current demand, such as ringing and off-hook signaling, the bias is set at a relatively large value, to maintain a low voltage drop across the battery-coupling switch.Type: GrantFiled: December 7, 2005Date of Patent: August 21, 2007Assignee: Intersil Americas Inc.Inventors: Leonel Ernesto Enriquez, Douglas Youngblood
-
Patent number: 7260214Abstract: A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.Type: GrantFiled: December 7, 2005Date of Patent: August 21, 2007Assignee: Intersil Americas Inc.Inventors: Leonel Ernesto Enriquez, Douglas Youngblood, Edward A. Berrios
-
Publication number: 20070187837Abstract: A semiconductor structure is provided. In one embodiment, the structure comprises at least one active device located in a substrate and directly under a bond pad. A conductor is located between the bond pad and the substrate. The conductor has a plurality of gaps filled with insulating material. The insulating material is harder than the conductor.Type: ApplicationFiled: April 19, 2007Publication date: August 16, 2007Applicant: INTERSIL AMERICAS INC.Inventors: John Gasner, Michael Church, Sameer Parab, Paul Bakeman, David Decrosta, Robert Lomenick, Chris McCarty
-
Publication number: 20070187803Abstract: A method of forming a plasma enhanced deposited oxide film on a substrate includes introducing into a chamber containing the substrate silane gas and a dopant gas such as phosphine. The chamber is pressurized and energy is applied to create a plasma. The energy may be a dual frequency energy. The gas rates and pressure are selected to produce a plasma enhanced deposited oxide film on a substrate having a Si—O—Si bond peak absorbance in the IR spectrum of at least 1092 cm?1.Type: ApplicationFiled: April 25, 2007Publication date: August 16, 2007Applicant: INTERSIL AMERICAS INC.Inventors: Katie Pentas, Mark Bordelon, Jack Linn
-
Patent number: 7256623Abstract: A frequency programmable feed forward oscillator and triangular wave generator is disclosed having a first input for receiving an input voltage and a second input for receiving an input current. Circuitry within the device responsive to the input voltage scales the amplitude of a triangle wave form according to the provided input voltage and provides the scaled output voltage at a first output. In conjunction, the circuitry also generates a scaled PWM frequency responsive to the provided input current and provides this at a second output.Type: GrantFiled: August 25, 2004Date of Patent: August 14, 2007Assignee: Intersil Americas Inc.Inventors: Brandon D. Day, James W. Leith, Gustavo J. Mehas
-
Publication number: 20070184645Abstract: A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the conductor to form pillars of relatively hard material that extend through the conductor and forming an insulation layer of the insulation material between the conductor and the bond pad.Type: ApplicationFiled: April 19, 2007Publication date: August 9, 2007Applicant: INTERSIL AMERICAS INC.Inventors: John Gasner, Michael Church, Sameer Parab, Paul Bakeman Jr., David Decrosta, Robert Lomenick, Chris McCarty
-
Patent number: 7250791Abstract: Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures and the claims.Type: GrantFiled: November 6, 2006Date of Patent: July 31, 2007Assignee: Intersil Americas Inc.Inventor: Jeffrey S. Lehto