Abstract: The present invention relates to an apparatus for generating quasi equally spaced multi-channel frequencies using a frequency shifter. The optical multi-channel transmission system using OFDM or WDM can be provided with quasi equally spaced(unequally sequential spaced) frequencies on the basis of the functional relation among the frequency differences(n.sub.ij =n.sub.i -n.sub.j (i=j=1,2,3, . . . n)) of any two neighboring channels. Namely, after generating equally spaced frequencies by using a reference resonator, such as a Fiber Fabry Perot(FFP) resonator, each of the equally spaced frequencies is sequentially shifted by a frequency shifter, which generates and controls the quasi equally spaced(unequally sequential spaced) frequencies in order to effectively avoid crosstalk due to FFWM, and fully make use of the transmission bandwidth belonging to the low dispersion region of the optical fiber.

Abstract: A composite decoding device for an MPEG-2 multichannel audio decoder. The composite decoding device is capable of simultaneously decoding information coded in a dynamic crosstalk coding manner and information coded in a phantom coding manner. To this end, the composite decoding device comprises an arithmetic unit for receiving a control word, information and a scale factor from a first-in-first-out memory, performing an arithmetic operation with respect to the received information and scale factor on the basis of a dynamic crosstalk coding manner or a phantom coding manner determined by the received control word and outputting the arithmetic result to a dual port memory, and a controller for generating a plurality of sequential control signals in response to the control word from the first-in-first-out memory to control the arithmetic unit.

Abstract: A digital video data transmitting apparatus capable of making a bit stream of video coding due to MPEG-coding having a plurality of picture groups, each having at least one intra picture and a plurality of predictive pictures, and each of the pictures consisting of a least one slice. The apparatus generates a first slice of the I-picture, and a second slice of the P-picture, and then selects the DC coefficient and motion vector from the first and second slices. The selected information is stored in an RS-encoding buffer. One of the generated slices included in the picture is then transmitted into a user data section of the encoded buffer to conform with the MPEG-standard bit stream. Parity data is assigned to the encoded macro block of corresponding slices so that the parity data is transmitted. In accordance with the apparatus, the amount of added information resulting from the error correction codes is greatly reduced by 50% or greater, as compared to conventional methods.

Abstract: The present invention relates to an Asynchronous Transfer Mode(ATM) network adaptor for the simultaneous processing of the multi-channel traffic, and includes an R-interface(RIF) means composed of a plurality of first interface means, which output the CBR traffic according to their token signal indicating a point of time occupying the bus or in the case of having the same header address as its own, after receiving the external CBR traffic, and composed of a plurality of second interface means which receive the external VBR traffic and also output it to the external; a Multipled Traffic bus(MT-bus) is connected to the first interface means, being used for transmitting multiplexed channels by providing constant bandwidth necessary for the CBR traffic transmission; a system bus is connected to the first and second interface means, and used for transmitting not only VBR traffic of the second interface means but also the resource control signal of the system; and an ATM Network Interface(ANI) means used for transm

Abstract: A system for a point-to-point traffic demand estimation, which is one of the data analyzing procedures necessary for network management, on the basis of measured traffic data for communications network. This system includes setting an initial point of an estimated value as zero, iteratively and temporarily incrementing the estimated value by the product of a directional vector by a step size, and comprising constraints using both the incremented estimated value and the directional vector.

Abstract: The present invention provides an apparatus and a method for testing protocol and traffic levels in broadband integrated services digital networks(B-ISDNs).

Abstract: A zig-zag and alternate scan conversion circuit for encoding/decoding videos which is structured only by logic circuits using a regularity of scan address patterns, thereby achieving an improvement in processing speed and a reduction in area.

Abstract: The present invention relates to a dielectric ceramic composition for microwave which consists of BaO, Sm.sub.2 O.sub.3, TiO.sub.2 and PbO, and has a compositional formula of x(Ba.sub.1-.alpha., Pb.sub..alpha.)O-- ySm.sub.2 O.sub.3 -zTiO.sub.2, wherein 6 mol % .ltoreq.x.ltoreq.20 mol %, 6 mol %.ltoreq.y.ltoreq.20 mol %, 60 mol %.ltoreq.z.ltoreq.75 mol % and 0 mol % .ltoreq..alpha..ltoreq.0.2 mol %. Accordingly, since the dielectric ceramic composition for microwave according to the present invention has the dielectric constant more than 85, the temperature factor of the resonant frequency within .+-.5 ppm/.degree.C., and the quality factor more than 6000 in 1 GHz, it can be utilized in the filter for microwave, the dielectric for the resonator, the laminated ceramic capacitor, the dielectric for the filter for electromagnetic wave obstacle and the dielectric for capacitor.

Abstract: An apparatus for stabilizing the light output frequency of each laser diode for pulse light and probe light for measuring the distribution of strain, by controlling the change of the light output frequency of the laser diode due to external causes by input current of the laser diode. The apparatus is constructed such that the frequency variation of the laser diodes is detected to then generate a signal corresponding to the variation. Then, the signal is fed back to a temperature-current controller to be used as the input current signal of the laser diode.

Abstract: A method and apparatus for synchronization control of multimedia objects in an MHEG engine are specified. The present system overcomes the shortcomings in the conventional apparatus, which is the fact that interactive processing is not allowed during presentation and that the conventional apparatus cannot control synchronized presentation for failing to provide control of the conditional, temporal, and spatial synchronization.

Abstract: A system for detecting a frame/burst synchronization and a channel error using a cyclic code (n,k). A received block of 2n-k bits is divided into a head block including first n-k bits of the received block, a middle block including the subsequent k bits of the received block and a tail block including last n-k bits of the received block. Head and tail syndromes are obtained on the basis of the divided head, middle and tail blocks. The frame/burst synchronization and the presence of the channel error are detected on the basis of the obtained head and tail syndromes.

Abstract: The present invention relates to a fixed length packet switching apparatus using multiplexers and demultiplexers in which the apparatus has an output buffer-type construction, protects itself from a temporary overflow occurrence of an output terminal and has the construction of the mutual flow control to enhance its entire performance. The present invention can protect the entire operations as well as enhance the entire performance of the switching apparatus by preventing an obstacle of the switching apparatus due to an overflow temporarily generated from an output terminal, process without a loss of excessive cells a traffic phenomenon of one output port in the switching apparatus, reduce the necessary buffer according to the effect of the rate gain and process smoothly input traffic of the internal buffer having a burst characteristic.

Abstract: As stated above, since the control, according to different types of service traffics, is executed by detecting the congestion state by output buffers, whose numbers is fixed, of the network node, the present invention can remove a load of hardware which may be caused by the variable number of virtual connections in case of executing the congestion by the virtual connections. Therefore, the present invention has the effect of simplification of circuitry implement. Also, the present invention can exclude out of the network node the possibility of the congestion which can be generated by the transmission delay, because the congestion state in the network node is determined concerning the transmission delay.

Abstract: A method of automatically controlling and verifying telecommands in a satellite control system in which a satellite status analyzing/processing unit and a telecommand producing/executing unit are closely connected with each other to share a knowledge base with information regarding the telecommands. The present method comprises the steps of transmitting the telecommands to a satellite for the control thereof, receiving the resultant telemetry from the satellite, analyzing the received telemetry, inferring telemetry values corresponding to the transmitted telecommands from the information in the knowledge base, verifying a telecommand execution status of the satellite on the basis of the analyzed result and inferred telemetry values and producing a control command upon recognizing an abnormal status of the satellite in accordance with the verified result. According to the present invention, an operator needs not check data one by one to determine whether the telecommand execution is normal or not.

Abstract: A method for exchanging an authentication and signing an electronic signature, capable of providing a high security and achieving a high efficiency. The method includes the steps of setting p, q and g as system parameters, where p and q are prime numbers while g is an integer, between 1 and p, having the value of 1 when multiplied by the q-th power and then divided by p, and using n secret keys and n public keys for each user, where n is a number not less than 2, the public keys v.sub.n respectively corresponding to the secret keys S.sub.n, integers between 1 and q, and being produced based on an equation of v.sub.n =g.sup.-sn mod p.

Abstract: A cyclic redundancy check synchronizer includes an N-byte shift register for shifting an input byte string by N bytes and N-1 bytes, a compensation polynomial driver for driving a compensation polynomial by modulo-2-dividing bits of a byte output from the Nth stage of the N-byte shift register by a generator polynomial and shifting the resultant remainder by one bit in a direction toward higher-order bits, and a calculator for inputting bits of an output byte from a remainder register as high-order bits and bits of an input data byte as low-order bits and for performing compensation polynomial modulo-2 subtraction and generator polynomial modulo-2 division for the inputted bits.

Abstract: The present invention provides a high quality power supply, and more particularly to an improved single-ended converter having the high power factor close to unity. In accordance with the present invention, the power supply comprises a power source, a low-pass filter, a rectifier including an inductor, a transformer primary coil, a transformer secondary coil, a ripple energy storing capacitor, a switching controller and an inductance element wound round a core where said transformer primary and secondary coils are wound. The inductance element being coupled to said rectifying means so that compensates a voltage applied to said inductor in said rectifying means with a voltage applied to said transformer primary coil.

Abstract: A frame synchronizing device for discriminating a time slot location for each channel of time-division multiplexed signals is disclosed. The frame synchronizing device according to the invention processes time-division multiplexed signals in parallel in a STM-4C(Synchronous Transport Module-4 Concatenation) of the Broadband Integrated Service Digital Network according to the ITU-T recommendation, such that the searching of frame synchronization can be achieved by detecting frame bytes on data being received at a high speed in the STM-4C structure to align the bytes based on the detected time interval, converting the frame data into the 8-bits parallel data and then detecting, in sequence, the frame bytes at a lower speed clock being divided by 8, thereby providing a simplified, less power consumptive frame synchronizing device in the STM-4C structure according to the ITU-T recommendation.

Abstract: An improved electrostatic discharge protection guide rail system for a PCB which is capable of providing an electrostatic discharge protection function so that a PCB of a plug-in unit disposed in a sub-rack of an electronic instrument from a damage due to an electrostatic discharge (ESD), which includes an ESD ground surface formed on the PCB, an engaging jaw portion formed in a lower portion of the guide rail and having a groove, and an insertion groove formed in a side portion of the guide rail in order for the ESD strip to be inserted therein, wherein the bent ESD strip is inserted into the insertion groove, the ESD ground surface contact portion and the ESD PCB contact portion are inserted into a groove formed in the engaging jaw portion of the guide rail, both ends of the ESD PCB having a copper plate are protruded beyond a side surface of a sub-rack and horizontally cross with respect to the parallel guide rails, and a ground cable is connected to both ends of the ESD PCB, respectively.

Abstract: An ATM cell demultiplexing control apparatus comprising an ATM switch interface circuit for performing an interface function with an ATM switch link and outputting ATM cell data received from the ATM switch link and a start signal, a register circuit being enabled in response to the start signal from the ATM switch interface circuit, the register circuit shifting the ATM cell data received from the ATM switch interface circuit to extract a virtual path indicator therefrom and outputting the extracted virtual path indicator and the received ATM cell data, a memory for storing a virtual path indicator table therein and outputting information listed in the stored virtual path indicator table as a processor routing bit map in response to the virtual path indicator from the register circuit, a local processor for updating the virtual path indicator table stored in the memory, a processor cell transmitter for outputting a reception FIFO selection signal in response to the processor routing bit map from the memory t