Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.
Abstract: A switching regulator circuit using a common switch network on a single IC for providing step-up and step-down DC--DC conversion is provided. The switching regulator uses switched capacitor techniques and hence avoids EMI, parasitic and stability concerns particular to inductors and transformers. The converter circuit includes control circuitry for sensing the voltage differential between the input and output to determine whether step-up or step-down mode is to be used. The control circuitry also senses the voltage differential between the input and output and enables the minimum number of switch sections needed to fully regulate the output, using the highest switch resistance possible to minimize inrush current from the input to the output.
Abstract: A low-noise switching regulator and a method for driving an inductive load, employing current slew control and voltage slew control, is provided. Open and closed loop embodiments, as well as first and higher order slewing, are also provided.
Abstract: A capacitor is provided including first and second electrodes formed from portions of the lead frame structure used in conventional integrated circuit packaging. The electrodes are encapsulated with dielectric molding material which provides dielectric insulation between the electrodes. A low power capacitively-coupled digital isolator circuit is also provided. The circuit employs a pair of the lead frame capacitors of the present invention and includes differential driver and receiver circuits. The receiver can also include an optional filter for increasing noise and glitch immunity.
Abstract: Switching regulator circuits and methods are provided in which a voltage controlled oscillator circuit (VCO) is utilized to produce signals that turn ON a switch circuit. The VCO is itself controlled by a phase detector circuit that compares the output of the VCO to an external synchronization signal and locks the VCO to the external synchronization signal. The switching regulator circuits also include a slope compensation circuit that derives a slope compensation signal from an oscillator ramp signal produced by the VCO. The slope compensation signal is used to modify turning the switch circuit OFF when the duty cycle of the switch circuit exceeds a predetermined value. An alternate embodiment of the present invention includes a signal generation circuit in place of the phase detector circuit. The signal generation circuit applies a waveform to the VCO to vary the voltage oscillator circuit frequency, which causes a reduction in the amplitude of noise generated by the switching regulator circuit.
Abstract: A capacitor is provided including first and second electrodes formed from portions of the lead frame structure used in conventional integrated circuit packaging. The electrodes are encapsulated with dielectric molding material which provides dielectric insulation between the electrodes. A low power capacitively-coupled digital isolator circuit is also provided. The circuit employs a pair of the lead frame capacitors of the present invention and includes differential driver and receiver circuits. The receiver can also include an optional filter for increasing noise and glitch immunity.
Abstract: A voltage interpolation circuit for a digital-to-analog converter comprises a differential amplifier with composite input devices, each of which is composed of multiple active subtransistors. Interpolation is effected between a first voltage and a second voltage by selectively connecting the gates of the active subtransistors in one of the composite devices to either the first voltage or the second voltage. Each active subtransistor operates in conjunction with a voltage-controlled degeneration subtransistor to form a functional subtransistor pair. Using the nonlinear conductance characteristic of MOS devices operated in the triode region, the transconductance of each functional subtransistor pair is modulated in such a way as to be made relatively insensitive to changes in effective gate-to-source voltage V.sub.GS ', so that the interpolation circuit produces equally sized interpolated voltage steps at an analog output.
Type:
Grant
Filed:
July 25, 1997
Date of Patent:
January 12, 1999
Assignee:
Linear Technology Corporation
Inventors:
Victor Paul Schrader, James Lee Brubaker
Abstract: Synchronous switching regulator circuits with voltage-drop sensing circuitry are presented in which the current sensing element typically in series with a load is eliminated, resulting in reduced dissipative losses and less costly manufacture. Voltage drops are measured across the regulator's synchronous switching element, and, in some cases, also across the regulator's main switching element. Measured voltage drops are used to derive a current analog signal indicative of the amount of current being supplied by the regulator. The current signal is then compared with a threshold value to determine whether the regulator's duty cycle should be varied.
Type:
Grant
Filed:
June 13, 1997
Date of Patent:
December 8, 1998
Assignee:
Linear Technology Corporation
Inventors:
Milton E. Wilcox, Christopher B. Umminger
Abstract: Control circuits for a flyback switching voltage regulator that uses magnetic flux sensing are provided. These circuits include a flyback error amplifier circuit, a logic circuit, and a load compensation circuit. The flyback error amplifier circuit allows a flyback voltage pulse from a primary transformer winding to be employed for output voltage regulation. The logic circuit provides appropriate timing and control signals for the flyback error amplifier circuit. The load compensation circuit compensates for parasitic impedance contributions to the flyback voltage pulse without altering the stability of the flyback regulator.
Abstract: Low quiescent power, high output power, rail-to-rail output stage circuits and methods are provided. The output stages are capable of providing output voltages that are substantially equal to the supply voltages (i.e., within one V.sub.CE SAT of both supply voltages) without a substantial increase in output circuit complexity and without a substantial increase in quiescent current. The output stages operate by providing a direct path for the drive signal to the output sinking transistor, and an additional, separate path for the drive signal to the output sourcing transistor. The sinking and sourcing paths are separated by a PNP transistor that gradually turns off during sinking to isolate that portion of the circuit so that the drive current to the sinking transistor is not reduced. Additional embodiments are provided where additional components are utilized to further increase the maximum sink and source currents without a significant increase in quiescent current or reduction in output swing.
Abstract: A drive circuit for a high-speed integrated circuit, bipolar switching regulator is disclosed. The circuit runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The circuitry provides three switch drive currents: a first (nominal) current that is provided while the switch is off in order to conserve power; a second (boosted) current, provided while the switch is transitioning from off to on in order to increase the speed at which the switching element switches on; and a third (drive) current, provided after the switch has turned on for maintaining the switch at a desired point in saturation. The drive current, additionally, varies as a function of the load on the switch in order, again, to conserve power. Additional circuitry increases the speed at which the switch turns off, by momentarily boosting base discharge current during the on-to-off transition period of the switch.
Abstract: Efficient very low dropout (i.e., approximately equal to about V.sub.CESAT of the output transistor) dual supply voltage regulator circuits and methods are provided. The voltage regulators are capable of providing very low dropout irrespective of supply sequencing. Traditional supply sequencing problems are overcome by including an anti-latch circuit that monitors the output power supply during power-on. The anti-latch circuit is also coupled to any location in the regulator circuit where the drive current can be inhibited whenever the output power monitor senses that the output power supply is not fully operational. The anti-latch circuit operates to prevent drive current from being supplied to the output transistor unless output power is available so that the substrate of the regulator is not permitted to become forward biased (and thus prevents the establishment of an undesired latch condition).
Abstract: Power supply and control circuits are provided for driving a fluorescent lamp with a differential drive voltage from a low voltage DC power source. In one embodiment, the lamp is driven by a transformer having a primary and two independent secondary windings which produce the differential drive signal. A feedback signal indicative of the magnitude of current conducted by the lamp is produced from one of the secondary windings that is coupled to the control circuit so that the feedback signal is directly proportional to the energy required to light the lamp. In another embodiment, the lamp is driven by two independent transformers that are both driven by the control and drive circuit. The two secondary windings are each connected to one end of the lamp so that the lamp is driven by a differential drive signal. One of the secondary windings is also coupled to the control and drive circuit to provide a feedback signal indicative of the magnitude of current conducted by the lamp.
Abstract: Circuitry is provided for use in a successive approximation analog-to-digital converter that protects the transistors in a high-resolution input stage from voltage threshold changes due to exposure to large input signals, while allowing a low-resolution input stage to process the large input signals. An input protection transistor allows the high-resolution input stage to be placed in either a differential amplifier configuration or a source follower pair configuration. An input circuit is also provided for a successive approximation analog-to-digital converter having high-resolution and low-resolution input stage circuitry. Protection circuitry within the input circuit ensures that the high-resolution input stage circuitry is not adversely affected by exposure to large input signals.
Abstract: A simple, low-cost circuit and method for line zing parasitic capacitances of transistor junctions, independent of the process technology employed, are provided. In the preferred embodiment, the parasitic capacitance of a transistor in a track and hold circuit is linearized by providing a pair of diodes that act inversely to the parasitic diodes formed within the integrated circuit during normal tracking operations. Without the diodes of the present invention, the varying input signals cause the parasitic capacitance to vary, thereby causing harmonic distortion in the track and hold circuit. An alternate embodiment of the present invention is also provided in which a second complementary transistor is provided. The inclusion of the complementary transistor results in a second set of parasitic capacitances that are substantially opposite the parasitic capacitances of the track and hold transistor.
Abstract: Current feedback amplifier circuits, and current-to-voltage converter circuits, employing operational amplifier current mirror circuits are provided. Also provided is an output compensation circuit that, in a current feedback amplifier circuit employing the output compensation circuit together with the operational amplifier current mirrors, reduces the input bias current to be comparable to the input bias current of a voltage feedback amplifier. Additionally, a circuit and method of providing a current source that is proportional to absolute temperature is provided. A current feedback amplifier circuit employing the output compensation circuit and the operational amplifier current mirrors, and having input transistors biased by the proportional to absolute temperature current source is also provided. The drift of the input bias current over temperature are thereby made predictable and, with trimming, substantially reduced.
Abstract: Switching regulator circuits and methods are provided in which the output circuit is adaptable to maintain high efficiency over various load current levels. The regulator circuits generate one or more control signals in response to the load current and selectively route a switch driver control signal to one or more switches in the output circuit. The switches differ in their size, such that the most efficient switch can be used at a particular load current level. At low load current levels, the driver control signal is routed to output circuitry with smaller switch devices, which incur smaller driver current losses for a given frequency of operation, thereby increasing the regulator efficiency. At high load current levels, the driver control signal is routed to large switch devices, which incur greater driver current losses for a given frequency of operation, but which have a lower impedance.
Type:
Grant
Filed:
January 21, 1997
Date of Patent:
March 24, 1998
Assignee:
Linear Technology Corporation
Inventors:
Milton E. Wilcox, Robert C. Dobkin, Carl T. Nelson
Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.
Abstract: A power supply is disclosed for use in battery powered electronic devices. The power supply includes a power source which supplies power to the electronic device itself as well as to battery charging circuitry integral to the power supply. The battery charging circuitry monitors an output current, or other parameter, of the power source output. Feedback circuitry regulates the output of the battery charging circuitry so that output current, or other parameter of the power source output, is kept within predetermined limits.
Abstract: Serial analog-to-digital converters (ADC) in which power down and power up modes are activated by two dual-purpose input signals are provided. The ADCs of the invention eliminate the need for a dedicated power down input line as found on typical serial ADCs. When commanded to do so, the ADC enters into one of two power down modes, NAP or SLEEP. In NAP mode, only those portions of the ADC circuit which consume current and which are capable of waking up almost instantaneously are powered down. In SLEEP mode, the entire ADC circuit is powered down. When commanded to do so, the ADC enters into a power up mode, applying current to every portion of the ADC circuit. Wake-up from the NAP mode takes place almost instantaneously. Wake-up from the SLEEP mode requires additional time. From either mode, a signal is generated when the ADC conversion circuit, which preferably includes a reference voltage generator, has stabilized sufficiently for the ADC to perform analog-to-digital conversion.
Type:
Grant
Filed:
June 7, 1995
Date of Patent:
February 3, 1998
Assignee:
Linear Technology Corporation
Inventors:
Robert L. Reay, Yang-Long Teo, William C. Rempfer