Abstract: An omnipolar sensor is provided. The sensor may include a plurality of omnipolar switches disposed adjacent to one another, and a permanent magnet assembly disposed adjacent the plurality of omnipolar switches. The permanent magnet assembly is operable to move axially relative to the plurality of omnipolar switches, wherein the plurality of omnipolar switches are responsive to a magnetic field produced by the permanent magnet assembly, and wherein the permanent magnet axially magnetized.

Abstract: An automobile antenna assembly including a housing adapted for installation on a roof of an automobile, the housing having a base portion and a fin portion extending from the base portion, a radio antenna disposed within the fin portion, and a photo radiation intensity sensor disposed within the base portion, the photo radiation intensity sensor including a first light detecting element located on a first side of the fin portion and a second light detecting element located on a second side of the fin portion opposite the first side, wherein at least a portion of the base portion is translucent for allowing light to be received by the first and second light detecting elements, the fin portion providing a light barrier between the first light detecting element and the second light detecting element.

Abstract: In one embodiment, a power semiconductor device may include a semiconductor substrate, wherein the semiconductor substrate comprises an active device region and a junction termination region. The power semiconductor device may also include a polysilicon layer, disposed over the semiconductor substrate. The polysilicon layer may include an active device portion, disposed over the active device region, and defining at least one semiconductor device; and a junction termination portion, disposed over the junction termination region, the junction termination portion defining a ring structure.

Abstract: Embodiments of the disclosure are directed to a harness assembly including a substrate having a plurality of vias, and a trace formed atop the substrate, the trace extending between each of the plurality of vias. The harness assembly may further include a surface mounted device disposed within a via of the plurality of vias.

Abstract: A high breaking capacity chip fuse including a bottom insulative layer, a first intermediate insulative layer, a second intermediate insulative layer, and a top insulative layer disposed in a stacked arrangement in the aforementioned order, a fusible element disposed between the first and second intermediate insulative layers and extending between electrically conductive first and second terminals at opposing longitudinal ends of the bottom insulative layer, the first intermediate insulative layer, the second intermediate insulative layer, and the top insulative layer, wherein the first and second intermediate insulative layers are formed of porous ceramic.

Abstract: A semiconductor device structure may include a semiconductor device, disposed at least in part in a semiconductor substrate, and a first insulator layer, disposed on a surface of the semiconductor device, and comprising a first contact aperture, disposed within the first insulator layer. The semiconductor device structure may also include a first contact layer, comprising a first electrically conductive material, disposed over the insulator layer, and being in electrical contact with the semiconductor device through the first contact aperture, and a second insulator layer, disposed over the first contact layer, wherein the second insulator layer further includes a second contact aperture, displaced laterally from the first contact aperture, by a first distance.

Abstract: A semiconductor device structure may include a substrate having a substrate base comprising a first dopant type; a semiconductor layer disposed on a surface of the substrate base, the semiconductor layer comprising a second dopant type and having an upper surface; and a semiconductor plug assembly comprising a semiconductor plug disposed within the semiconductor layer, the semiconductor plug extending from an upper surface of the semiconductor layer and having a depth at least equal to a thickness of the semiconductor layer, the semiconductor plug having a first boundary, the first boundary formed within the semiconductor layer, and having a second boundary, the second boundary formed within the semiconductor layer and disposed opposite the first boundary, wherein the first boundary and second boundary extend perpendicularly to the surface of the substrate base.

Abstract: A transient voltage suppression (TVS) device, may include: a substrate base formed in a substrate, the substrate base comprising a semiconductor of a first conductivity type; and an epitaxial layer, disposed on the substrate base, on a first side of the substrate, and comprising a semiconductor of a second conductivity type. The epitaxial layer may include: a first portion, the first portion having a first layer thickness; and a second portion, the second portion having a second layer thickness, less than the first layer thickness, wherein the first portion and the second portion are disposed on a first side of the substrate, and wherein the first portion is electrically isolated from the second portion.

Abstract: A polymeric positive temperature coefficient (PPTC) device including a PPTC body, a first electrode disposed on a first side of the PPTC body, and a second electrode disposed on a second side of the PPTC body, wherein the PPTC body is formed of a PPTC material that includes a polymer matrix and a conductive filler, wherein the conductive filler defines 20%-39% by volume of the PPTC material.

Abstract: A PPTC device including a PPTC body, a first electrode, disposed on a first side of the fuse component, a second electrode, disposed on a second side of the PPTC body, wherein the PPTC body comprises a polymer matrix and a conductive filler.

Abstract: A semiconductor device structure may include a substrate having a substrate base comprising a first dopant type; a semiconductor layer disposed on a surface of the substrate base, the semiconductor layer comprising a second dopant type and having an upper surface; and a semiconductor plug assembly comprising a semiconductor plug disposed within the semiconductor layer, the semiconductor plug extending from an upper surface of the semiconductor layer and having a depth at least equal to a thickness of the semiconductor layer, the semiconductor plug having a first boundary, the first boundary formed within the semiconductor layer, and having a second boundary, the second boundary formed within the semiconductor layer and disposed opposite the first boundary, wherein the first boundary and second boundary extend perpendicularly to the surface of the substrate base.

Abstract: A fuse including a first housing part and a second housing part that are joined together to define a cavity, a fuse element disposed within the cavity, a first terminal extending from a first end of the fuse element and out of the housing, and a second terminal extending from a second end of the fuse element and out of the housing, the housing having a vent channel extending from an outer surface of the housing to the cavity for allowing vapor to escape from the cavity.

Abstract: A vertical surface mount device pass-through fuse including an electrically insulating fuse body, a fusible element disposed on a first side of the fuse body and extending between first and second terminals, an electrically insulating cap having a domed portion and a flanged portion extending from the domed portion, the domed portion disposed over the fusible element, and the flanged portion affixed to the fuse body, and a conductive lead frame having a bow portion and an elongate shank portion extending from the bow portion, wherein the bow portion is disposed on the cap and is connected to the first terminal, and wherein the shank portion extends away from the fuse body.

Abstract: An amplifier circuit may include an isolated amplifier circuit, disposed on a high voltage side of the amplifier circuit, and arranged to generate an isolated output signal. The amplifier circuit may include a first optocoupler circuit, disposed to receive the isolated output signal from the isolated amplifier circuit and an output amplifier circuit, disposed on a low voltage side of the amplifier circuit, and coupled to receive an optical output signal from the optocoupler circuit. The amplifier circuit may also include a calibration circuit, coupled to the output amplifier circuit, to generate a calibration initiation signal, and a second optocoupler circuit, disposed to receive the calibration initiation signal, and to output a switch signal, wherein a reference voltage is output to the isolated amplifier circuit.

Abstract: A PPTC device is provided. The PPTC device may include a first electrode and a second electrode, disposed opposite the first electrode. The PPTC device may include a PPTC layer, disposed between the first electrode and the second electrode, the PPTC layer comprising a polymer matrix formed from a thermoplastic polyurethane (TPU) material.

Abstract: A self-oscillating spread spectrum frequency control loop contains a gated voltage-controlled oscillator (VCO) which receives a digital signal that can start or stop its oscillation. The VCO generates a spread spectrum carrier by receiving a triangle wave signal from a delaying ramp generator in a loop, its ramp direction controlled by a frequency comparator. The loop generates a spectrum spread as wide as possible above a minimum frequency. RF isolators that utilize low-pass filters in the transmitter and high-pass filters in the receiver, where the F-3 dB cutoff frequencies of both filters vary in a correlated manner, are used to not produce spread spectrum frequencies below the minimum frequency. Die from a given wafer lot, when designed such that the low- and high-pass cutoff frequencies track, can be used to form RF digital isolators whose minimum spread spectrum frequency does not go below the minimum frequency required by that wafer lot.

Abstract: A circuit protection device including a primary fuse, and a positive temperature coefficient (PTC) device and a secondary fuse electrically connected in series with one another and in parallel with the primary fuse, the secondary fuse formed of a quantity of solder disposed on a dielectric surface, wherein the dielectric surface exhibits a de-wetting characteristic relative to the solder such that, when the solder is melted, the solder draws away from the dielectric surface to create a galvanic opening.

Abstract: A PPTC assembly may include a PPTC component, having a trip temperature, and further comprising a first temperature coefficient of resistance, in a low temperature range below the trip temperature. The PPTC assembly may include a resistive component, disposed in electrical contact with the PPTC component on a first side of the PPTC component, the resistive component comprising an electrical conductor, and having a second temperature coefficient of resistance in the low temperature range, less than the first temperature coefficient of resistance. The PPTC component may include a first electrode, electrically coupled to the first side of the PPTC component, and a second electrode, electrically coupled to the second side of the PPTC component, where the PPTC component and the resistive component are arranged in electrical series between the first electrode and the second electrode.

Abstract: An overcurrent protection device according to an embodiment of the present disclosure may include a first electrode disposed substantially parallel to a second electrode. A material may be disposed between the first electrode and the second electrode. A plurality of conductive material nodules may be disposed in the material between the first electrode and the second electrode, including a first conductive material nodule at least partially contacting an inner surface of the first electrode and a second conductive material nodule at least partially contacting an inner surface of the second electrode and the first conductive material nodule. In response to an overcurrent condition the material may be configured to expand, such that the contact between the first electrode, the first conductive material nodule, the second conductive material nodule, and the second electrode is at least partially interrupted.

Abstract: An overcurrent protection device according to an embodiment of the present disclosure may include a first electrode disposed substantially parallel to a second electrode. A material may be disposed between the first electrode and the second electrode. A plurality of conductive material nodules may be disposed in the material between the first electrode and the second electrode, including a first conductive material nodule at least partially contacting an inner surface of the first electrode and a second conductive material nodule at least partially contacting an inner surface of the second electrode and the first conductive material nodule. In response to an overcurrent condition the material may be configured to expand, such that the contact between the first electrode, the first conductive material nodule, the second conductive material nodule, and the second electrode is at least partially interrupted.