Abstract: A method for storing data and two sets of distributed mirrored data disposed as data stripes which permits data recovery without the necessity of parity calculations, is described. Redundant data are stored in groups of five physical hard drives which are logically segmented into stripe groups, each stripe group having three data stripe sets wherein one data stripe is protected by two distributed mirror stripes in accordance with an algorithm. The present method provides protection for all one- and two-disk failures and certain three-disk drive failures, for each physical five disk group, and retains a usable disk capacity of 33%.

Abstract: A surgical suturing instrument has a needle which traverses at tissue receiving gap and picks up suture distal to the gap. This invention provides an automated mechanism enabling the suture to be removed from the needle after the needle is retracted proximal to the tissue gap. This mechanism provides enhanced device reloading and other potential uses.

Abstract: A method for inverse telecine. The method generally includes the steps of (A) checking if a current field of a plurality of fields in a video sequence repeats in the video sequence according to a pattern-based approach where the current field fits a telecine pattern, (B) checking if the current field repeats according to a first pattern-less approach where the current field complies with at least one of a plurality of rules and (C) generating a signal for an encoder in (i) an asserted state if the current field repeats and (ii) a deasserted state if the current field does not repeat.

Abstract: In one embodiment, an adaptive clock recovery (ACR) system generates a current delay-offset estimate value (DOE(i)) using a window technique that selects the larger of (i) the maximum delay-offset value (DOP) in the previous window and (ii) the maximum delay-offset value so far (DOM) in current window. This windowing technique can be implemented without having to store all of the individual values over a specified window size, as in a conventional sliding window technique. This windowing technique can be used to find extreme (i.e., either maximum or minimum) values for applications other than ACR systems.

Abstract: A memory device includes a memory array including a plurality of memory cells, sensing circuitry coupled to at least a given bitline associated with a particular column of the memory cells of the memory array, and access time acceleration circuitry coupled to the bitline. The access time acceleration circuitry is configured to control an amount of time required by the sensing circuitry to access data stored in a given one of the memory cells in the particular column of memory cells, by providing in a current access cycle at least a selected one of a plurality of different supplemental charging and discharging paths for the bitline based at least in part on data accessed using the bitline in a previous access cycle.

Abstract: Techniques are described for reducing write operations in memory. In use, write operations to be performed on data stored in memory are identified. A difference is then determined between results of the write operations and the data stored in the memory. Difference information is stored in coalescing memory buffers. To this end, the write operations may be reduced, utilizing the difference information.

Abstract: A crimpable magnesium sleeve for securing a suture within the body and for dissolving over time while introducing only compatible amounts of magnesium into the body. An instrument for placing such a sleeve on a suture crimping the sleeve and cutting the suture after placement. An alloy of magnesium, zinc, and aluminum may be used to form the sleeve.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes two or more detection processing circuits, a decoder processing circuit and a memory. The memory is coupled to both of the data detection processing circuits and the decoder processing circuit. In some instances of the aforementioned embodiments, the system further includes a scheduling circuit that is operable to govern access to the memory by the detection processing circuits and the decoder processing circuit.

Abstract: A system and method for coordinating control setting with respect to an automated input/output (I/O) processor. A state machine having a transition algorithm can be configured in association with a storage controller in order to permit multiple entities to safely transmit an I/O request to an I/O device. Specific combinations of control bits associated with a fast path engine can be determined by identifying different modes with respect to the behavior of the fast path engine. Each mode can be assigned as a state with respect to the state machine. An I/O path exception and error condition that can cause transitions between the states can be determined and the transitions can be assigned from one state to another state. A generic logic template can then be configured to govern the transitions with respect to the state machine. The logic can be executed when an event occurs in order to trigger multiple state transition and/or modifications with respect to the hardware control bits of the fast path engine.

Abstract: A clock-switching circuit having at least two inputs for receiving at least two different clock sources, an output for providing a selected one of the clock sources, and a switch for selecting the one of the inputs to provide on the output, the switch including elements that, prevent the providing of a truncated version of any of the clock sources on the output, always provide a clock signal on the output, and always maintain phase alignment and pulse ratio of the clock sources on the output.

Abstract: The present disclosure relates to a vacuum interrupter capable of easily installing a central arc shielding plate in alignment without biasing in a radial direction. The vacuum interrupter includes a protruding guide unit protruding from a stationary electrode seal cup in a perpendicular direction to guide the installation of the central arc shielding plate such that the central arc shielding plate can be aligned in a radial direction.

Abstract: Methods and structure for load balancing of background tasks between storage controllers are provided. An exemplary active storage controller comprises a front-end interface that receives host Input/Output (I/O) requests directed to a logical volume, a back-end interface that couples with one or more of storage devices provisioning the logical volume, and a control unit. The control unit processes the host I/O requests directed to the logical volume, identifies a background processing task distinct from the host I/O requests and related to the logical volume, and assigns the background processing task to a passive storage controller for processing.

Abstract: Methods and structure for task management in storage controllers of a clustered storage system. An initiator storage controller of the clustered storage system ships I/O requests for processing to a target storage controller of the system. Responsive to a need to abort a previously shipped I/O request, the initiator storage controller transmits a task management message to the target storage controller. The task management message identifies one or more previously shipped I/O requests to be aborted. The target storage controller processes the received task management message in due course of processing requests and completes processing for the aborted previously shipped request in an orderly manner. Resources associated with the aborted previously shipped requests are release within both controllers.

Abstract: Methods and system for implementing a clustered storage solution are provided. One embodiment is a storage controller that communicatively couples a host system with a storage device. The storage controller comprises an interface and a control unit. The interface is operable to communicate with the storage device. The control unit is operable to identify ownership information for a storage device, and to determine if the storage controller is authorized to access the storage device based on the ownership information. The storage controller is operable to indicate the existence of the storage device to the host system if the storage controller is authorized, and operable to hide the existence of the storage device from the host system if the storage controller is not authorized.

Abstract: Methods and structure for improved processing of fast path I/O requests in a clustered storage system. In a storage controller of a clustered storage system, the controller comprises a fast path I/O request processing circuit tightly coupled with host system drivers for fast processing of requests directed to storage devices of a logical volume. The controller also comprises a logical volume I/O processing stack (typically implemented as programmed instructions) for processing I/O requests from a host system directed to a logical volume. Based on detecting a change of ownership of a device or volume and/or a change to logical to physical mapping of a logical volume, fast path I/O requests may be converted to logical volume requests based on mapping context information within the fast path I/O request and shipped within the clustered storage system for processing.

Abstract: Methods and structure for improved shipping of I/O requests among multiple storage controllers of a clustered storage system. Minimal processing of a received I/O request is performed in a first controller to determine whether the I/O request is directed to a logical volume that is owned by the first controller or to a logical volume owned by another controller. For requests to logical volumes owned by another controller, the original I/O request is modified to indicate the target device address of the other controller. The first controller then ships the request to the other controller and configures DMA capabilities of the first controller to exchange data associated with the shipped request between the other controller and memory of the host system.

Abstract: Methods and structure for improved buffer management in a storage controller. A plurality of processes in the controller each transmits buffer management requests to buffer management control logic. A plurality of reserved portions and a remaining non-reserved portion are defined in a shared pool memory managed by the buffer management control logic. Each reserved portion is defined as a corresponding minimum amount of memory of the shared pool. Each reserved portion is associated with a private pool identifier. Each allocation request from a client process supplies a private pool identifier for the associated buffer to be allocated. The buffer is allocated from the reserved portion if there sufficient available space in the reserved portion identified by the supplied private pool identifier. Otherwise, the buffer is allocated if sufficient memory is available in the non-reserved portion. Otherwise the request is queued for later re-processing.

Abstract: A method for maintaining context-specific symbols in a multi-core or multi-threaded processing environment may include, but is not limited to: partitioning a virtual address space into at least one portion associated with the storage of one or more context-specific symbols accessible by at least a first processing core and a second processing core; defining at least one context-specific symbol; storing the at least one context specific symbol to the at least one portion of the virtual address space; and mapping the virtual address of the at least one context-specific symbol to both a physical address associated with the first processing core and a physical address associated with the second processing core.

Abstract: Methods and structure for resuming background tasks in a storage environment. storage controller. The system is operable to receive host Input/Output (I/O) requests directed to a logical volume, and to couple with one or more of storage devices provisioning the logical volume. The system is further operable to process the host I/O requests directed to the logical volume, to initiate a background processing task distinct from the host I/O requests and related to the logical volume, and to store progress information on at least one of the one or more storage devices describing progress of the background processing task.