Abstract: A method identifies the cause of poor correlation between an integrated circuit model and measured integrated circuit performance. The method includes determining the propagation delays through two separate integrated circuit components. The propagation delays are then compared to each other to identify the cause of the poor correlation.

Abstract: A composite layer of low k dielectric material for integrated circuit structures comprising a thick lower conformal barrier layer of low k dielectric material, a low k center layer of carbon-doped silicon oxide dielectric material having good gap filling capabilities, and a thick upper conformal barrier layer of low k dielectric material. The thick lower conformal barrier layer of low k dielectric material protects the lower surface of the main low k dielectric layer and also protects against misaligned vias entering the main low k dielectric material below the height of the metal line without raising the capacitance of the structure as would a lower barrier layer of non-low k dielectric material.

Abstract: An optical disk system is presented which stores disk- and user-specific settings, along with an associated method. The optical disk system includes a disk drive unit for retrieving identification data and encoded video data stored upon an optical disk, an input device for inputting user settings, and a microprocessor memory unit having a non-volatile portion for storing the identification data and the user settings. Information specific to optical disks (e.g., DVDs) and users is stored within the non-volatile portion of the microprocessor memory unit. The user settings may include, for example, spoken language, video display format, audio volume setting, and subtitle language. The user settings may be retrieved and invoked, conveniently allowing a user to view a presentation (e.g., a movie), or to continue viewing an interrupted presentation, without having to reselect viewing and listening preferences. The identification data may include a portion of a title of the optical disk.

Abstract: A multiple layer mesh design that provides that a bridge associated with a second layer connects a rail on a first layer to a trunk on a fourth layer. If the trunk on the third layer shadows a plurality of rails on the first layer, preferably the bridge is at least as wide as a sum of the widths of the rails on the first layer which are shadowed by the trunk on the third layer. If the trunk on the third layer shadows a single rail on the first layer, preferably the bridge is at least as wide as twice the width of the rail on the first layer.

Abstract: A programmable substrate and a method of making a programmable substrate for use with array-type packages, including Ball Grid Arrays(BGA), Pin Grid Arrays (PGA) and Column Grid Arrays (CGA) includes a nonconductive programmable substrate with a cavity in the top of the substrate. The cavity is sized to receive an integrated circuit (IC) die. An array of electrically conductive vias pass through the substrate. A plurality of electrical traces are formed on the top of the substrate. The traces extend radially from an edge of the die cavity to the periphery of the substrate so as to pass between and near the vias. Each trace is electrically connected to a pad of the IC die by a wire bond. Each via is connected on a bottom surface of the substrate to a solder ball, pin, or other means for electrically and mechanically attaching the substrate to a printed circuit board. The traces are programmably connected to a selected via, e.g.

Abstract: A system and method for monitoring and managing devices on a network. The system and method preferably comprises a proxy server connected to the network and a managed device connected to the proxy server. The system further comprises storage means for storing a device management application program associated with the managed device, and a management station in communication with the managed device via the proxy server and in communication with the storage means. The management station preferably is configured to retrieve the device management application program from the storage means and process the device management application program. As the management station processes the device management application program, the management station is able to monitor and manage the managed device.

Abstract: A molded tape ball grid array package includes a molding compound and a tape substrate having a top surface for mounting a die thereon, a bottom surface for attaching solder balls, and vias for forming connections between the solder balls and the die wherein the molding compound surrounds the die and the tape substrate.

Abstract: A planarization process for an integrated circuit structure which inhibits or prevents cracking of low k dielectric material which comprises one of one or more layers of dielectric material formed over raised portions of the underlying integrated circuit structure. Prior to the planarization step, a removable mask is formed over such one or more dielectric layers formed over raised portions of the integrated circuit structure. Openings are formed in the mask to expose a portion of the upper surface of the one or more dielectric layers in the region over at least some of these raised portions of the integrated circuit structure. Exposed portions of the underlying one or more dielectric layers are then etched through such openings in the mask to reduce the overall amount of the one or more dielectric layers overlying such raised portions of the integrated circuit structure.

Abstract: A method for creating a highly reflective surface on an electroplated conduction layer. A barrier layer is deposited on a substrate using a self ionized plasma deposition process. The barrier layer has a thickness of no more than about one hundred angstroms. An adhesion layer is deposited on the barrier layer, using a self ionized plasma deposition process. A seed layer is deposited on the adhesion layer, also using a self ionized plasma deposition process, at a bias of no less than about one hundred and fifty watts. The combination of the barrier layer, adhesion layer, and seed layer is at times referred to herein as the barrier seed layer. The conduction layer is electroplated on the seed layer, thereby forming the highly reflective surface on the conduction layer, where the highly reflective surface has a reflectance of greater than about seventy percent.

Abstract: A data transmission circuit for transmitting a data stream includes a voltage supply terminal, a resistively terminated, controlled-impedance transmission line and an inductor coupled between the voltage supply terminal and the controlled-impedance transmission line.

Abstract: A method of applying a layer of a flowable material to a substrate. The substrate is received with a rotatable chuck, and an amount of the flowable material is dispensed on to the substrate. The substrate is spun on the rotatable chuck, thereby spreading the flowable material across the substrate and conveying a surplus amount of the flowable material away from the substrate. An exhaust stream is created with a vacuum source. At least a portion of the surplus amount of the flowable material conveyed away from the substrate is entrained into the exhaust stream, which exhaust stream is conveyed into an exhaust system. A pressure drop is created in the exhaust stream across a vane anemometer within the exhaust system. The blow back of the entrained portion of the surplus amount of the flowable material from a downstream position in the exhaust system to the substrate is thereby reduced.

Abstract: Methods and apparatus are disclosed for inserting buffers into the design of an integrated circuit with a high fanout net. If a net has a ramptime violation, all of the driven elements in the net are clustered in such a manner that the total load (capacitance) of the driver decreases. Clustering is based upon a two-dimensional partitioning approach together with three proposed heuristics (expand, shrink and merge), which iteratively partitions the placement regions of the net such that the number of buffers to be inserted and the level of inserted buffer tree are minimized. After clustering, one buffer is inserted for each cluster created in the clustering operation. Each of the inserted buffers drives its corresponding cluster. The buffers that are inserted will not have any ramptime violation, which ensures converge of the buffer insertion scheme. Therefore, each insertion of a level of buffers reduces the overall ramptime of the net.

Abstract: A Reed-Solomon decoder capable of correcting two symbol errors in a codeword of a Reed-Solomon RS(128,122,7) code over a Galois field GF(128) is provided. In an exemplary embodiment, the Reed-Solomon decoder is suitable for use in cable modems with little or no loss in error performance over Reed-Solomon decoder correcting three errors in a codeword.

Abstract: An improved tape substrate design for a semiconductor package is disclosed. The tape substrate semiconductor package includes a plurality of die pads, a plurality of vias, and a pattern of metal traces interconnected between the die pads and the vias to form circuitry on the tape substrate. According to the method and apparatus of the present invention an extra metal layer is added at the circuitry to increase rigidity of the tape substrate, thereby reducing warpage without adding to the thickness of the tape substrate package.

Abstract: An integrated circuit structure is provided with a local interconnect layer and a first metal interconnect layer which are both capable of bridging over underlying conductive regions. The structure comprises a first dielectric layer formed to a height or thickness equal to or preferably exceeding the height of the highest conductive regions of the underlying integrated circuit devices; a second dielectric layer formed above the first dielectric layer; one or more local interconnects formed in the second dielectric layer; and a thin third dielectric layer formed over the second dielectric layer and the local interconnects therein. The thin third dielectric layer has a thickness not exceeding about 2000 Å, and preferably ranging from about 1000 Å to about 1500 Å. A first layer of metal interconnects is formed over the thin third dielectric layer.

Abstract: An RTL description, such as a Verilog description, of an integrated circuit is derived from a C/C++ description by defining the integrated circuit as a generalized multiplexer having outputs and two groups of input variables X1, X2, . . . , Xs and Y1, Y2, . . . , Yn in which each variable X1, X2, . . . , Xs, is fixed and no output depends on more than one variable of Y1, Y2, . . . , Yn. An output vector is constructed by Exclusive-OR operations to find an index j for UU1=(BIT(0,j), BIT(1,j), . . . , BIT(K−1),j)). The Verilog description of the circuit is a function of the solution of the output vector, or a constant.

Abstract: According to an embodiment of the present invention, an input signal is provided to an oscillator, which creates a count signal with a greater frequency than the input signal. The input signal triggers the oscillator to oscillate depending on the value of the input signal. The oscillator output is provided to a counter, which counts the number of oscillations undergone by the oscillator during a single period of the input signal or a number of periods of the input signal, whichever is desired. Since the oscillator frequency is greater than the frequency of the input signal, the oscillator effectively acts like a clock to time the input signal; the counter effectively acts to record the ‘time’ measured by the oscillator (clock). More formally, the counter generates a count value based upon the width of the input signal pulses. The counter output is provided to a decoder, which interprets the count generated by the counter.

Abstract: Methods and associated systems using probabilistic methods for selecting among a plurality of diagnostic procedures to recover from an error condition in a managed device. Operation of a managed device is overseen by a management device. A management client process operable within the management device communicates with a management service operable within the managed device. Upon detection of an error condition within the managed device, the management service propagates an event to the management client so indicating an error condition. The management client in the management device responds to the event by requesting the managed device to determine the best options for recovery procedures. The managed device then computes a probability of success for each known recovery procedure based upon the present state of the managed device and based upon past successes or failures of recovery procedures for particular error conditions.

Abstract: A method of forming junctions in a semiconductor substrate, where a gate dielectric layer is grown on the semiconductor substrate, a gate electrode layer is deposited on the gate dielectric layer, and a sacrificial layer is formed on the gate electrode layer. The sacrificial layer is patterned with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer. The exposed portions of the sacrificial layer are etched to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer. The exposed portions of the gate electrode layer are etched to expose portions of the gate dielectric layer and form a gate electrode having exposed vertical faces. The sacrificial layer and the exposed portions of the gate dielectric layer are impregnated with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer.

Abstract: A method for fabricating an SRAM device having a standard well tub, where an additional well tub is deposited within the standard well tub. In this manner, the dopant concentration is increased in the well area of the SRAM device, which increases both the isolation punchthrough tolerance and the SER immunity of the device. The additional well tub is deposited to a depth that is shallower than the standard well tub. The additional well tub is deposited using an ion implantation process using the same mask set as that used for the threshold voltage adjustment deposition. Thus, no additional mask layer is required to deposit the additional well tub, and the all of the expenses normally associated with an additional mask layer are avoided.