Patents Assigned to LSI
  • Pump system and method for operating the same
    Patent number: 9007006
    Abstract: Provided is a pump system. The pump system includes an AC (alternating current) electric motor, a converter, a smoothing unit, an inverter, a volt/hertz pulse width-modulation controller, and a main controller. The AC electric motor operates a pump which is a load. The converter receives AC power and converts the AC power into DC (direct current) power. The smoothing unit smoothes a DC voltage converted by the converter. The inverter converts the DC voltage output from the smoothing unit into an AC voltage. The volt/hertz pulse width-modulation controller applies switching voltage to a semiconductor switching device of the inverter. The main controller changes an operating frequency according to a load detected when the Ac electric motor is in operation and puts the AC electric motor to a sleep mode after determining a load operation status.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: April 14, 2015
    Assignee: LSIS Co., Ltd.
    Inventor: Hong Min Yun
  • Intelligent data buffering between interfaces
    Patent number: 9009370
    Abstract: A dynamically controllable buffering system includes a data buffer that is communicatively coupled between first and second data interfaces and operable to perform as an elasticity first-in-first-out buffer in a first mode and to perform as a store-and-forward buffer in a second mode. The system also includes a controller that is operable to detect data rates of the first and second data interfaces, to operate the data buffer in the first mode when the first data interface has a data transfer rate that is faster than a data transfer rate of the second data interface, and to operate the data buffer in the second mode when the second data interface has a data transfer rate that is faster than the data transfer rate of the first data interface.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 14, 2015
    Assignee: LSI Corporation
    Inventors: Richard Solomon, Eugene Saghi, John C. Udell
  • Methods and systems for instantaneous online capacity expansion
    Patent number: 9009405
    Abstract: The disclosure provides instantaneous, vertical online capacity expansion (OCE) for redundant (e.g., RAID-5, RAID-6) and non-redundant (e.g., RAID-0) arrays. The new OCE technique implements vertical expansion instead of the horizontal expansion techniques implemented in current OCE techniques. The vertical expansion treats any new addition of storage as an extension of the capacity of the preexisting physical drives in order to avoid having to rewrite the data blocks of the original, preexisting storage devices. Vertical RAID expansion is implemented by installing one or more new physical storage devices in a device or partition configuration that corresponds to the physical configuration of the preexisting volume and loading new metadata received through the user interface into the firmware of the RAID controller to define the configuration of the expanded volume.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: April 14, 2015
    Assignee: LSI Corporation
    Inventor: Kapil Sundrani
  • Adjustment of data storage capacity provided by a storage system
    Patent number: 9009440
    Abstract: A storage system stores data in at least one partition of a physical storage media in accordance with file system information specifying a plurality of logical blocks having logical block addresses within the partition. The logical blocks include excess logical blocks that are not mapped to space in the physical storage media by the mapping employed by the storage system. Unusable block data marks those excess logical blocks as unusable. This makes it easy to adjust the data storage capacity of the storage system by changing the mapping to map more or less logical block addresses to space in the physical storage media and thereby destroy or create excess logical blocks, and by changing the unusable block data to correspondingly change the excess logical blocks marked as unusable.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: April 14, 2015
    Assignee: LSI Corporation
    Inventors: Duncan Beadnell, Don Harwood
  • Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding
    Patent number: 9007828
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: April 14, 2015
    Assignee: LSI Corporation
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • ADAPTIVE POWER-DOWN OF DISK DRIVES BASED ON PREDICTED IDLE TIME
    Publication number: 20150100810
    Abstract: Systems and methods presented herein provide a storage system that adaptively powers-down one or more disk drives based on the predicted idle time of each disk drive. One embodiment includes a storage controller that includes a processor operable to track idle durations of the disk drive. When an idle duration ends, the processor associates the idle duration with a time window that includes that idle duration. Each time window is associated with a number of previous idle durations of the disk drive. Upon detection of a current idle duration, the processor identifies a time window with the highest number of previous idle durations of the disk drive. Then, the processor determines whether a maximum time associated with the identified time window exceeds a predetermined threshold. When the maximum time exceeds the predetermined threshold, the processor powers-down the disk drive.
    Type: Application
    Filed: February 5, 2014
    Publication date: April 9, 2015
    Applicant: LSI CORPORATION
    Inventors: Dipu Sreekumaran, Arun Chandrashekhar
  • VOLTAGE FOLLOWER HAVING A FEED-FORWARD DEVICE
    Publication number: 20150097611
    Abstract: A circuit is described that includes a voltage follower device and a feed-forward device. In an implementation, the circuit includes a voltage follower device that includes an input and an output. The voltage follower device is configured to transfer a voltage signal at least substantially unchanged from the input to the output of the voltage follower device. The circuit also includes a feed-forward device that includes an input and an output. The input of the feed-forward device is connected to the input of the voltage follower device and the output of the feed-forward device is connected to the output of the voltage follower device. The feed-forward device is configured to output the voltage signal to the output of the voltage follower device.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 9, 2015
    Applicant: LSI Corporation
    Inventor: Ryutaro Saito
  • System and method for power saving modes in multi-sensor magnetic recording
    Patent number: 9001446
    Abstract: A system and method for power management in a hard disk drive (HDD) assembly incorporating two or more read sensors includes directing a read/write head to follow a track; depowering one or more read sensors and readpath circuits associated with the read sensors; reading an analog readback signal through the first read sensor; processing the signal through an analog front-end to generate an input signal; sampling the input signal through an analog to digital converter at a first frequency to generate a first sampling signal; sampling the input signal through a second analog to digital converter at a second frequency to generate a second sampling signal; and generating a digital output signal from either or both sampling signals at a third sampling frequency through a digital signal processor. The method may additionally comprise adjusting a sampling frequency when power level reaches a threshold.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: April 7, 2015
    Assignee: LSI Corporation
    Inventors: Bruce A. Wilson, Richard Rauschmayer, Peter J. Windler, Jefferson E. Singleton, Shaohua Yang, Jeffrey P. Grundvig
  • Multiple sync mark storage system
    Patent number: 9001445
    Abstract: A data processing system includes a number of analog to digital converters operable to sample analog signals obtained from a magnetic storage medium to yield digital signals, multiple sync mark detectors operable to search for a number of different sync marks in the digital signals, and a sync mark detector output comparator operable to compare an output of each of the sync mark detectors to identify detection errors.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: April 7, 2015
    Assignee: LSI Corporation
    Inventors: Rui Cao, Haitao Xia, Lu Lu
  • Encoder and decoder generation by state-splitting of directed graph
    Patent number: 9003263
    Abstract: A method of generating a hardware encoder includes generating a first directed graph characterizing a constraint set for a constrained system, identifying a scaling factor for an approximate eigenvector for the first directed graph, applying the scaling factor to the approximate eigenvector for the first directed graph to yield a scaled approximate eigenvector, partitioning arcs between each pair of states in the first directed graph, performing a state splitting operation on the first directed graph according to the partitioning of the arcs to yield a second directed graph, and generating the hardware encoder based on the second directed graph.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: April 7, 2015
    Assignee: LSI Corporation
    Inventors: Razmik Karabed, Shaohua Yang, Wu Chang, Victor Krachkovsky
  • Non-Binary Layered Low Density Parity Check Decoder
    Publication number: 20150092290
    Abstract: A non-binary layered low density parity check decoder includes a variable node processor operable to generate variable node to check node messages and to calculate perceived values based on normalized check node to variable node messages and on normalized decoder inputs, and to output normalized decoded values, and a check node processor operable to generate the check node to variable node messages based on normalized variable node to check node messages.
    Type: Application
    Filed: November 3, 2013
    Publication date: April 2, 2015
    Applicant: LSI Corporation
    Inventors: Dan Liu, Qi Zuo, Chung-Li Wang, Zongwang Li, Lei Wang
  • METHOD FOR AUTOMATICALLY SETTING ID IN UART RING COMMUNICATION
    Publication number: 20150095536
    Abstract: Disclosed is a method for automatically setting ID in UART ring communication in which a master and a plurality of slaves are formed in a ring-type network, the method including initializing the master to output a master ID (initializing step), receiving, by the plurality of slaves, the master ID, setting its own IDs by adding the master ID to a reference value and outputting the set ID (slave ID setting step), changing, by the plurality of slaves, its own IDs based on whether its own ID is same as the received ID, receiving, by the master, the IDs outputted by the plurality of slaves, and changing a currently highest value of slave IDs stored in the master in response to values of received slave IDs (changing step), and finishing the ID setting or re-setting the slave IDs, in response to the Current Max Slave ID (finish determining step).
    Type: Application
    Filed: September 23, 2014
    Publication date: April 2, 2015
    Applicant: LSIS CO., LTD.
    Inventor: BONG KI LEE
  • FLASH MEMORY REFERENCE VOLTAGE DETECTION WITH TRACKING OF CROSS-POINTS OF CELL VOLTAGE DISTRIBUTIONS USING HISTOGRAMS
    Publication number: 20150092489
    Abstract: Cross-points of flash memory cell voltage distributions are determined by reading data from a portion of the flash memory two or more times using two or more different candidate reference voltages and determining corresponding decision patterns. The frequency of occurrence of the decision patterns in the data read from the flash memory is used to conceptually construct a histogram. The histogram is used to estimate the cross-points. Employing decision patterns enables multiple cross-point voltages to be determined with a minimum of read operations.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 2, 2015
    Applicant: LSI Corporation
    Inventors: Yunxiang Wu, Abdel-Hakim Alhussien, Zhengang Chen, Sundararajan Sankaranarayanan, Erich F. Haratsch
  • REDUCING CURRENT VARIATION WHEN SWITCHING CLOCKS
    Publication number: 20150091620
    Abstract: An apparatus includes a glitchless divider and a glitchless multiplexer. The glitchless divider may be configured to generate a first system clock in response to a divider value and a clock signal received from a first source. The divider value changes from a first value to a second value in a predetermined number of steps. The glitchless multiplexer may be configured to select between said first system clock and a second system clock in response to a control signal.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 2, 2015
    Applicant: LSI Corporation
    Inventor: Steven J. Pollock
  • Low density parity check decoder with miscorrection handling
    Patent number: 8996969
    Abstract: A data processing system includes a decoder circuit, syndrome calculation circuit and hash calculation circuit. The decoder circuit is operable to apply a decoding algorithm to a decoder input based on a first portion of a composite matrix to yield a codeword. The syndrome calculation circuit is operable to calculate a syndrome based on the codeword and on the first portion of the composite matrix. The hash calculation circuit is operable to calculate a hash based on a second portion of the composite matrix. The decoder circuit is also operable to correct the codeword on the hash when the syndrome indicates that the codeword based on the first portion of the composite matrix is correct but a second test indicates that the codeword is miscorrected.
    Type: Grant
    Filed: December 8, 2012
    Date of Patent: March 31, 2015
    Assignee: LSI Corporation
    Inventors: Anatoli A. Bolotov, Shaohua Yang, Zongwang Li, Mikhail I Grinchuk, Lav D. Ivanovic, Fan Zhang, Yang Han
  • Servo system with signal to noise ratio marginalization
    Patent number: 8995072
    Abstract: A servo system includes a detector circuit operable to apply a data detection algorithm to digital data to yield hard decisions, a convolution circuit operable to yield ideal digital data based on the hard decisions and on target values, a subtraction circuit operable to subtract the ideal digital data from the digital data to yield an error signal, a scaling circuit operable to scale the error signal to yield a scaled noise signal, an adder operable to add the scaled noise signal to the digital data to yield noise-added digital data, and a second detector circuit operable to apply a second data detection algorithm to the noise-added digital data to yield output hard decisions.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: March 31, 2015
    Assignee: LSI Corporation
    Inventors: Dahua Qin, Xun Zhang, Lu Lu, Haitao Xia, Jianzhong Huang
  • Apparatus and method for energy management
    Patent number: 8996184
    Abstract: Provided are an apparatus and a method for energy management. The energy management apparatus includes: a receiving block configured to receive energy use information from at least one sensor; and an estimating block configured to calculate a sum and change of energy use per predetermined time slot from the received energy use information and estimate energy use or energy charge after a certain time based on the calculation of the sum and the change. The method includes: receiving energy use information from at least one sensor; and calculating a sum and change of energy use per hour from the received energy use information and estimating energy use or energy charge after a certain time slot based on the calculation of the sum and the charge.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: March 31, 2015
    Assignee: LSIS Co., Ltd.
    Inventors: Dong Min Son, Jae Seong Park, Jung Hwan Oh
  • Method and apparatus for high density pulse density modulation
    Patent number: 8995521
    Abstract: A method and system for high density pulse density modulation is disclosed. In accordance with the present disclosure, a modulation function is split in to two band limited streams using a complementary pair of non-linear functions. More specifically, one bitstream definition contains the peaks of the original function while the other bitstream contains a soft clipping version of the original bitstream. The bitstreams are applied to a pair of switching amplifiers, and the bitstreams can be combined again to reconstruct the original function. The method in accordance with the present disclosure limits the amount of input power necessary to achieve higher output power, lowers operating voltage and improves power amplifier efficiency.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: March 31, 2015
    Assignee: LSI Corporation
    Inventors: Donald R. Laturell, Said E. Abdelli, Peter Kiss, James F. MacDonald, Ross S. Wilson, Kameran Azadet
  • LDPC decoder trapping set identification
    Patent number: 8996971
    Abstract: The present inventions are related to systems and methods for detecting trapping sets in LDPC decoders, and particularly for detecting variable nodes in trapping sets in a non-erasure channel LDPC decoder.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 31, 2015
    Assignee: LSI Corporation
    Inventors: Fan Zhang, Anatoli A. Bolotov, Lav D. Ivanovic
  • Lighting fixture
    Patent number: D726947
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: April 14, 2015
    Assignee: LSI Industries, Inc.
    Inventors: John D. Boyer, Earl G. Boertlein, II, Larry A. Akers, James P. Sferra, James G. Vanden Eynden