Abstract: A storage system and method for preventing propagation of link reset among initiators in the storage system is disclosed. The method includes issuing a link reset command by the initiator, and entering the initiator into a back-off period immediately following the issuing of the link reset command. The initiator remains idle for the entire duration of the back-off period and resumes its operations at the end of the back-off period.

Abstract: Various systems and methods for media defect detection.

Abstract: Disclosed are an electric vehicle (EV), an EV charging stand, and a communication system therebetween, the EV including a charge control unit configured to detect a preparation state for charging a battery and output a resistance varying signal according to the detected state, and a resistor unit configured to vary a resistance value in response to the resistance varying signal, thus changing a voltage value of a state signal transmitted to the EV charging stand, and the EV charging stand including a comparator configured to receive a stage signal from the EV, compare a voltage value of the received state signal with a reference value, and output a signal in response to a result of comparing, and a control unit configured to receive the signal from the comparator and detect a preparation state for charging the battery of the EV.

Abstract: Various embodiments of the present invention provide apparatuses and methods for filtering a digital signal with a Nyquist constrained digital finite impulse response filter. For example, an apparatus for filtering digital data is disclosed that includes a digital finite impulse response filter having a plurality of taps. The apparatus also includes a tap weight controller connected to the digital finite impulse response filter, operable to adjust a tap weight for each of a subset of the taps such that a magnitude of a Nyquist response of the digital finite impulse response filter remains within a constraint range.

Abstract: A method of calibrating data slicer-latches in a receiver to remove offset errors in the slicer-latches. A known voltage is applied to all but one of the inputs of the slicer-latch. The remaining input receives an offset cancelation voltage from a DAC is stepped upward from a minimum voltage until the slicer-latch output transitions by incrementing a codeword to the DAC and the codeword that resulted the transition is saved. Then the offset cancelation voltage is swept downward in steps from a maximum voltage until the slicer-latch output transitions and the codeword that caused the transition is averaged with the stored codeword. The average of the codewords is applied to the DAC to generate the offset cancelation voltage used during normal operation of the receiver.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for recovering data from a solid state memory.

Abstract: The disclosure is directed to a system and method of determining signal quality based upon at least one of: a comparison of energy content of the signal to a threshold energy content, a comparison of energy content of the fundamental harmonic of the signal to a specified percentage of the energy content of the signal, and a comparison of a difference between phase of the signal and a target phase to a threshold phase difference.

Abstract: Methods and structure for utilizing a Solid State Drive (SSD) to enhance boot time for a computer. The computer includes an SSD that stores a boot cache for an Operating System of a computer, a Hard Disk Drive that stores the Operating System, and a processor. The processor is able to load an interrupt handler that intercepts Input/Output requests directed to the Hard Disk Drive prior to loading a kernel of the Operating System. The interrupt handler is able to determine whether each intercepted request can be serviced with data from the boot cache, and to redirect a request to the SSD instead of the Hard Disk Drive if the request can be serviced with data from the boot cache.

Abstract: A storage system includes a plurality hard disk drives and a plurality of solid-state drives and a storage controller operable to manage the hard disk drives and solid-state drives as a plurality of logical volumes, and categorize input/output requests to the logical volumes into types based on sizes of the input/output requests (e.g., smaller and larger). The storage controller is also operable to reconfigure the logical volumes from the hard disk drives and the solid-state drives based on the types of the input/output requests to the logical volumes. A first of the reconfigured logical volumes occupies a first portion of at least one of the solid-state drives and a first portion of at least one of the hard disk drives. The storage controller is further operable to direct the first type of the input/output requests to the first portion of the solid-state drive occupied by the first reconfigured logical volume.

Abstract: A method of controlling a ping-pong buffer includes selectively providing one of a ping gated write clock signal and a ping gated read clock signal to a single-port ping buffer, and selectively providing a pong gated write clock signal or a pong gated read clock signal to a single-port pong buffer. A controller of a ping-pong buffer includes a ping multiplexer and a pong multiplexer. The ping multiplexer selectively provides a ping gated write clock signal or a ping gated read clock signal to a single-port ping buffer. The pong multiplexer selectively provides a pong gated write clock signal or a pong gated read clock signal to a single-port pong buffer. A ping-pong buffer system includes a ping buffer, a pong buffer, a ping multiplexer, and a pong multiplexer. The ping buffer and pong buffer each include a single-port memory.

Abstract: One embodiment is an apparatus that has a memory array, a discharge device, and a discharge assistance controller. The memory array has memory cells arranged in at least one column that is coupled to a read bit line, and the discharge device is configured to provide discharge assistance to the read bit line. The discharge assistance controller is configured to modify duration of the discharge assistance in correlation with capacitance of the read bit line.

Abstract: Methods, systems and processor-readable media are disclosed for implementing a “smart” discovery process in a data transfer regime having one or more expanders and one or more initiators. Data traffic associated with such a discovery process can be reduced and one or more of the initiators can be prevented from blocking input/output to particular components in communication with the data transfer regime, thereby improving and completing the discovery process in an optimal time frame while enhancing the performance of the initiator(s).

Abstract: Provided is a relay dualization apparatus, in a substation automation system including at least one or more upper units and at least one or more lower units, the apparatus including a plurality of first relays receiving a power data from the lower unit using a predetermined communication method, and transmitting the power data to the upper unit, and receiving a control command from the upper unit and transmitting the control command to the lower unit, and a second relay performing communications with the plurality of first relays using the communication method to replace a relay that has generated an error in the plurality of relays.

Abstract: A method of manufacturing a through-substrate-via structure. The method comprises providing a substrate having a front-side and an opposite back-side. A through-substrate via opening is formed in the front-side of the substrate. The through-substrate-via opening does not penetrate an outer surface of the back-side of the substrate. The through-substrate-via opening is filled with a solid fill material. Portions of the substrate from the outer surface of the back-side of the substrate are removed to thereby expose the fill material. At least portions of the exposed fill material are removed to form a back-side through-substrate via opening that traverses an entire thickness of the substrate. The back-side through-substrate via opening is filled with an electrically conductive material.

Abstract: A circuit and method for dynamically changing trip point voltage in a sensing inverter circuit. In one embodiment, the sensing inverter circuit includes: (1) a base inverter circuit couplable to logic-high and logic-low voltage sources at respective inputs thereof and configured to transition an output thereof from a previous logic-level voltage to a present logic-level voltage based on a logic value of an input voltage received by the base inverter circuit, and (2) a feedback circuit associated with the base inverter circuit and configured to employ the previous logic-level voltage to decouple one of the logic-high and logic-low voltage sources from one of the inputs and thereby shift a trip voltage of the base inverter circuit toward the input voltage.

Abstract: A method for encoding a reduced polar code is disclosed. The method generally includes steps (A) to (C). Step (A) may generate the intermediate codeword by polar code encoding input data. Step (B) may remove one or more bits from one of (i) a first part of the intermediate codeword and (ii) a second part of the intermediate codeword. Step (C) may generate an output codeword by concatenating the first part of the intermediate codeword with the second part of the intermediate codeword after the bits are removed.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for combining recovered portions of a data set.

Abstract: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory may comprise a plurality of memory modules each having a size less than a total size of the memory. The controller may be configured to write user data using a redundancy scheme. Information about the redundancy is (i) stored in a location separate from the data and (ii) used to recover potentially corrupted user data.

Abstract: An apparatus comprising a classification block, a pattern generator block, a hash key block and a replacement block. The classification block may be configured to (i) receive a data signal and (ii) identify a portion of the data signal that contains a duplicated data pattern. The pattern generation block may be configured to generate a common continuous pattern of data in response to the data signal. The hash key block may be configured to generate a hash key representing the duplicated data pattern. The replacement block may be configured to replace the duplicated data pattern with the hash key.

Abstract: There is provided a circuit breaker including a heater configured to generate heat due to a conduction current induced to a moving contact of the circuit breaker; a bimetal configured to be deformed due to heat generated by the heater to separate a contact point of the moving contact; a magnet configured to generate a magnetic force to move an amateur bar when a current above a previously set reference current is induced; and a trip case configured to accommodate the bimetal and magnet, at least part of which is made of a synthetic resin material, a magnetic fixing portion integrally formed in the trip case, and made of a synthetic resin material; a magnet fixing means configured to fasten the magnet to the magnet fixing portion; and a bimetal fixing means configured to fix the bimetal to the heater.