Abstract: An active inductor circuit includes a field-effect transistor having a first source/drain adapted for connection with a first voltage source, a capacitor coupled between the first voltage source and a gate of the field-effect transistor, a resistor coupled between a second source/drain of the field-effect transistor and the gate of the field-effect transistor, and a current source coupled with the gate of the field-effect transistor. A voltage headroom of the active inductor circuit is controlled as a function of at least one of a magnitude of current generated by the current source and a resistance of the resistor.

Abstract: A method and system for providing format savings in data sectors. The method includes receiving a signal outputted from an analog-to-digital conversion circuit. The method further includes shifting a signal phase of the signal based at least upon a corrected phase at an output of a phase loop and a phase measured when the signal was digitally sampled by the analog-to-digital conversion circuit. The method also includes adjusting a gain of the signal based at least upon a current gain loop correction and a gain correction made when the signal was digitally sampled by the analog-to-digital conversion circuit. Additionally, the method includes adjusting the signal based at least upon an output of a current offset correction and an offset correction made when the signal was digitally sampled by the analog-to-digital conversion circuit. The method also includes outputting an adjusted signal to a sync mark detector.

Abstract: Embodiments provide a device and method for processing messages according to a priority order and for reducing a message processing time when a response event occurs, in a PLC communication module.

Abstract: A data interface is provided for point-to-point communications between two devices, such as a read channel and a disk controller in an HDD system. An interface for communications from a transmitting device to a receiving device comprises a data bus configured to communicate m bits of data and a corresponding n bit data tag, wherein a given n bit data tag identifies a data type of a corresponding m bits of data on the data bus. An acknowledge signal from the receiving device optionally indicates that data on the data bus has been received and that the data on the data bus can be changed to a new value. A valid flag optionally indicates when a new predefined m-bit data value and corresponding n-bit tag value are on the data bus.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for characterizing a solid state memory.

Abstract: An apparatus includes a storage medium and a controller. The storage medium generally stores user data in logical pages. The controller may be configured to encrypt and decrypt user data during write and read operations, respectively. The user data is generally in a plurality of data bands. Each data band is encrypted and decrypted using a unique media encryption key. When a boundary between a pair of data bands is within a logical page, the controller may be configured to create two logical page instances, a first logical page instance storing data from a first data band of the pair of data bands and a second logical page instance storing data from a second data band of the pair of data bands. The first and second logical page instances are encrypted and decrypted using the unique media encryption key of the first and second data bands, respectively.

Abstract: The apparatus for diagnosing malfunction of a high voltage relay includes: first and second relays configured to connect or disconnect a battery and a circuit using the battery as a power source in each electrode; a voltage measuring unit configured to measure a first voltage between a battery side terminal or a circuit side terminal, among terminals of the first relay, and a circuit side terminal or a battery side terminal, among terminals of the second relay, and measure a second voltage between the battery side terminals or between the circuit side terminals; and a controller configured to determine whether the first or second relay malfunctions based on the first and second voltage values measured by the voltage measuring unit by controlling connection and disconnection of the first or second relay.

Abstract: The present invention is related to systems and methods for data storage compression.

Abstract: A motor starter system and a method for operating same are disclosed. According to an embodiment of the present invention, reliability of a motor protection function during an overcurrent is improved by automatically controlling the on/off state of an electromagnetic contactor using an analog sensor value outputted from an external sensor. In addition, the present invention can receive an external sensor value through a connected upper monitoring device, monitor, in real time, the motor starter state, and transmit a control command for directly controlling the on/off state of the electromagnetic contactor, and thus enables excellent operation, integrated lifetime prediction, and motor load management. Furthermore, the present invention can reduce wiring work and a cost thereof and maximizing the use of space more than when controlling the electromagnetic contactor by using the I/O of a PLC.

Abstract: Aspects of the disclosure pertain to methods and systems that are configured to monitor data usage at a network edge. In an implementation, a method includes monitoring data usage information associated with a mobile user session between a mobile device and a plurality of edges nodes of a communication network, where the plurality of edge nodes includes at least a beginning edge node and a final edge node. The method also includes storing data usage information from the monitored data usage information, the stored data usage information including data associated with the transfer of cached data stored at the plurality of edge nodes. The method further includes forwarding the stored data access information to a central database of the communication network.

Abstract: A phase compensation apparatus in an inverter output voltage in a system is provided, whereby performance of an inverter can be enhanced by compensating a time delay of measured voltage of inverter output voltage detection unit.

Abstract: A recycling method for a solid state drive is disclosed. The method includes selecting a logical block for recycle wherein the logical block includes a plurality of pages across a plurality of flash dies. The method also includes retrieving an address map index record associated with the logical block selected for recycle. For each particular address map index stored in the address map index record, the recycling method retrieves a set of address map entries referenced by the particular address map index, determines whether any page in the logical block is referenced by the set of address map entries, and if at least one page in the logical block is referenced by the set of address map entries, the method writes the at least one page to a different logical block. The method further includes erasing the plurality of pages in the logical block.

Abstract: A system and method for servers to belong to a cascaded cluster of nodes (or servers) is disclosed. Servers share storage in common without the need of an external element such as a switch and or external storage device. SAS technology is used with direct attached drives in each node, and connections between each node, to emulate a SAN environment through a cascaded SAS topology. SAS HBAs each containing an SAS expander, connect elements internal to each server with elements external to each. This cascaded DAS clustering enables bi-directional traffic from each server in the cluster to all other servers and their attached drives.

Abstract: A test pattern is encoded using a run length limited line encoding to produce an encoded block of data. The encoded block of data is sent via a channel. A plurality of bits in the received block of data that are subsequent to a maximum length run in the sent data is compared to an expected plurality of bits. A type of bit error is classified based on a mismatch between the expected plurality of bits and the plurality of bits in the received block of data.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for detecting patterns in a data stream. In one case, a data processing system is disclosed that includes: a pattern detector circuit operable to generate a pattern value based upon a comparison of a defined pattern to a first portion of a received input; and a comparator circuit operable to compare the pattern value to an adapted threshold, and to selectively assert a pattern found signal based at least in part on the comparison of the pattern value and the adapted threshold, where the adapted threshold is adjusted based at least in part on a noise component of a second portion of the received input.

Abstract: The present inventions are related to systems and methods for information data processing included selective decoder message determination. In one example, a data processing system is disclosed that includes a data decoder circuit operable to apply a conditional data decoding algorithm to a data set to yield a decoded output. The conditional decoding algorithm is operable to calculate node messages using an approach selected from a group consisting of: a first message determination mechanism, and a second message determination mechanism; where one of the first message determination mechanism and the second message determination mechanism is selected based upon a condition that includes a global iteration count applied to the data set.

Abstract: A method for detecting an information pattern includes obtaining a first sample stream and a second sample stream. The first sample stream and the second sample stream are obtained by sensing recorded information at a target location of a storage medium using a first sensor and a second sensor, respectively. A first metric is computed by comparing the first sample stream to a reference pattern representative of a target information pattern to be detected. A second metric is computed by comparing the second sample stream to the reference pattern. A combined metric is computed by combining the first metric and second metric using a weighting function. The target information pattern is detected using the combined metric.

Abstract: A system for authenticating a user of an in-home display (IHD) and an authentication method are provided. A user of an IHD is authenticated by using a mobile terminal including an authentication application. The authentication system receive authentication request data from the mobile terminal and allows the IHD to display a message in relation to user confirmation, and when certain requirements are met, the authentication system performs user authentication to permit a user to use the IHD.

Abstract: Apparatus and systems for improved access to storage devices from the sides of sleds mounted in storage enclosures. Embodiments provide apparatus and systems for a sled in a storage enclosure that provides access to storage devices on either side of the sled when the sled is slid forward out of its enclosure. Multiple sleds may be enclosed within a single enclosure to permit access to a portion of the storage devices in the enclosure hence reducing the problems of instability of the rack if the enclosure is mounted near the top of the rack.

Abstract: Various embodiments of the present invention provide systems and methods for format efficient data storage. As an example, a data storage device is described that includes: a storage medium, a read/write head assembly, and a read channel circuit. The read/write head assembly is disposed in relation to the storage medium and operable to sense information corresponding to an encoded codeword. The read channel circuit is operable to receive the encoded codeword. The read channel circuit includes a missing symbols insertion circuit, a codeword de-scramble circuit, an address insertion circuit, and a data decoder circuit. The missing symbols insertion circuit, the codeword de-scramble circuit, and the address insertion circuit together are operable to pad a derivative of the encoded codeword with a plurality of symbols, to de-scramble the derivative of the encoded codeword, and to insert address information corresponding to the derivative of the encoded codeword to yield a modified encoded codeword.