Abstract: A data storage controller exposes information stored in a locally managed volatile memory store to a host system. The locally managed volatile memory store is mapped to a corresponding portion of a peripheral component interconnect express (PCIe) compliant memory space managed by the host system. Backup logic in the data storage controller responds to a power event detected at the interface between the data storage controller and the host system by copying the contents of the volatile memory store to a non-volatile memory store on the data storage controller. Restore logic restores a data storage controller state by copying the contents of the non-volatile memory store to the locally managed volatile memory store upon the application of power such that the data in the volatile memory store is persistent even in the event of a loss of power to the host system and or the data storage controller.

Abstract: Methods and structure are disclosed for normalizing storage performance across a plurality of logical volumes. One embodiment is a storage controller. The storage controller is adapted to couple with a plurality of host systems and a storage device. The storage controller is adapted to receive one or more requests to create logical volumes for the plurality of hose systems, and adapted to identify a plurality of performance zones for storage areas of the storage device. The performance zones exhibit different performance criteria for one or more of: reading data from the storage device and writing data to the storage device. The storage controller is further adapted to allocate storage from each of the plurality of performance zones for each of the plurality of logical volumes such that the performance criteria for accessing the storage device is distributed substantially uniformly across the plurality of logical volumes.

Abstract: A method for a first communication device transreceiving a message with a second communication device, according to one embodiment of the present invention, comprises the steps of: the first communication device confirming a user value of the second communication device; the first communication device comparing the user value of the second communication device that is confirmed to a user value of the first communication device; and the first communication device establishing either the first communication device or the second communication device as an initiator having initiative for communication and establishing the other as a responder not having initiative for communication, depending on the result of the comparison.

Abstract: Disclosed is a gap adjusting method which easily adjusts a gap between a bimetal and a crossbar by using a gap adjusting block and an adjusting screw in a trip mechanism of a molded case circuit breaker without a separate additional device. The gap adjusting method in the trip mechanism of the molded case circuit breaker includes setting a reference gap between a crossbar and a bimetal, measuring a total resistance of the trip mechanism and a trip stroke of a switching mechanism to set a compensation gap, placing a gap adjusting block on a position separated from a crossbar by a gap based on the sum of the reference gap and the compensation gap, rotating an adjusting screw assembled with the bimetal to contact the adjusting screw with the gap adjusting block, and adhering the adjusting screw to the bimetal.

Abstract: A trip device for a circuit breaker disclosed herein includes a first terminal connected to a power source side, a second terminal connected to a load side, and a bimetal having one side connected with the first terminal and the other side connected with the second terminal, such that a current can flow therethrough, wherein the bimetal comes in surface-contact with at least one of the first terminal and the second terminal, with interposing an arc-resistive member therebetween.

Abstract: A device for processing data generated and processed in an electric vehicle is provided. The electric vehicle includes an engine, a motor connected to the engine and generating a driving torque, and an electronic control unit (ECU) controlling an operation of the engine, detecting a driving request signal, and including a plurality of controller for processing data generated on the basis of the driving request signal, wherein the ECU allows each of the plurality of control units to process the data on the basis of information on the data.

Abstract: A method for a first communication device transmitting data to a second communication device, according to one embodiment of the present invention, comprises the steps of: the first communication device generating a safety unique identifier by using a unique identifier of the first communication device and a unique identifier of the second communication device, in order to confirm the validity of connection between the first communication device and the second communication device; the first communication device calculating a data error detection code for detecting an error by using the safety unique identifier and the data; the first communication device generating a packet comprising the data and the data error detection code; and the first communication device transmitting the packet to the second communication device.

Abstract: Systems and methods relating generally to solid state memory, and more particularly to systems and methods for recovering data from a solid state memory.

Abstract: A system, method, and computer program product are provided for a host device to request and obtain failure information from a solid state drive (SSD). In operation, an error is detected during an operation associated with a solid state drive. Additionally, a command to return failure information is provided to the solid state drive by a host device. Further, the failure information is sent from the solid state drive to the host device, the failure information including failure information associated with the solid state drive.

Abstract: A trip device for a circuit breaker includes: a crossbar rotatably installed to perform the trigger function; and bimetal that is curved upon the occurrence of an abnormal current and presses and rotates the crossbar by means of a gap adjustment member. The crossbar is movable in the direction of a rotating shaft of the crossbar, and the gap adjustment member is attached to and detached from either the crossbar or the bimetal at varying angles so that a contact surface is parallel or at an angle to the direction of movement of the crossbar.

Abstract: An apparatus for restarting a medium voltage inverter is disclosed, wherein the inverter changes a voltage or a frequency outputted to a motor in response to an input voltage of the motor and a rotor speed of the motor and a predetermined voltage-frequency ratio.

Abstract: Systems and method relating generally to solid state memory, and more particularly to systems and methods for recycling data in a solid state memory.

Abstract: Disclosed is a magnetic contactor. The magnetic contactor includes a frame, a holder, a movable core, a bobbin, a fixed core coupled to a side of the bobbin and configured to absorb the movable core with a magnetic force, an elastic member provided between the holder and the bobbin, a b-contact switch configured to sense a closing completion time of the movable contact by using a mechanical mechanism relationship with the movable core, an electronic circuit part configured to receive a sensing signal from the b-contact switch and limit a current applied to the coil, and a switch manipulation member provided at one end of the movable core and configured to operate the b-contact switch.

Abstract: In one embodiment, an integrated circuit (IC) device includes a first logic block having performance characteristics, a first critical path monitor (CPM) configured to monitor the performance characteristics of the first logic block, and a first CPM envelope circuit enveloping the first CPM. The first logic block is configured to operate in at least one of a first functional mode and a first scan mode. The first CPM is adapted to operate in at least one of a second functional mode and a second scan mode. The first and second functional modes use higher clock frequencies, respectively, than the first and second scan modes. The first CPM envelope circuit comprises a clock-gate circuit adapted to allow the IC device to operate in a mixed mode, wherein the first CPM operates in the second functional mode while the first logic block operates in the first scan mode.

Abstract: Aspects of the disclosure pertain to a system and method for detecting server removal from a cluster to enable fast failover of storage (e.g., logical volumes). A method of operation of a storage controller of a cluster is disclosed. The method includes receiving a signal. The method further includes, based upon the received signal, determining that communicative connection between a second storage controller of the cluster and the first storage controller of cluster is unable to be established. The method further includes determining whether communicative connection between the first storage controller and expanders of first and second enclosure services manager modules of the cluster is able to be established. The method further includes, when it is determined that communicative connection between the first storage controller and the expanders of the first and second enclosure services manager modules of the cluster is able to be established, performing a failover process.

Abstract: A circuit breaker according to the present disclosure may include a movable contact configured to be brought into contact with or separated from the stationary contact; and a switching mechanism configured to switch the movable contact, wherein the switching mechanism includes a shaft rotatably installed therein; a transfer link configured to transfer a driving force from the shaft to the movable contact; and a pin configured to hinge-couple the shaft to the transfer link and insulate them from each other, and the pin is installed with a wear resistant member at a portion brought into contact with the shaft.

Abstract: A flash memory controller having soft-decoding error correcting code (ECC) logic generates log likelihood ratio or similar ECC decoder soft input information from decision patterns obtained from reading data from the same portion of flash memory two or more times. Each decision pattern corresponds to a voltage region bordering one of the reference voltages. Each decision pattern represents a combination of flash memory bit value decisions for a cell voltage within the voltage region corresponding to the decision pattern when a corresponding combination of the reference voltages are used to read the cell. Numerical values are then computed in response to combinations of the flash memory bit value decisions represented by the decision patterns. The numerical values are provided to the soft-decoding ECC logic to serve as soft input information.

Abstract: A method of adjusting a post-cursor tap weight in a transmitter FIR filter in a high-speed digital data transmission system. A receiver, over a forward channel, receives a signal from the transmitter and equalizes the received signal using an adaptive analog equalizer coupled to the forward channel and a decision feedback equalizer (DFE) coupled to the analog equalizer. A gain coefficient used to adjust the peaking by the analog equalizer is adapted using an error signal generated by the DFE. The post-cursor tap weight of the transmitter filter is adjusted up or down based on a comparison of the gain coefficient to a set. of limits. The post-cursor tap weight is transmitted to the transmitter over a reverse channel and then equalizers in the receiver readapt. Alternatively, eye opening data and a DFE tap coefficient are used to determine whether the post-cursor tap weight is adjusted up or down.

Abstract: Described embodiments recover timing and data information from a signal received via a communication channel. An analog-to-digital converter (ADC) operating at a baud rate of the communication channel generates an actual ADC value corresponding to each bit sample of the received signal. A fast symbol estimation module estimates, based on the actual ADC value, a bit value corresponding to each bit sample. The fast symbol estimation module operates at a digital clock rate. The estimated bit values are provided to a timing recovery module. An ADC reconstruction module, based on a first number of pre-cursor estimated bit values, an estimated cursor bit value, and a second number of post-cursor estimated bit values, generates a reconstructed ADC value corresponding to each bit sample. Based on the reconstructed ADC values, the estimated bit values, and the actual ADC values, a corrected bit value is generated for each bit sample.

Abstract: A high availability DAS system uses a solid state cache to provide near active-active performance in a DAS duster, while retaining the implementation simplicity of active-passive or dual active system. Each node in the duster may include a solid state cache that stores hot I/O in an active-active mode, which allows the data to be read from or written to the underlying dual-active or active/passive DAS RAID system only when access to the “hot Region” cools down or in the case of Cache Miss. The hot I/O data includes hot read data that accumulated dynamically regardless of ownership of the drives where the hot read data is permanently stored. The hot I/O data also includes hot write data that is mirrored across the solid state cache memories to avoid potential dirty write data conflicts and also to provide High Availability in case of server failures.