Abstract: A data communication system includes a plurality of mutually-disjoint sets of switches, each set including multiple mutually-disjoint subsets of the switches in the set. Local links interconnect the switches within each of the subsets in a fully-connected topology, while none of the switches in any given subset are connected in a single hop to any of the switches in any other subset within the same set. Global links interconnect the sets of the switches, each global link connecting one switch in one of the sets to another switch in another one of the sets, such that each of the subsets in any given set of the switches is connected in a single hop by at least one global link to at least one of the subsets of every other set of the switches.

Abstract: A network device in a communication network includes a controller and processing circuitry. The controller is configured to manage execution of an operation whose execution depends on inputs from a group of one or more work-request initiators. The processing circuitry is configured to read one or more values, which are set by the work-request initiators in one or more memory locations that are accessible to the work-request initiators and to the network device, and to trigger execution of the operation in response to verifying that the one or more values read from the one or more memory locations indicate that the work-request initiators in the group have provided the respective inputs.

Abstract: A system and method are provided. In one example, a system is disclosed that includes a memory device and a first interface configured to connect with a first external device. The interface may include a device side that enables a first data exchange with the first external device and a system side that enables a second data exchange with the memory device, where the system side further enables an exchange of platform hints between the first interface and the memory device. The system may also include a hinting unit that populates the platform hints in an address bit.

Abstract: A compute node includes a network-connected device, and a baseboard management controller (BMC) that is connected to the network-connected device by a sideband interface. The network-connected device is configured to communicate with a network. The BMC is configured to configure the network-connected device, via the sideband interface, to engage in a debug session over the network with a remote debug device.

Abstract: An optoelectronic device includes a substrate and first thin film layers disposed on the substrate and patterned to define a vertical-cavity surface-emitting laser (VCSEL), which is configured to emit optical radiation along an optical axis perpendicular to the substrate. Second thin film layers are disposed over the first thin film layers and are patterned to define an optical modulator in which the optical radiation propagates in a direction parallel to the substrate, and an optical coupler configured to couple the optical radiation from the VCSEL into the optical modulator.

Abstract: An apparatus includes multiple ports, packet communication processing circuitry coupled to the ports, and a processor that is configured to receive, from the packet communication processing circuitry, metadata that is indicative of a temporal pattern of control messages communicated via one or more of the ports, and to identify a network attack by applying anomaly detection to the temporal pattern of the control messages.

Abstract: A system comprises a transmitter that generates a combined signal including a first group of optical signals and a second group of optical signals, the first group of optical signals comprising M+X number of optical signals in a first polarization mode, the second group of optical signals comprising N number of optical signals in a second polarization mode, wherein the number of N and M optical signals comprise payload signals, where the X number of optical signals comprises at least one first pilot signal. The system may further include a receiver comprising a polarization recovery device that receives the combined signal and that recovers, from the combined signal, the first group of optical signals with the first polarization mode and the second group optical signals with the second polarization mode based on feedback indicative of at least one signal characteristic of the at least one first pilot signal.

Abstract: In one embodiment, a processing apparatus includes processing circuitry to process an event, a timestamping unit to generate a timestamp for the event, at least one register to store at least one parameter describing a hardware state of the processing circuitry, and timestamp correction processing circuitry to compute a time value as a correction to the generated timestamp responsively to the at least one parameter.

Abstract: A method for generating a Trellis-Coded Modulation (TCM) scheme for transmitting symbols over a Partial-Response (PR) channel, the method including holding a base TCM scheme including a plurality of states and transitions among the states. Sequences of symbols are produced, and second sequences of symbols are calculated, each second sequence emulating a response of the PR channel to a respective sequence of symbols traversing the PR channel. The TCM scheme is initialized by assigning the sequences to the transitions of the base TCM scheme. One or more transitions are removed so that second sequences corresponding to transitions that were not removed are separated by at least a first distance. One or more additional transitions are further removed from the TCM scheme, so that second sequences corresponding to parallel transitions from a current state to a next state are separated by at least a second distance larger than the first distance.

Abstract: In one embodiment, a system includes a peripheral device including a memory access interface to receive from a host device headers of packets, while corresponding payloads of the packets are stored in a host memory of the host device, and descriptors being indicative of respective locations in the host memory at which the corresponding payloads are stored, a data processing unit memory to store the received headers and the descriptors without the payloads of the packets, and a data processing unit to process the received headers, wherein the peripheral device is configured, upon completion of the processing of the received headers by the data processing unit, to fetch the payloads of the packets over the memory access interface from the respective locations in the host memory responsively to respective ones of the descriptors, and packet processing circuitry to receive the headers and payloads of the packets, and process the packets.

Abstract: An apparatus includes one or more ports for connecting to a communication network, processing circuitry and a message aggregation circuit (MAC). The processing circuitry is configured to communicate messages over the communication network via the one or more ports. The MAC is configured to receive messages, which originate in one or more source processes and are destined to one or more destination processes, to aggregate two or more of the messages that share a common destination into an aggregated message, and to send the aggregated message using the processing circuitry over the communication network.

Abstract: An optoelectronic transmitter (10) includes an electro-optic modulator (12), digital driving circuitry (14), and feedback circuitry (30). The electro-optic modulator is configured to modulate an optical signal in response to an electrical drive signal. The digital driving circuitry is coupled to the electro-optical modulator and is configured to generate the electrical drive signal. The feedback circuitry is configured to measure a quantity indicative of a power level of the modulated optical signal produced by the electro-optic modulator, and to adapt a supply voltage to the digital driving circuitry in response to the measured quantity.

Abstract: A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.

Abstract: A method of determining if a virtual machine is executing a network attack may include using a computing device operating a processor: receiving a plurality of jobs from a plurality of virtual machines being executed across time slices on a host computer in a computer network; executing the plurality of jobs using the processor; receiving data from hardware counters of the processor; and based on the data, determining whether or not a virtual machine of the plurality of virtual machines is executing a network attack.

Abstract: A computer system includes a volatile memory and at least one processor. The volatile memory includes a protected storage segment (PSS) configured to store firmware-authentication program code for authenticating firmware of the computer system. The at least one processor is configured to receive a trigger to switch to a given version of the firmware, to obtain, in response to the trigger, a privilege to access the PSS, to authenticate the given version of the firmware by executing the firmware-authentication program code from the PSS, to switch to the given version of the firmware upon successfully authenticating the given version, and to take an alternative action upon failing to authenticate the given version.

Abstract: An apparatus includes operational circuitry and Hardware Diagnostics Circuitry (HDC). The HDC is configured to receive a definition of multiple trigger rules, each trigger rule specifying a respective trigger event as a function of trigger data sources in the operational circuitry, to receive a definition of (i) a pre-trigger logging set selected from among a plurality of diagnostics data sources in the operational circuitry, and (ii) for each trigger rule, a respective post-trigger logging set including a set of one or more of the diagnostics data sources, and, during operation of the operational circuitry, to log the diagnostics data sources in the pre-trigger logging set, to log the trigger data sources and to repeatedly evaluate the trigger rules, and, in response to triggering of a given trigger event by a given trigger rule, to start logging the diagnostics data sources in the post-trigger logging set of the given trigger rule.

Abstract: A transmitter including a digital-to-analog converter (DAC) to generate an analog output corresponding to a transmitted signal. The transmitter further includes an analog-to-digital converter (ADC) coupled to the DAC. The ADC measures the analog output of the DAC to identify a set of digital samples. The ADC identifies, from the set of digital samples, a set of valid samples, wherein each valid sample has a voltage within a voltage range. The ADC extracts one or more signal properties from the set of valid samples.

Abstract: An apparatus includes a processor and split-read control circuitry (SRCC). The processor is to issue a set of one or more split-read requests for loading one or more data values to one or more respective local registers of the processor. The SRCC is to receive the set of one or more split-read requests, to read the one or more data values on behalf of the processor, and to write the data values into the one or more respective local registers. The processor and the SRCC are to coordinate a status of the split-read requests via a split-read-status indication.

Abstract: Apparatuses, systems, and associated methods are described that provide an optical device with sealed optoelectronic component(s) without impacting effective optical performance of the optical device. An example optical device includes a substrate that defines a first surface and a second surface opposite the first surface. The optical device further includes an optoelectronic component supported by the first surface of the substrate where the optoelectronic component operates with optical signals. The optical device further includes a conformal coating applied to the first surface of the substrate such that at least a portion of the conformal coating is disposed on the optoelectronic component. The conformal coating substantially seals the optoelectronic component from an external environment of the optical device without impacting effective optical performance of the optical device.

Abstract: A networking system includes a pluggable security device comprising at least one port interface that is insertable into at least one physical port, memory that stores a security key used to provide security over a network link, and processing circuitry coupled with the at least one port interface and with the memory. The processing circuitry utilizes the security key to verify security of a point-to-point connection established over the network link and after verifying the security of the point-to-point connection, provides a data integrity check function for data packets received at the at least one port interface.