Abstract: Semiconductor wafers have a front surface, a back surface, a notch, and an edge. A method of polishing a wafer includes polishing at least one of the surfaces and the notch of the wafer using a polishing pad and slurry. At least one surface of the wafer is cleaned of residual slurry. The cleaned surface is grasped by applying a vacuum to the cleaned surface of the wafer using a vacuum chuck. Edge of the wafer is polished using a pad and slurry while the wafer is grasped by the vacuum chuck.

Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.

Abstract: A method of charging a crystal forming apparatus with molten source material is provided. The method includes the steps of positioning a melter assembly relative to the crystal forming apparatus for delivering molten silicon to a crucible of the apparatus. An upper heating coil in the melter assembly is operated to melt source material in a melting crucible. A lower heating coil in the melter assembly is operated to allow molten source material to flow through an orifice of the melter assembly to deliver a stream of molten source material to the crucible of the crystal forming apparatus. The invention is also directed to a method of charging a crystal puller with molten silicon including the step of removing an upper housing of the crystal puller defining a pulling chamber from a lower housing of the crystal puller defining a growth chamber and attaching the lower housing in place of the upper housing.

Abstract: A platform for supporting a semiconductor wafer includes a body with channel having spaced apart first and second edge margins in contiguous relationship with a top surface of the body. At least one of the edge margins is generally convex along at least a portion of the channel.

Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.

Abstract: The present invention relates to a silicon on insulator (“SOI”) structure in which the device layer is derived from a single crystal Cz silicon wafer which has an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The device layer of the silicon on insulator structure is single crystal Cz silicon having an axially symmetric region which is substantially free of agglomerated intrinsic point defects.

Abstract: A dressing apparatus for dressing a polishing pad includes a dressing member engageable with the polishing pad. The dressing apparatus is adapted to change the amount of force exerted by the dressing member on the polishing pad as the dressing member moves radially along the polishing pad. A controller for controlling the dressing apparatus has pre-programmed recipes that are selectable based on the radial profile of a measured polished wafer.

Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. In one embodiment, the process comprises controlling the growth velocity, v, and the effective or corrected axial temperature gradient, as defined herein, such that, within a given segment of the ingot, the ratio v/Geffective, or v/Gcorrected, is substantially near the critical value thereof over a substantial portion of the radius of that segment, and controlling the cooling rate of the segment between (i) solidification and about 1250° C., and (ii) about 1250° C. and about 1000° C., in order to manipulate the effect of the lateral incorporation of intrinsic point defects therein, and thus limit the formation of agglomerated intrinsic point defects and/or oxygen precipitate clusters in a ring extending radially inward from about the lateral surface of the ingot segment.

Abstract: The present invention relates to a single crystal silicon ingot or wafer wherein the lateral incorporation effect of intrinsic point defects has been manipulated such that the formation of agglomerated intrinsic point defects and/or oxygen precipitate clusters in a ring extending radially inward from about the lateral surface of the ingot segment is limited.

Abstract: A method and system for use in combination with a crystal growing apparatus for growing a monocrystalline ingot according to a Czochralski process. The crystal growing apparatus has a heated crucible including a semiconductor melt from which the ingot is pulled. The ingot is grown on a seed crystal pulled from the melt. A time varying external magnetic field is imposed on the melt during pulling of the ingot. The magnetic field is selectively adjusted to produce pumping forces in the melt to control a melt flow velocity while the ingot is being pulled from the melt.

Abstract: The invention is directed to apparatus and methods for measuring and for reducing dust in granular polysilicon. In one aspect, a system includes a process vessel having a vacuum port for pulling dust from the polysilicon. Another system of the invention includes a baffle tube for receiving a polysilicon flow. A measuring system includes a manifold and filter for separating and measuring the dust from a flow of polysilicon. The invention is also directed to methods of using the systems, to methods of manufacturing and packaging granular polysilicon, and to a supply of granular polysilicon.

Abstract: This invention is directed to a process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having the desired vacancy concentration profile. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.

Abstract: System for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.

Abstract: Processes for the purification of silicon carbide structures, including silicon carbide coated silicon carbide structures, are disclosed. The processes described can reduce the amount of iron contamination in a silicon carbide structure by 100 to 1000 times. After purification, the silicon carbide structures are suitable for use in high temperature silicon wafer processing.

Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process either comprises exposing the wafer's front and back surfaces to different atmospheres, or thermally annealing two wafers in a face-to-face arrangement.

Abstract: A system and method for slicing an ingot into wafers using the wire saw process. A slurry collection system collects and supplies slurry to a slurry handling system for controlling temperatures and/or flow rates of the slurry thereby providing slurry output at a controlled temperature and/or a controlled flow rate to slicing system for cutting the ingot, which may be preheated.

Abstract: A double side grinder comprises a pair of grinding wheels and a pair of hydrostatic pads operable to hold a flat workpiece (e.g., semiconductor wafer) so that part of the workpiece is positioned between the grinding wheels and part of the workpiece is positioned between the hydrostatic pads. At least one sensor measures a distance between the workpiece and the respective sensor for assessing nanotopology of the workpiece. In a method of the invention, a distance to the workpiece is measured during grinding and used to assess nanotopology of the workpiece. For instance, a finite element structural analysis of the workpiece can be performed using sensor data to derive at least one boundary condition. The nanotopology assessment can begin before the workpiece is removed from the grinder, providing rapid nanotopology feedback. A spatial filter can be used to predict the likely nanotopology of the workpiece after further processing.

Abstract: A double side grinder comprises a pair of grinding wheels and a pair of hydrostatic pads operable to hold a flat workpiece (e.g., semiconductor wafer) so that part of the workpiece is positioned between the grinding wheels and part of the workpiece is positioned between the hydrostatic pads. At least one sensor measures a distance between the workpiece and the respective sensor for assessing nanotopology of the workpiece. In a method of the invention, a distance to the workpiece is measured during grinding and used to assess nanotopology of the workpiece. For instance, a finite element structural analysis of the workpiece can be performed using sensor data to derive at least one boundary condition. The nanotopology assessment can begin before the workpiece is removed from the grinder, providing rapid nanotopology feedback. A spatial filter can be used to predict the likely nanotopology of the workpiece after further processing.

Abstract: The present invention relates to a process for forming single crystal silicon ingots or wafers that contain an axially symmetric region in which vacancies are the predominant intrinsic point defect, that are substantially free of oxidation induced stacking faults, and are nitrogen doped to stabilize oxygen precipitation nuclei therein.

Abstract: An electronic power device comprising a single crystal silicon segment being characterized in that the segment comprises a non-uniform distribution of minority carrier recombination centers, the minority carrier recombination centers comprising a substitutional metal, with the concentration of the centers in a bulk layer being greater than the concentration in a surface layer. The centers have a concentration profile in which the peak density of the centers is at or near the central plane with the concentration generally decreasing from the position of peak density in the direction of the front surface of the segment and generally decreasing from the position of peak density in the direction of the back surface of the segment.