Patents Assigned to MEMC Electronic Materials, Inc.
  • Patent number: 8367519
    Abstract: This invention generally relates to a process for making a multi-layered crystalline structure. The process includes implanting ions into a donor structure, bonding the implanted donor structure to a second structure to form a bonded structure, cleaving the bonded structure, and removing any residual portion of the donor structure from the finished multi-layered crystalline structure.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: February 5, 2013
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Dale A. Witte, Jeffrey L. Libbert
  • Patent number: 8347740
    Abstract: A system for measuring the weight of an object while pulling the object upward includes a puller having a frame and a cable having a first end coupled to the object and a second end engaging a second cylinder. At least a portion of the cable engages the outer circumferential surface of a first cylinder and the second cylinder. The apparatus also includes an upper arm and an actuator. A force measurement device is coupled to the first cylinder and to the upper arm and measures the weight of the object. The actuator is operable to lower and raise the weight measurement device and the first cylinder. In some embodiments, the position of the cable with respect to the frame may be adjusted by a dampening system or a bushing.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: January 8, 2013
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Harold Korb
  • Publication number: 20130004405
    Abstract: Methods for producing silane by reacting a hydride and a halosilane are disclosed. Some embodiments involve use of a column which is not mechanically agitated and in which reactants may be introduced in a counter-current arrangement. Some embodiments involve use of a baffled column which has multiple reaction zones.
    Type: Application
    Filed: June 20, 2012
    Publication date: January 3, 2013
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Baisheng Zou, Puneet Gupta
  • Patent number: 8340801
    Abstract: Systems and computer-readable media having computer-executable components are disclosed for generating a representation of flatness defects on a wafer. Data is received describing the thickness of the wafer at a plurality of points on a wafer divided into a plurality of sites. A reference plane is defined for each of the plurality of sites. For each of the sites, an upper plane and a lower plane are defined relative to the reference plane. A determination is made as to which of the plurality of points on the wafer represents a flatness defect by identifying which points are not disposed between the upper plane and lower plane. A representation is then generated depicting a location of each of the flatness defects on the wafer. In some embodiments, a single representation is generated depicting the location of flatness defects on a plurality of wafers.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: December 25, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: John A. Pitney
  • Patent number: 8330245
    Abstract: The disclosure relates to preparation of silicon on insulator structures with reduced unbonded regions and to methods for producing such wafers by minimizing the roll-off amount (ROA) of the handle and donor wafers. Methods for polishing wafers are also provided.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: December 11, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: John A. Pitney, Ichiro Yoshimura, Lu Fei
  • Patent number: 8309464
    Abstract: The present disclosure generally relates to the manufacture of silicon wafers, and more particularly to edge etching apparatus and methods for etching the edge of a silicon wafer.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: November 13, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Henry F. Erk, Peter D. Albrecht, Eugene R. Hollander, Thomas E. Doane, Judith A. Schmidt, Roland R. Vandamme, Guoqiang (David) Zhang
  • Patent number: 8310031
    Abstract: A silicon-on-insulator or bonded wafer includes an upper portion having a trapezoid shape in cross-section and a lower portion having an outer peripheral edge having a curved shape.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: November 13, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Guoqiang David Zhang, Roland R. Vandamme
  • Publication number: 20120279438
    Abstract: Methods for reducing or even eliminating dislocations in Czochralski-grown silicon ingots are disclosed. Generally, the methods involve controlling the growth conditions of the neck prior to formation of the ingot body.
    Type: Application
    Filed: April 24, 2012
    Publication date: November 8, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Jae Woo Ryu, Young Gil Jeong
  • Publication number: 20120247686
    Abstract: Systems and methods for the ultrasonic cleaving of bonded wafer pairs are described. The system includes a tank for containing a volume of liquid, a wafer boat having a recess formed therein for receiving the bonded wafer pair. The recess has a pair of opposing, spaced-apart sidewalls disposed at an angle from a vertical axis. An ultrasonic agitator is configured to ultrasonically agitate the volume of liquid. The ultrasonic agitation of the volume of liquid results in the cleaving of the bonded wafer pair.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventor: Anca Stefanescu
  • Publication number: 20120235283
    Abstract: Silicon on insulator structures having a high resistivity region in the handle wafer of the silicon on insulator structure are disclosed. Methods for producing such silicon on insulator structures are also provided. Exemplary methods involve creating a non-uniform thermal donor profile and/or modifying the dopant profile of the handle wafer to create a new resistivity profile in the handle wafer. Methods may involve one or more SOI manufacturing steps or electronic device (e.g., RF device) manufacturing steps.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Jeffrey L. Libbert, Lu Fei, Robert W. Standley
  • Publication number: 20120238070
    Abstract: Silicon on insulator structures having a high resistivity region in the handle wafer of the silicon on insulator structure are disclosed. Methods for producing such silicon on insulator structures are also provided. Exemplary methods involve creating a non-uniform thermal donor profile and/or modifying the dopant profile of the handle wafer to create a new resistivity profile in the handle wafer. Methods may involve one or more SOI manufacturing steps or electronic device (e.g., RF device) manufacturing steps.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Jeffrey L. Libbert, Lu Fei, Robert W. Standley
  • Patent number: 8267745
    Abstract: Methods for holding a workpiece with a hydrostatic pad are disclosed herein. The pad includes hydrostatic pockets formed in a face of the body directly opposed to the wafer. The pockets are adapted for receiving fluid through the body and into the pockets to provide a barrier between the body face and the workpiece while still applying pressure to hold the workpiece during grinding. The hydrostatic pads allow the wafer to rotate relative to the pads about their common axis. The pockets are oriented to reduce hydrostatic bending moments that are produced in the wafer when the grinding wheels shift or tilt relative to the hydrostatic pads, helping prevent nanotopology degradation of surfaces of the wafer commonly caused by shift and tilt of the grinding wheels.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: September 18, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Milind S. Bhagavat, Puneet Gupta, Roland R. Vandamme, Takuto Kazama, Noriyuki Tachi
  • Publication number: 20120230903
    Abstract: Gas distribution units of fluidized bed reactors are configured to direct thermally decomposable compounds to the center portion of the reactor and away from the reactor wall to prevent deposition of material on the reactor wall and process for producing polycrystalline silicon product in a reactor that reduce the amount of silicon which deposits on the reactor wall.
    Type: Application
    Filed: April 25, 2012
    Publication date: September 13, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Milind Kulkarni, Puneet Gupta, Balaji Devulapalli, Jameel Ibrahim, Vithal Revankar, Kwasi Foli
  • Publication number: 20120193753
    Abstract: Methods for producing silicon on insulator structures with a reduced metal content in the device layer thereof are disclosed. Silicon on insulator structures with a reduced metal content are also disclosed.
    Type: Application
    Filed: January 20, 2012
    Publication date: August 2, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Alexis Grabbe, Larry Flannery
  • Publication number: 20120189527
    Abstract: Production of polycrystalline silicon in substantially closed-loop processes and systems is disclosed. The processes and systems generally involve disproportionation of trichlorosilane to produce silane or dichlorosilane and thermal decomposition of silane or dichlorosilane to produce polycrystalline silicon.
    Type: Application
    Filed: December 16, 2011
    Publication date: July 26, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Puneet Gupta, Yue Huang, Satish Bhusarapu
  • Publication number: 20120189501
    Abstract: Production of polycrystalline silicon in substantially closed-loop processes and systems is disclosed. The processes and systems generally involve disproportionation of trichlorosilane to produce silane or dichlorosilane and thermal decomposition of silane or dichlorosilane to produce polycrystalline silicon.
    Type: Application
    Filed: December 16, 2011
    Publication date: July 26, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Puneet Gupta, Yue Huang, Satish Bhusarapu
  • Patent number: 8220647
    Abstract: A wafer boat for a semiconductor wafer includes vertical rods, fingers supported by the vertical rods, and plates supported by the fingers. The plate has a support surface for supporting the wafer and a recessed surface spaced from the support surface and spaced from the wafer. A plurality of holes extends from the recessed surface, and the support surface is free of holes to inhibit contamination of the wafer.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: July 17, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Brian Lawrence Gilmore, Lance G. Hellwig
  • Patent number: 8220646
    Abstract: A support for a semiconductor wafer includes a plate having a support surface for supporting the wafer and a recessed surface spaced from the support surface and spaced from the wafer. A plurality of holes extends from the recessed surface, and the support surface is free of holes to inhibit contamination of the wafer.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: July 17, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Brian Lawrence Gilmore, Lance G. Hellwig
  • Patent number: 8216362
    Abstract: Processes for preparing a single crystal silicon ingot are disclosed. In certain embodiments, the processes involve controlling (1) a growth velocity, v, of the ingot as well as (2) an average axial temperature gradient, G, a corrected average axial temperature gradient, Gcorrected, or an effective average axial temperature gradient, Geffective, during the growth of at least a segment of the constant diameter portion of the ingot.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: July 10, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Milind S. Kulkarni
  • Publication number: 20120173170
    Abstract: Systems and methods are provided for determining the size of particles within a fluidized bed reactor. The pressure of gas adjacent a gas inlet and adjacent a gas outlet of the reactor are measured with pressure sensors. An algorithm is applied to at least one of the pressure measurements to determine the size of particles within the reactor. The determined size of the particles can be used to control the operation of the reactor. A dosing system and method is provided for measuring defined volumes of particles for transport to the reactor.
    Type: Application
    Filed: December 29, 2010
    Publication date: July 5, 2012
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Satish Bhusarapu, Arif Nawaz, Puneet Gupta, Karthik Balakrishnan