Abstract: Processing a wafer using a double side grinder having a pair of grinding wheels. Warp data is obtained by a warp measurement device for measuring warp of a wafer as ground by the double side grinder. The warp data is received and a nanotopography of the wafer is predicted based on the received warp data. A grinding parameter is determined based on the predicted nanotopography of the wafer. Operation of the double side grinder is adjusted based on the determined grinding parameter.
Type:
Application
Filed:
December 31, 2007
Publication date:
July 10, 2008
Applicant:
MEMC ELECTRONIC MATERIALS, INC.
Inventors:
Sumeet S. Bhagavat, Roland R. Vandamme, Tomomi Komura, Tomohiko Kaneko, Takuto Kazama
Abstract: A wafer support platform is sandblasted with silicon-containing particles to create a surface with uniform roughness. Contaminants become embedded in the surface during the sandblasting procedure. A layer is applied over the surface to isolate the contaminants from a support wafer while maintaining the uniform roughness.
Abstract: Methods for reducing the surface roughness of semiconductor wafers through a combination of rough polishing and thermally annealing the wafer.
Abstract: Semiconductor wafers have a front surface, a back surface, a notch, and an edge. A method of polishing a wafer includes polishing at least one of the surfaces and the notch of the wafer using a polishing pad and slurry. At least one surface of the wafer is cleaned of residual slurry. The cleaned surface is grasped by applying a vacuum to the cleaned surface of the wafer using a vacuum chuck. Edge of the wafer is polished using a pad and slurry while the wafer is grasped by the vacuum chuck.
Type:
Application
Filed:
December 21, 2006
Publication date:
June 26, 2008
Applicant:
MEMC ELECTRONIC MATERIALS, INC.
Inventors:
Henry Frank Erk, Judith Ann Schmit, Roland Vandamme
Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.
Type:
Application
Filed:
January 2, 2008
Publication date:
May 1, 2008
Applicant:
MEMC ELECTRONIC MATERIALS, INC.
Inventors:
Mark Stinson, Henry Erk, Guoqiang (David) Zhang
Abstract: A method of charging a crystal forming apparatus with molten source material is provided. The method includes the steps of positioning a melter assembly relative to the crystal forming apparatus for delivering molten silicon to a crucible of the apparatus. An upper heating coil in the melter assembly is operated to melt source material in a melting crucible. A lower heating coil in the melter assembly is operated to allow molten source material to flow through an orifice of the melter assembly to deliver a stream of molten source material to the crucible of the crystal forming apparatus. The invention is also directed to a method of charging a crystal puller with molten silicon including the step of removing an upper housing of the crystal puller defining a pulling chamber from a lower housing of the crystal puller defining a growth chamber and attaching the lower housing in place of the upper housing.
Abstract: A platform for supporting a semiconductor wafer includes a body with channel having spaced apart first and second edge margins in contiguous relationship with a top surface of the body. At least one of the edge margins is generally convex along at least a portion of the channel.
Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.
Type:
Grant
Filed:
June 14, 2005
Date of Patent:
January 29, 2008
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
Mark G. Stinson, Henry F. Erk, Guoqiang (David) Zhang, Mick Bjelopavlic, Alexis Grabbe, Jozef G. Vermeire, Judith A. Schmidt, Thomas E. Doane, James R. Capstick
Abstract: The present invention relates to a silicon on insulator (“SOI”) structure in which the device layer is derived from a single crystal Cz silicon wafer which has an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The device layer of the silicon on insulator structure is single crystal Cz silicon having an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
Abstract: A hydrostatic pad for use in holding a semiconductor wafer during grinding of the wafer by grinding wheels. The pad includes hydrostatic pockets formed in a face of the body directly opposed to the wafer The pockets are adapted for receiving fluid through the body and into the pockets to provide a barrier between the body face and the workpiece while still applying pressure to hold the workpiece during grinding. The hydrostatic pads allow the wafer to rotate relative to the pads about their common axis. The pockets are oriented to reduce hydrostatic bending moments that are produced in the wafer when the grinding wheels shift or tilt relative to the hydrostatic pads, helping prevent nanotopology degradation of surfaces of the wafer commonly caused by shift and tilt of the grinding wheels.
Abstract: A dressing apparatus for dressing a polishing pad includes a dressing member engageable with the polishing pad. The dressing apparatus is adapted to change the amount of force exerted by the dressing member on the polishing pad as the dressing member moves radially along the polishing pad. A controller for controlling the dressing apparatus has pre-programmed recipes that are selectable based on the radial profile of a measured polished wafer.
Type:
Application
Filed:
June 29, 2007
Publication date:
January 10, 2008
Applicant:
MEMC ELECTRONIC MATERIALS, INC.
Inventors:
Mark Stinson, Madhavan Esayanur, Dennis Buese, Emanuele Corsi, Ezio Bovio, Antonio Rinaldi, Larry Flannery
Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. In one embodiment, the process comprises controlling the growth velocity, v, and the effective or corrected axial temperature gradient, as defined herein, such that, within a given segment of the ingot, the ratio v/Geffective, or v/Gcorrected, is substantially near the critical value thereof over a substantial portion of the radius of that segment, and controlling the cooling rate of the segment between (i) solidification and about 1250° C., and (ii) about 1250° C. and about 1000° C., in order to manipulate the effect of the lateral incorporation of intrinsic point defects therein, and thus limit the formation of agglomerated intrinsic point defects and/or oxygen precipitate clusters in a ring extending radially inward from about the lateral surface of the ingot segment.
Abstract: The present invention relates to a single crystal silicon ingot or wafer wherein the lateral incorporation effect of intrinsic point defects has been manipulated such that the formation of agglomerated intrinsic point defects and/or oxygen precipitate clusters in a ring extending radially inward from about the lateral surface of the ingot segment is limited.
Abstract: A method and system for use in combination with a crystal growing apparatus for growing a monocrystalline ingot according to a Czochralski process. The crystal growing apparatus has a heated crucible including a semiconductor melt from which the ingot is pulled. The ingot is grown on a seed crystal pulled from the melt. A time varying external magnetic field is imposed on the melt during pulling of the ingot. The magnetic field is selectively adjusted to produce pumping forces in the melt to control a melt flow velocity while the ingot is being pulled from the melt.
Abstract: The invention is directed to apparatus and methods for measuring and for reducing dust in granular polysilicon. In one aspect, a system includes a process vessel having a vacuum port for pulling dust from the polysilicon. Another system of the invention includes a baffle tube for receiving a polysilicon flow. A measuring system includes a manifold and filter for separating and measuring the dust from a flow of polysilicon. The invention is also directed to methods of using the systems, to methods of manufacturing and packaging granular polysilicon, and to a supply of granular polysilicon.
Type:
Grant
Filed:
August 31, 2004
Date of Patent:
November 6, 2007
Assignee:
MEMC Electronic Materials, Inc.
Inventors:
John D. Holder, Hariprasad Sreedharamurthy, John D. Hilker
Abstract: This invention is directed to a process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having the desired vacancy concentration profile. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.
Abstract: System for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process either comprises exposing the wafer's front and back surfaces to different atmospheres, or thermally annealing two wafers in a face-to-face arrangement.
Type:
Application
Filed:
May 24, 2007
Publication date:
September 27, 2007
Applicant:
MEMC ELECTRONIC MATERIALS, INC.
Inventors:
Robert Falster, Joseph Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve Markgraf, Paolo Mutti, Seamus McQuaid, Bayard Johnson
Abstract: Processes for the purification of silicon carbide structures, including silicon carbide coated silicon carbide structures, are disclosed. The processes described can reduce the amount of iron contamination in a silicon carbide structure by 100 to 1000 times. After purification, the silicon carbide structures are suitable for use in high temperature silicon wafer processing.
Abstract: A system and method for slicing an ingot into wafers using the wire saw process. A slurry collection system collects and supplies slurry to a slurry handling system for controlling temperatures and/or flow rates of the slurry thereby providing slurry output at a controlled temperature and/or a controlled flow rate to slicing system for cutting the ingot, which may be preheated.
Type:
Application
Filed:
January 10, 2007
Publication date:
August 2, 2007
Applicant:
MEMC ELECTRONIC MATERIALS, INC.
Inventors:
Puneet Gupta, Milind Kulkarni, Carlo Zavattari, Roland Vandamme